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80C51 family programmer guide.pdf

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80C51 family programmer guide.pdf

PhilipsSemiconductors80C51familyprogrammersguideandinstructionset80C51Family1March1995PROGRAMMERSGUIDEANDINSTRUCTIONSETMemoryOrganizationProgramMemoryThe80C51hasseparateaddressspacesforprogramanddatamemory.TheProgrammemorycanbeupto64kbyteslong.Thelower4kcanresideonchip.Figure1showsamapofthe80C51programmemory.The80C51canaddressupto64kbytesofdatamemorytothechip.TheMOVXinstructionisusedtoaccesstheexternaldatamemory.The80C51has128bytesofonchipRAM,plusanumberofSpecialFunctionRegistersSFRs.Thelower128bytesofRAMcanbeaccessedeitherbydirectaddressingMOVdataaddrorbyindirectaddressingMOVRi.Figure2showstheDataMemoryorganization.DirectandIndirectAddressAreaThe128bytesofRAMwhichcanbeaccessedbybothdirectandindirectaddressingcanbedividedintothreesegmentsaslistedbelowandshowninFigure3.1.RegisterBanks03Locations0through1FH32bytes.Thedeviceafterresetdefaultstoregisterbank0.Tousetheotherregisterbanks,theusermustselecttheminsoftware.Eachregisterbankcontainseight1byteregisters0through7.Resetinitializesthestackpointertolocation07H,anditisincrementedoncetostartfromlocation08H,whichisthefirstregisterR0ofthesecondregisterbank.Thus,inordertousemorethanoneregisterbank,theSPshouldbeinitializedtoadifferentlocationoftheRAMwhereitisnotusedfordatastoragei.e.,thehigherpartoftheRAM.2.BitAddressableArea16byteshavebeenassignedforthissegment,20H2FH.Eachoneofthe128bitsofthissegmentcanbedirectlyaddressed07FH.Thebitscanbereferredtointwoways,bothofwhichareacceptablebymostassemblers.Onewayistorefertotheiraddressi.e.,07FH.Theotherwayiswithreferencetobytes20Hto2FH.Thus,bits07canalsobereferredtoasbits20.020.7,andbits8FHarethesameas21.021.7,andsoon.Eachofthe16bytesinthissegmentcanalsobeaddressedasabyte.3.ScratchPadArea30Hthrough7FHareavailabletotheuserasdataRAM.However,ifthestackpointerhasbeeninitializedtothisarea,enoughbytesshouldbeleftasidetopreventSPdatadestruction.Figure2showsthedifferentsegmentsoftheonchipRAM.OR60kBYTESEXTERNALANDFFFF10000FFF00004kBYTESINTERNAL64kBYTESEXTERNALFFFF0000SU00567Figure1.80C51ProgramMemory80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19952SFRsDIRECTADDRESSINGONLYANDFF807F0064kBYTESEXTERNAL0FFF0000DRIECTANDINDIRECTADDRESSINGINTERNALSU00568Figure2.80C51DataMemorySCRATCHPADAREA8BYTES787068605850484038302820181008007F776F675F574F473F372F271F170F07...7F0...3210BITADDRESSABLESEGMENTREGISTERBANKSSU00569Figure3.128BytesofRAMDirectandIndirectAddressable80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19953Table1.80C51SpecialFunctionRegistersSYMBOLDESCRIPTIONDIRECTADDRESSBITADDRESS,SYMBOL,ORALTERNATIVEPORTFUNCTIONMSBLSBRESETVALUEACCAccumulatorE0HE7E6E5E4E3E2E1E000HBBregisterF0HF7F6F5F4F3F2F1F000HDPTRDatapointer2bytesDPHDatapointerhigh83H00HDPLDatapointerlow82H00HAFAEADACABAAA9A8IEInterruptenableA8HEA––ESET1EX1ET0EX00x000000BBFBEBDBCBBBAB9B8IPInterruptpriorityB8H–––PSPT1PX1PT0PX0xx000000B8786858483828180P0Port080HAD7AD6AD5AD4AD3AD2AD1AD0FFH9796959493929190P1Port190H––––––T2EXT2FFHA7A6A5A4A3A2A1A0P2Port2A0HA15A14A13A12A11A10A9A8FFHB7B6B5B4B3B2B1B0P3Port3B0HRDWRT1T0INT1INT0TxDRxdFFHPCON1Powercontrol87HSMOD–––GF1GF0PDIDL0xxxxxxxBD7D6D5D4D3D2D1D0PSWProgramstatuswordD0HCYACF0RS1RS0OV–P00HSBUFSerialdatabuffer99HxxxxxxxxB9F9E9D9C9B9A9998SCONSerialcontroller98HSM0SM1SM2RENTB8RB8TIRI00HSPStackpointer81H07H8F8E8D8C8B8A8988TCONTimercontrol88HTF1TR1TF0TR0IE1IT1IE0IT0TH0Timerhigh08CH00HTH1Timerhigh18DH00HTL0Timerlow08AH00HTL1Timerlow18BH00HTMODTimermode89HGATEC/TM1M0GATEC/TM1M000HNOTESBitaddressable1.BitsGF1,GF0,PD,andIDLofthePCONregisterarenotimplementedontheNMOS8051/8031.80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19954F8F0E8E0D8D0C8C0B8B0A8A098908880FFF7EFE7DFD7CFC7BFB7AFA79F978F87TCON8BYTESBITADDRESSABLEP0P1SCONP2IEP3IPPSWACCBSBUFTMODTL0TL1TH0TH1SPDPLDPHPCONSU00570Figure4.SFRMemoryMap80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19955ThoseSFRsthathavetheirbitsassignedforvariousfunctionsarelistedinthissection.Abriefdescriptionofeachbitisprovidedforquickreference.FormoredetailedinformationrefertotheArchitectureChapterofthisbook.PSWPROGRAMSTATUSWORD.BITADDRESSABLE.CYACF0RS1RS0OV–PCYPSW.7CarryFlag.ACPSW.6AuxiliaryCarryFlag.F0PSW.5Flag0availabletotheuserforgeneralpurpose.RS1PSW.4RegisterBankselectorbit1SEENOTE1.RS0PSW.3RegisterBankselectorbit0SEENOTE1.OVPSW.2OverflowFlag.–PSW.1Usableasageneralpurposeflag.PPSW.0Parityflag.Set/clearedbyhardwareeachinstructioncycletoindicateanodd/evennumberof1busintheaccumulator.NOTE1.ThevaluepresentedbyRS0andRS1selectsthecorrespondingregisterbank.RS1RS0REGISTERBANKADDRESS00000H07H01108H0FH10210H17H11318H1FHPCONPOWERCONTROLREGISTER.NOTBITADDRESSABLE.SMOD–––GF1GF0PDIDLSMODDoublebaudratebit.IfTimer1isusedtogeneratebaudrateandSMOD1,thebaudrateisdoubledwhentheSerialPortisusedinmodes1,2,or3.–Notimplemented,reservedforfutureuse.–Notimplementedreservedforfutureuse.–Notimplementedreservedforfutureuse.GF1Generalpurposeflagbit.GF0Generalpurposeflagbit.PDPowerDownBit.SettingthisbitactivatesPowerDownoperationinthe80C51.AvailableonlyinCMOS.IDLIdlemodebit.SettingthisbitactivatesIdleModeoperationinthe80C51.AvailableonlyinCMOS.If1sarewrittentoPDandIDLatthesametime,PDtakesprecedence.Usersoftwareshouldnotwrite1storeservedbits.Thesebitsmaybeusedinfuture8051productstoinvokenewfeatures.80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19956INTERRUPTSTouseanyoftheinterruptsinthe80C51Family,thefollowingthreestepsmustbetaken.1.SettheEAenableallbitintheIEregisterto1.2.SetthecorrespondingindividualinterruptenablebitintheIEregisterto1.3.BegintheinterruptserviceroutineatthecorrespondingVectorAddressofthatinterrupt.SeeTablebelow.INTERRUPTSOURCEVECTORADDRESSIE00003HTF0000BHIE10013HTF1001BHRITI0023HInaddition,forexternalinterrupts,pinsINT0andINT1P3.2andP3.3mustbesetto1,anddependingonwhethertheinterruptistobelevelortransitionactivated,bitsIT0orIT1intheTCONregistermayneedtobesetto1.ITx0levelactivatedITx1transitionactivatedIEINTERRUPTENABLEREGISTER.BITADDRESSABLE.Ifthebitis0,thecorrespondinginterruptisdisabled.Ifthebitis1,thecorrespondinginterruptisenabled.EA––ESET1EX1ET0EX0EAIE.7Disablesallinterrupts.IfEA0,nointerruptwillbeacknowledged.IfEA1,eachinterruptsourceisindividuallyenabledordisabledbysettingorclearingitsenablebit.IE.6Notimplemented,reservedforfutureuse.IE.5Notimplemented,reservedforfutureuse.ESIE.4Enableordisabletheserialportinterrupt.ET1IE.3EnableordisabletheTimer1overflowinterrupt.EX1IE.2EnableordisableExternalInterrupt1.ET0IE.1EnableordisabletheTimer0overflowinterrupt.EX0IE.0EnableordisableExternalInterrupt0.Usersoftwareshouldnotwrite1storeservedbits.Thesebitsmaybeusedinfuture80C51productstoinvokenewfeatures.80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19957ASSIGNINGHIGHERPRIORITYTOONEORMOREINTERRUPTSInordertoassignhigherprioritytoaninterruptthecorrespondingbitintheIPregistermustbesetto1.Rememberthatwhileaninterruptserviceisinprogress,itcannotbeinterruptedbyalowerorsamelevelinterrupt.PRIORITYWITHINLEVELPrioritywithinlevelisonlytoresolvesimultaneousrequestsofthesameprioritylevel.Fromhightolow,interruptsourcesarelistedbelowIE0TF0IE1TF1RIorTIIPINTERRUPTPRIORITYREGISTER.BITADDRESSABLE.Ifthebitis0,thecorrespondinginterrupthasalowerpriorityandifthebitis1thecorrespondinginterrupthasahigherpriority.–––PSPT1PX1PT0PX0–IP.7Notimplemented,reservedforfutureuse.–IP.6Notimplemented,reservedforfutureuse.–IP.5Notimplemented,reservedforfutureuse.PSIP.4DefinestheSerialPortinterruptprioritylevel.PT1IP.3DefinestheTimer1interruptprioritylevel.PX1IP.2DefinesExternalInterrupt1prioritylevel.PT0IP.1DefinestheTimer0interruptprioritylevel.PX0IP.0DefinestheExternalInterrupt0prioritylevel.Usersoftwareshouldnotwrite1storeservedbits.Thesebitsmaybeusedinfuture80C51productstoinvokenewfeatures.80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19958TCONTIMER/COUNTERCONTROLREGISTER.BITADDRESSABLE.TF1TR1TF0TR0IE1IT1IE0IT0TF1TCON.7Timer1overflowflag.SetbyhardwarewhentheTimer/Counter1overflows.Clearedbyhardwareasprocessorvectorstotheinterruptserviceroutine.TR1TCON.6Timer1runcontrolbit.Set/clearedbysoftwaretoturnTimer/Counter1ON/OFF.TF0TCON.5Timer0overflowflag.SetbyhardwarewhentheTimer/Counter0overflows.Clearedbyhardwareasprocessorvectorstotheserviceroutine.TR0TCON.4Timer0runcontrolbit.Set/clearedbysoftwaretoturnTimer/Counter0ON/OFF.IE1TCON.3ExternalInterrupt1edgeflag.SetbyhardwarewhenExternalInterruptedgeisdetected.Clearedbyhardwarewheninterruptisprocessed.IT1TCON.2Interrupt1typecontrolbit.Set/clearedbysoftwaretospecifyfallingedge/lowleveltriggeredExternalInterrupt.IE0TCON.1ExternalInterrupt0edgeflag.SetbyhardwarewhenExternalInterruptedgedetected.Clearedbyhardwarewheninterruptisprocessed.IT0TCON.0Interrupt0typecontrolbit.Set/clearedbysoftwaretospecifyfallingedge/lowleveltriggeredExternalInterrupt.TMODTIMER/COUNTERMODECONTROLREGISTER.NOTBITADDRESSABLE.GATEC/TM1M0GATEC/TM1M0Timer1Timer0GATEWhenTRxinTCONissetandGATE1,TIMER/COUNTERxwillrunonlywhileINTxpinishighhardwarecontrol.WhenGATE0,TIMER/COUNTERxwillrunonlywhileTRx1softwarecontrol.C/TTimerorCounterselector.ClearedforTimeroperationinputfrominternalsystemclock.SetforCounteroperationinputfromTxinputpin.M1Modeselectorbit.NOTE1M0Modeselectorbit.NOTE1NOTE1M1M0OperatingMode00013bitTimer8048compatible01116bitTimer/Counter1028bitAutoReloadTimer/Counter113Timer0TL0isan8bitTimer/CountercontrolledbythestandartTimer0controlbits.TH0isan8bitTimerandiscontrolledbyTimer1controlbits.113Timer1Timer/Counter1stopped.80C51familyprogrammersguideandinstructionsetPhilipsSemiconductors80C51FamilyMarch19959TIMERSETUPTables2through5givesomevaluesforTMODwhichcanbeusedtosetupTimer0indifferentmodes.Itisassumedthatonlyonetimerisbeingusedatatime.IfitisdesiredtorunTimers0and1simultaneously,inanymode,thevalueinTMODforTimer0mustbeORedwiththevalueshownforTimer1Tables5and6.Forexample,ifitisdesiredtorunTimer0inmode1GATEexternalcontrol,andTimer1inmode2COUNTER,thenthevaluethatmustbeloadedintoTMODis69H09HfromTable2ORedwith60HfromTable5.Moreover,itisassumedthattheuser,atthispoint,isnotreadytoturnthetimersonandwilldothatatadifferentpointintheprogrambysettingbitTRxinTCONto1.TIMER/COUNTER0Table2.AsaTimerTMODMODETIMER0FUNCTIONINTERNALCONTROLNOTE1EXTERNALCONTROLNOTE2013bitTimer00H08H116bitTimer01H09H28bitAutoReload02H0AH3Two8bitTimers03H0BHTable3.AsaCounterTMODMODECOUNTER0FUNCTIONINTERNALCONTROLNOTE1EXTERNALCONTROLNOTE2013bitTimer04H0CH116bitTimer05H0DH28bitAutoReload06H0EH3One8bitCounter07H0FHNOTES1.ThetimeristurnedON/OFFbysetting/clearingbitTR0inthesoftware.2.TheTimeristurnedON/OFFbythe1to0transitiononINT0P3.2whenTR01hardwarecontrol.

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