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外文翻译--AT89C2051.doc

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外文翻译--AT89C2051.doc

AT89C2051AT89C2051ISMADEINTHEATMELCORPORATION,WHICHISTHELOWVOLTAGE,HIGHPERFORMANCECMOS8BITMICROCONTROLLER,TABLETSCONTAININGREPEATED2KBYTESOFPROGRAMMEMORYERASABLEREADONLYPEROMANDRANDOM128BYTESDATAMEMORYRAM,DEVICEUSINGATMELSHIGHDENSITY,NONVOLATILEMEMORYTECHNOLOGY,COMPATIBLEWITHTHESTANDARDOFMCS51INSTRUCTIONSET,BUILTCHIP8BITGENERALPURPOSECENTRALPROCESSINGUNITANDREPEATEDLYWRITETHEFLASHMEMORY,WHICHCANEFFECTIVELYREDUCETHEDEVELOPMENTCOSTSAT89C2051FEATURESAPOWERFULSINGLECHIPCANPROVIDECOSTEFFECTIVEINMANYAPPLICATIONSMAINFEATURESCOMPATIBLETHEMCS51COMMANDSYSTEM;CONTAINSTHE2KBMEMORYREPROGRAMMINGFLASH1000;276VVOLTAGERANGE;THEWHOLESTATICWORK0HZ24KHZ;SECRETS2PROGRAMMEMORYLOCK1288BITINTERNALRAM15PROGRAMMABLEI/OLINESTWO16BITTIMER/COUNTER6INTERRUPTSOURCES,TWOEXTERNALINTERRUPTSOURCESPROGRAMMABLESERIALCHANNELHIGHPRECISIONVOLTAGECOMPARATOR(P10,P11,P36);HAVETHEOUTPUTPORTOFTHELEDDIRECTDRIVELOWPOWERIDLEANDPOWERDOWNMODETHEPINPICTUREOFAT89C2051PICTUREONETHEPINOFAT89C2051123456ABCD654321DCBATITLENUMBERREVISIONSIZEBDATE21MAY2009SHEETOFFILED\PROGRAMFILES\DESIGNEXPLORER99SE\LIBRARY\SCH\PROTELDOSSCHEMATICLIBRARIESDDBDRAWNBY20191817161514131211GNDP35P34P33P32XTAL1XTAL2P31P30RSTP37P10P11P12P13P14P15P16P17VCC12345678910AT89C2051’SFUNCTIONALDESCRIPTIONVCCPOWERSUPPLYVOLTAGEGNDLANDP1PORTP1MOUTHISAGROUPOF8BITBIDIRECTIONALI/OINTERFACE,P12P17PROVIDEINTERNALPULLUPRESISTOR,P10ANDP11INTERNALSUPREMEPULLUPRESISTORP1MOUTHOUTPUTBUFFERCANABSORBTHECURRENT20MAANDDIRECTDRIVELEDWHENPROGRAMMINGANDCALIBRATION,P1MOUTHASTHEEIGHTHADDRESSRECEIVEP3MOUTHP3PORTP30P35,P37ISTHEINTERNALPULLUPRESISTORWITHTHESEVENBIDIRECTIONALI/OINTERFACEDIDNOTBRINGOUTTHEP36,ITASAGENERICI/OPORT,BUTCANNOTVISITCANBEUSEDASAFIXEDCHIPINPUTCOMPARATOROUTPUTSIGNALWHENP3WRITE1,THEYWEREHIGHEDTHEINTERNALPULLUPRESISTORCANBERAISEDASANINPUTPORTP3PORTSPECIALFUNCTIONASSHOWNINTABLE1TABLE1P3MOUTH’SSPECIALFEATURES引脚功能特性P30RXD(串行输入口P31TXD(串行输出口)P320INT外中断0P331INT外中断1P34T0定时/计数器0外部输入P35T1(定时/计数器1外部输入)RSTRESETOUTPUTWHENTHEOSCILLATORDEVICERESET,RSTPINTOMAINTAINTHEHIGHLEVELOFTWOMACHINECYCLETIMEXTAL1THERPOSCILLATORAMPLIFIERANDINTERNALCLOCKGENERATORINPUTXTAL2RPOSCILLATOROUTPUTAMPLIFIERTIMEROVERVIEWOFTHETIMER89C2051SINGLECHIPCHIPHASTWO16BITTIMER/COUNTER,THATISTHETIMER0T0ANDTIMER1T1THEYALLHAVEFROMTIMETOTIMEANDEVENTCOUNTFUNCTION,CANBEUSEDFORTIMINGCONTROL,DELAYOFEXTERNALEVENTS,SUCHASCOUNTINGANDTESTINGOCCASIONSTIMER’ST0ANDT1TWO16BITTIMERSINFACTIS16BITCOUNTERPLUS1AMONGTHEM,T0COMPOSITIONEDBYTHETWO8BITSPECIALFUNCTIONREGISTERSTH0ANDTL0;T1POSEDBYTHETH1ANDTL1THESEFUNCTIONSWERECONTROLEDBYTHESPECIALFUNCTIONREGISTERSTMODANDTCONWHENSETTOTHEWORKINTHETIMING,THROUGHTHEPINCOUNTOFTHEEXTERNALPULSESIGNALWHENTHEINPUTPULSESIGNALGENERATEDBYTHEFALLINGEDGEOF10,THEVALUEOFTIMERPLUS1ATOFEVERYMACHINECYCLEDURINGTHES5P2SAMPLINGPINT0ANDT1THEINPUTLEVEL,IFAMACHINECYCLEBEFORESAMPLEVALUEOF1,THENEXTMACHINECYCLESAMPLINGVALUEIS0,THECOUNTERPLUS1SINCETHENDURINGS3P1OFTHEMACHINECYCLE,NEWVALUEWILLINTOTHECOUNTERSODETECTIONOFA10TRANSITIONOFTHETWOMACHINECYCLES,SOTHEMAXIMUMCOUNTFREQUENCYOFOSCILLATIONFREQUENCYOF1/24INADDITIONTOTHEOPTIONOFWORKFROMTIMETOTIMEORCOUNT,EACHTIMER/COUNTERHAVEFOURKINDSOFWORKMODE,THATIS,EACHOFTIMERCIRCUITKINDSOFFOURCONSTITUTEASTRUCTURALMODELTWOLOWPOWERMODEIDLEMODEINIDLEMODE,CPUTOMAINTAINSLEEPANDALLCHIPPERIPHERALSREMAINACTIVE,THISWAYGENERATEDINSOFTWARE,ATTHISPOINT,CHIPRAMANDALLTHECONTENTSOFSPECIALFUNCTIONREGISTERSREMAINUNCHANGEDIDLEMODEWASTERMINATEDBYANYINTERRUPTREQUESTPERMISSIONTOORHARDWARERESETP10ANDP11,INTHENONUSEOFEXTERNALPULLUPRESISTORONTHECASESHOULDBESETTO0,ORINTHEUSEOFPULLUPRESISTORISSETTO1ITSHOULDBENOTEDTHATWHENUSESOFHARDWARERESETTERMINATIONIDLEMODE,AT89C2051ISUSUALLYSTOPPEDFROMTHEPROGRAMUNTILTHEINTERNALRESETCONTROLOFTHETWOMACHINECYCLESBEFORETHERESTOREPROCEDURESERVICEINTHISCASETHEHARDWAREWITHINTHEPROHIBITIONOFTHEREADINGANDWRITINGOFINTERNALRAM,HOWEVER,TOALLOWACCESSTOPORTS,TOELIMINATETHEHARDWARERESETINTHEIDLEMODEOFPORTACCIDENTSMAYWRITE,INPRINCIPLE,TOENTERTHEIDLEMODEOFINSTRUCTIONSHOULDNOTBEUNDERTHECOMMANDOFAPINORANEXTERNALMEMORYPORTFORAVISITPOWERDOWNMODEINPOWERDOWNMODE,THEOSCILLATORTOSTOPWORKING,ENTERTHEPOWERDOWNMODE,INSTRUCTIONS,WHOWASTHELASTONE,THEIMPLEMENTATIONOFTHEDIRECTIVE,CHIPRAMANDALLTHECONTENTSOFSPECIALFUNCTIONREGISTERSTHETERMINATIONOFTHEPREVIOUSPOWERDOWNMODEBEFROZENTOWITHDRAWFROMPOWERDOWNMODEISTHEONLYWAYTORESETTHEHARDWARE,RESETWILLREDEFINEALLTHESPECIALFUNCTIONREGISTERSBUTDOESNOTCHANGETHECONTENTSOFRAMBEFORETHETHEVCCWORKRETURNEDTONORMALLEVELSSHALLBENULLANDVOIDANDMUSTBERESETTOMAINTAINACERTAINPERIODOFTIMEINORDERTORESTARTANDOSCILLATORSTABILITYP10ANDP11INTHENONUSEOFEXTERNALPULLUPRESISTORONTHECASESHOULDBESETTO0,ORINTHEUSEOFPULLUPRESISTORISSETTO1OSCILLATOROSCILLATORCONNECTEDCLIENTXTAL1RPOSCILLATORAMPLIFIERANDINTERNALCLOCKGENERATORINPUTXTAL2RPOSCILLATORAMPLIFIEROUTPUTCHARACTERISTICSOFOSCILLATORXTAL1,XTAL2WARETHERPCHIPOSCILLATORAMPLIFIERINPUTSANDOUTPUTS,QUARTZCRYSTALCANBECOMPOSEDOFTHECLOCKOSCILLATORORCERAMICOSCILLATOR,FORMOREINFORMATIONFROMTHEEXTERNALINPUTCLOCKDRIVERAT89C2051,XTAL1INPUTCLOCKSIGNALFROM,XTAL2SHOULDBELEFTVACANTASTHEINPUTTOTHEINTERNALCIRCUITISA2FLIPFLOP,THEREFORE,THEEXTERNALCLOCKSIGNALINPUTWITHOUTSPECIALREQUIREMENTS,HOWEVER,ITMUSTCOMPLYWITHTHEMAXIMUMLEVELANDMINIMUMNORMSANDTIMING

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