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外文翻译--开发与PLC功能和网络等效的虚拟仪器.doc

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外文翻译--开发与PLC功能和网络等效的虚拟仪器.doc

英文原文JournalofSoftwareEngineeringandApplications,2011,4,172180doi10.4236/jsea.2011.43019PublishedOnlineMarch2011http//www.SciRP.org/journal/jseaDevelopmentofEquivalentVirtualInstrumentstoPLCFunctionsandNetworksMohammadA.K.Alia,TariqM.Younes,MohammadAbuZalataMechatroncisEngineeringDepartment,FacultyofEngineeringTechnology,AlBalqaAppliedUniversity,Amman,Jordan.Emailmakalalia2000yahoo.com,tariqmoghotmail.com,abuzalatayahoo.comReceivedFebruary20th,2011revisedMarch5th,2011acceptedMarch10th,2011.ABSTRACTThisresearchisacontinuationtoourworkwhichwaspublishedin1.EightdifferenttimingVIsaredesignedandtested.TheseincludeONDelay,OFFDelay,SingleShot,RetriggerableMonostable,andAccumulativesoftwarebasedtimers.Usinghardwareprogrammablecounter/timerchipDAQSTC24bitandPCIMIO16E1DAQboard,anothertwoprecisetimersaredesigned.Attheendofthepaper,forillustrationpurposes,anelectropneumaticdrivesystemwasdevelopedandcontrolledutilizingdesignedondelaytimersVIfunctions.ResultsofexperimentshowcompletecoincidencebetweenthePLCbasedcontrolandVirtualPLCbasedprogramresults.KeywordsPLC,VirtualPLC,LabVIEW,ProgrammableTimers1.IntroductionInourworkDesignofavirtualPLCusingLabVIEWwehaveshownhowitispossibletocreateLabVIEWVIswhichrepresentPLCfunctionsandnetworks.WecomparedbetweenPCbasedandPLCbasedcontrolsystems,andcametothefactthatbothsystemsarecontinuouslydevelopinginthesamedirectioninordertoobtainbetterprogrammability,connectivityandcommunicationinterfacing.AtthetimebeingthePCbasedDCSsaresuitedforindustrialapplications.Theyarerobustandtheyeasilyworkinanopenarchitecturemode,whilePLCsareequippedwithspecificMMIsoftwareandpseudostandardcommutationsoftwarealso.WehaveshownthatinordertoimprovetheprogrammabilityofPACs,wepracticallybroughtthePLCtothecomputerutilizingbythatnumerousadvantagesofcomputerssuchasmultitasking,unlimitedmemory,highspeedandthepossibilityofcreatingunlimitednumberofprogrammableobjectssuchascounters,timers,shiftregistersandothers.Becauseofthelimitedsizeofpreviouswork,wewerenotabletocoverotherimportantVIswhichmaybeusedalsoastheanalogofPLCfunctions.InthispaperweshalldevelopdifferenttypesofprogrammabletimersusingLabVIEWsoftware2andNIDAQboardhardwarealso.TheLabVIEWbasicfunctionsthatprovidetimingonmillisecondlevelarethewaitandwaitforNextmsMultipleVIs.Botharebasedonthesameunderlyingmechanism.MostapplicationsworkcomfortablywithavailableLabVIEWmeasurementsthatresolvemilliseconds,andmanymoreoperatewithsecondresolution34.Afewapplicationsdemandsubmillisecondresolutionandresponsetime,whichisproblematicdueprimarilytooperatingsystemandnotaLabVIEWlimitation5.Iftheapplicationrequireshigheraccuracyorresolutionthanthebuiltintimingfunctionscansupply,thenonewillhavetousesomeadditionalhardware,suchasNIDAQboardsoranexternalclock6.NIboardshavetwo24bitcounterchipsandseveralonboardclocksthatcanbecountedtoproduceaccuratetimingintervals.WiththeDAQcountertimerVIs,onecanconfiguretheonboardversatilehardwareforavarietyoftasksincludingtheaccurategenerationoftimedpulses,countingevents,andthemeasurementofperiodsandfrequencies.ThecounteroutputgeneratesapulsewhenapreprogrammedterminalcountTCisreached.Thepulsemaybeusedforsequencingpurposes.SimilarhardwarebasedtimingmaybeperformedusingwindowsAPIfunctionQueryperformancecounter.Thisfunctionlooksatahighresolutionsystemhardwarecounterthatrunsatapproximately1.2MHzor0.8microsecondcount.Theactualresolution,onceweaccountforthedelayincallingthefunction,willbeconsiderablyless,butstillfarbetterthanonemillisecond.ConcerningRealTimeoperatingsystemsRTOS,theyaredesignedtorunasingleprogramwithveryprecisetiming.Theycanallowtorunloopswithnearlythesamethingeachiterationtypicallywithinmicroseconds.TimingforhardRTOSscanbeperformedusingtheDAQcardsinternalclock,givingbetteraccuracythansoftwaretimingfunctions7.Atthetimebeing,somehardwareplatformsfeatureanonboardFPGA,thatmaybeprogrammedusingLabVIEWFPGAmodule.NIComactRIOandsingleboardRIOareexamples.ThedefaultclockrateofLabVIEWFPGAis40MHz.GeneralFPGAtimingVIs2maygenerateoneclockperiod.Oneshotpulseormeasuretheperiod,pulsewidth,accumulateperiodoveraspecifiednumberofpulsesandcountpulsesoveraspecifiedperiodoftime.NeverthelessFPGAVIsdonotincludereadyOndelaytimers,OFFdelaytimersandmomostableretriggerabletimerswhichfindextensiveapplicationsinPLCsequentialcontrolprograms.Buildingontheabove,thetargetofthisworkistoillustratethedesignofdifferenttypesoftimingVIsusingLabVIEWsoftwareinordertobeusedasprogrammingelementsinvirtualPLCprograms.2.ONDelayTimer1ONDelayTimer1Figure1showsthefrontpanelandtheblockdiagramcomponentsofasoftwarebasedONDelayTimer.Theloopiterationisindicatedinseconds.Becausetheloopiterationstartsfromzero,theincrementfunctionisaddedinordertostartitatone.Sincethewaiticonhas100msdelaybetweeneverytwoiterationsafactorof10ismultipliedbytimerpreassignedvalue,inordertomeasurethetimedelayinseconds.Aftertheapplicationofenablesignalittakessomedelaytimeintervalfortheequalfunctiontohaveatruestateattheoutput.Iftheinputsignalisdisabled,thetimeroutputinstantlychangestolowstate.2ONDelayTimer2ThecomponentsoftheVIareshownintheblockdiagram,Figure2.Initiallytheinputsignalisnotenabledandthefalsecaseisactivated.Theoutputofselecticonwillbezero,whichislowerthanthetimerpresetvalue,andasaresultofthattheoutputofthetimerisOFF.Whentheinputsignalisenabledthetruecaseisexecutedandtheselecticonwilloutputthevaluethatcomesformtheoutputofthecasestructure.Theinitialvalueoftheiterationlocalvariableiszero,thenitwillbeincrementedafteradelaycausedbythewaiticon,andthencomparedbytimerpresetvalue.Whentheoutputofthecomparisonfunctionistrue,theoutputofthetimerbecomeshigh.Whentheenableinputsignalbecomeslow,theoutputofthetimerbecomeslowsimultaneously.InthisVI,thecheckingofthecasestructureiscontinuousatascanrateequaltoonemillisecond,whichisacceptedformanyapplications.(a)(b)cFigure1.Ondelaytimer1,aTheBlockDiagrambTheFrontPanelcSubicon3.OFFDelayTime1OFFDelayTimer1ThefrontpanelandblockdiagramareshowninFigure3.ThewhileloopandotherVIcomponentsarelocatedinsidethefalsecaseofthecasestructure.Thetruecasehasalocalvariableofthetimeroutput,whichiswiredtotheselectorterminal.Theenableinputsignalisconnectedtotheselectorterminalofthefalsecase.2OFFDelayTimer2TheblockdiagramisgiveninFigure4.Whentheinputisenabledthetruecaseisactivatedandtheselecticonwillbeselectedtozero.Inthiscasetheoutputofthecomparisonfunctionisfalseandthetimeroutputistrue.Whentheinputsignalisdisabledthefalsecaseexecutes,andtheselecticonisselectedtothevaluethatcomesfromtheoutputofthecasestructure.Whentheoffdelaytimeintervalelapsestheoutputofthecomparisonfunctionistrueandthetimeroutputisfalse.a

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