51 单片机03.chapter 3 instruction system

Chapter 3 : Instruction systemMicrocontroller Principle and Application主讲教师：黄英 1Contents: 3.1 Instruction format and Addressing Modes3.2 Instruction Introduction Chapter 3 Instruction system2 Assemble Language: symbolic language Assembler: A computer program used to assemble Source Program Assembler Object program（ Source codes） （ Machine codes） Instruction Set: can not transplant directlyChapter 3 Instruction system3.1 Instruction format and Addressing Modes33.1 Instruction format and Addressing Modes3.1.1 Instruction format Instruction = opcode operand= opcode destination operand, source operand Instruction types:1-byte Instruction: includes opcode and operand2-byte Instruction: 1th byte is opcode 2th byte is operand3-byte Instruction: 1th byte is opcode 2th, 3th byte are operands43.1 Instruction format and Addressing Modes Addressing: how to get the location of (source) operand. Addressing Modes: 7 types 1. Register Addressing2. Direct Addressing3. Register Indirect Addressing4. Immediate Constants Addressing5. Indexed Addressing6. Boolean Addressing 3.1.2 Addressing Modes7. Relative Addressing （ get the jumping destination address of PC ） 53.1.2 Addressing Modes1. Register Addressing Operand: denoted by register.For example: MOV A, R0 Addressing Range: General register: 4 banks 8（ R0 R7 ） 32 registers Some SFRs: A, AB, DPTR, etc.63.1.2 Addressing Modes Operand: denoted directly by 8-bit address. For example: MOV A, 3AH Addressing Range: Lower 128 bytes of internal RAM SFRs2. Direct Addressing73.1.2 Addressing Modes Operand: specifies a register to contain operand address with the prefix “” . Addressing Range: Lower 128 bytes of internal RAM （ 8-bit address ） 64KB of external RAM （ 16-bit address ）3. Register Indirect Addressing address register of 8-bit address: Ri（ i = 0, 1） SP （ PUSH, POP）address register of 16-bit address: DPTRFor example: MOV A, R0MOVX A, DPTR83.1.2 Addressing Modes Operand: specifies the value of a 8-bit or 16-bit constant with the prefix “#” . For example: MOV A, #3AHMOV DPTR, # 0200H4. Immediate Constants Addressing93.1.2 Addressing Modes Only three instruction: MOVC A, A+DPTRMOVC A, A+PCJMP A+DPTR Addressing Range: Program Memory （ ROM）5. Indexed Addressing Program Memory can only be accessed via this mode. Designed for reading look-up tables in Program Memory or executing unconditional jumps. A 16-bit base register （ DPTR or PC） points to the base address of table, and A is set up with the table entry number. The 16-bit address of the table entry in ROM is formed by adding the A data to the base pointer.103.1.2 Addressing Modes Addressing Range:1. Bit addressable area in Internal RAMcell address: 20H2FH, bit address: 00H7FH 2 ways to specifies the addressing bit: Cell address + bit: 20H.6 Bit address: 06H 6. Boolean Addressing2. Addressable bit in SFRs 4 ways to specifies the addressing bit SFR symbol + bit: PSW.5 Bit address: 0D5H Cell address + bit: 0D0H.5 Bit name: F0 113.1.2 Addressing Modes offset Range: - 128（ backward） + 127（ forward） 7. Relative Addressing Used for getting the jumping destination address of PC in Jump Instruction.Destination address = PC + relPC = （ address + byte number ） of Jump instructionrel = 8-bit relative offset byteReturn12Chapter 3 Instruction system3.2 Instruction IntroductionData transfer instructions Arithmetic instructionsLogical instructionsJump instructions Boolean instructionsPort Access instructions The symbol meaning of Instruction formatReturn133.2 Instruction Introduction3.2.1 The symbol meaning of Instruction formatReturn143.2 Instruction Introduction General format:MOV , Source operand: A, Rn, Direct address, Indirect address register, #data, #data16Destination operand: A, Rn, Direct address,Indirect address register 3.2.2 Data transfer instructions15 8-bit data:MOV A, #data MOV A, 00HMOV direct, #data MOV 3CH, 0FFHMOV Rn, #data MOV R5, 0FHMOV Ri, #data MOV R1, 0CH 16-bit data:MOV DPTR, #data16 MOV DPTR, 0200H3.2.2 Data transfer instructions1. Data Transfer of internal RAM(1) Transfer immediate Constants16MOV direct2, direct1 MOV 50H,30HMOV direct, Rn MOV 32H, R1MOV Rn, direct MOV R0, 33HMOV Ri, direct MOV R1, 0D0H 3.2.2 Data transfer instructions(2) Transfer data among internal RAM cells17MOV A, Rn MOV A, R3MOV Rn, A MOV R2, AMOV A, direct MOV A, 0E0HMOV direct, A MOV 30H, AMOV A, Ri MOV A, R0MOV Ri, A MOV R1, A 3.2.2 Data transfer instructions(3) Transfer data by A18(1) Transfer data by DPTRMOVX A, DPTR MOVX DPTR, A (2) Transfer data by Ri MOVX A, Ri MOVX Ri, A They are Read/Write instructions of external RAM.3.2.2 Data transfer instructions2. Data Transfer of external RAM19MOVC A, A+DPTR MOVC A, A+PC Read instructions of program memory. Indexed addressing mode Designed for reading look-up tables in Program Memory3.2.2 Data transfer instructionsFor example: PC A2000 HBA: INC A ; 2001 01H2001 MOVC A, A+PC ; 2002 30H2002 RET ; 2003 2003 DB 30H 2004 DB 31H2005 DB 32H 3. Data Transfer of Program Memory20XCH A, Rn XCH A, directXCH A, RiXCHD A, Ri ;（ A3A0） （ Ri3Ri0）SWAP A ; （ A3A0） （ A7A4） 3.2.2 Data transfer instructions4. Data Exchange InstructionFor example: MOV R0, #20H ; R0 = 20HMOV A, #3FH ; A = 3FHMOV 20H, #75H ; （ 20H） = 75H XCHD A, R0 ; A = 35H, （ 20H） = 7FHSWAP A ; A = 53H 21PUSH direct ; SP SP+1, （ SP） （ direct）POP direct ; （ direct） （ SP） , SP SP - 1 3.2.2 Data transfer instructions5. Stack operation InstructionReturn223.2 Instruction Introduction For unsigned constants Including the following 7 types: 3.2.3 Arithmetic Instructions1. Addition Instructions2. Addition Instructions with carry bit3. Subtraction Instructions with carry bit4. Increment Instructions5. Decrement Instructions6. Multiplication/Division Instructions7. Decimal-Adjust Instructions 233.2.3 Arithmetic InstructionsADD A, Rn ADD A, R6ADD A, direct ADD A, 30HADD A, Ri ADD A, R1 ; A A +（ R1） ADD A, #data ADD A, #0FH1. Addition Instructions Affect PSW （ P51）If bit 3 has carry bit, then AC=1, else AC=0.If bit 7 has carry bit, then CY=1, else CY=0.If bit 6 has carry bit but not bit 7, orIf bit 7 has carry bit but not bit 6, then OV=1, else OV=0. 24Assumed that: 40H,41H cells have two addends respectively . Requirement: Design a program to put the addition result into 42H cell. For example: 3.2.3 Arithmetic InstructionsMOV R0, #40H MOV A, R0 INC R0ADD A, R0INC R0MOV R0, A ; R0 = 40H ; A = （ 40H） ; R0 = 41H; A = （ 40H）（ 41H）; R0 = 42H; （ 42H） A 253.2.3 Arithmetic InstructionsADDC A, Rn ADDC A, R6 ; A A + R6 + CY ADDC A, direct ADDC A, 30HADDC A, Ri ADDC A, R1 ; A A +（ R1） + CY ADDC A, #data ADDC A, #0FH2. Addition Instructions with carry bit263.2.3 Arithmetic InstructionsMOV R0, #20H MOV R1, #2AH MOV R2, #03HCLR CLOOP: MOV A, R0ADDC A, R1MOV R0, AINC R0INC R1DJNZ R2, LOOPCLR AADDC A, #00HMOV R0, A For example: 3-byte unsigned constants addition Assumed that: 20H22H cells of internal RAM have three augends respectively （ beginning with lower bytes） , 2AH2CH cells of internal RAM have three addends respectively（ beginning with lower bytes） . Requirement: Design a program to put the addition result into 20H22H cells （ beginning with lower bytes） , and the carry bit into 23H cell. 12 34 56+ AB CD EF 20H: 56