机器人-摄像头-008-ds_7135_7635 24.doc

omniisiontmadvanced informationpreliminary datasheetov7635 color cmos vga (640 x 480) camerachiptmov7135 b&w cmos vga (640 x 480) camerachiptmgeneral description the ov7635 (color) and ov7135 (black and white) cmoscamerachipstm are single-chip video/imaging cameradevices designed to provide a high level of functionality ina single, small-footprint package. the devices incorporatea 640 x 480 image array capable of operating at up to 30frames per second (fps). proprietary sensor technologyutilizes advanced algorithms to cancel fixed patternapplications cellular and picture phonestoyspc multimediapdaskey specifications noise (fpn), eliminate smearing, and drastically reduceblooming. all required camera functions includingarray sizevga640 x 480qvga320 x 240exposure control, gamma, gain, white balance, colorpower supply3.3vdc + 10%matrix, color saturation, hue control, windowing, andmore, are programmable through the serial sccbpowerrequirementsactive 25 mastandby 10 ainterface. the device can be programmed to provideimage output in different 8-bit formats.electronics exposureup to 648:1 (for selected fps)output formatycbcr 4:2:2, rgb 4:2:2 andfeatures 326,688 pixels, 1/4 lens, vga/qvga formatwide dynamic range, anti-blooming, zero smearinginterlaced/progressive scan8-bit data output formats:max. imagetransfer ratemin. illumination(3000k)rgb raw datalens size1/4vga30 fpsqvga60 fpsov7635 5 lux f1.2ov7135 48 db (agc off, gamma = 1)ycbcr 4:2:2 itu-656rgb 4:2:2rgb raw datawide dynamic range, anti-blooming, zero smearingelectronic exposure/gain/white balance controlimage quality controls - brightness, contrast, gamma,saturation, sharpness, windowing, hue, etc.internal and external synchronizationline exposure option3.3-volt operation, low power dissipation 25 ma active power at 30 fps 72 dbscan modeprogressive or interlacedgamma correction0.45/0.55/1.00pixel size5.6 m x 5.6 mdark current 1.9 na/cm2fixed pattern noise 0.03% of vpeak-to-peakimage area3.6 mm x 2.7 mmpackage dimensions.400 in. x .400 in.figure 1 ov7635/ov7135 pin diagram321242322built-in gamma correction (0.45/0.55/1.00)sccb programmable:color saturation, brightness, hue, white balance,exposure time, gain, etc.ordering information productpackageov07635-c02a (color, vga, qvga)clcc-24ov07135-c02a (b&w, vga, qvga)clcc-24pwdn4vref15vref26dovdd7vsync8href9ov7635/ov713510111213141521y120y219y318y417y516y6version 1.2, april 21, 2003proprietary to omnivision technologies1 y0 si o _c si o _d ag n d av dd hv dd pc lk dv d d xc lk 1 re s e t dg n d y7ov7635/ov7135cmos vga (640 x 480l) camerachipomniisionfunctional description figure 2 shows the functional block diagram of the ov7635/ov7135 image sensor. the ov7635/ov7135 includes:image sensor array (664 x 492 resolution)analog signal processordual 10-bit analog-to-digital convertersexposure controlwhite balance controlvideo timing generatorsccb interfacevideo output portsdigital video portzoom video port (zv)figure 2 functional block diagramrgbrvovcsatvccntgammamuxgyodenbvcshpvreqanalog signalprocessorcolumn sense amprgbycbcrmuxmuxbuoadcadcdigitaldataformattervideoporty7:0uv7:0sys-clk1/2image array(664 x 492)video timing generatorhrefpclkvsyncfodd chsyncmirexposuredetectexposurecontrolwhite balancedetectwhite balancecontrol.controlregisterssccbinterface2xvclk1frezproprietary to omnivision technologiesfsinprogfzexagcenawbawbth/sio_1sio_0sbbawbtmversion 1.2, april 21, 2003 ro w s el ec tomniisionimage sensor arraythe ov7635/ov7135 sensor is a 0.25 cmos imagingdevice. the sensor contains approximately 326,688 pixels(664 x 492).figure 3 shows the active regions of thesensor array.figure 3 sensor array regioncolumnrfunctional descriptionthe analog processing block also contains the circuitrythat performs color separation, color correction, automaticgain control (agc), gamma correction, black levelcalibration, knee smoothing, aperture correction,controls for picture luminance and chrominance, and huecontrol for color. the analog video signals are based onthe following formula:y = 0.59g + 0.31r + 0.11bu = b - yv = r - yo 0bgbgbgbgbgbgdummyw1grgrgr2bgbgbg 3grgrgr4 56bgbgbg7grgrgr8bgbgbg9grgrgr10bgbgbg11grgrgrgrgrgrbgbgbggrgrgrbgbgbggrgrgrbgbgbggrgrgrbgbgbggrgrgrdummydummydummyopticalblackdummydummydummydummy480activelineswhere r, g, b are the equivalent color components ineach pixel.ycbcr format is also supported, based on the formulabelow:y = 0.59g + 0.31r + 0.11bcr = 0.713 (r - y)cb = 0.564 (b - y)488bgbgbg489grgrgr490bgbgbg491grgrgrbgbgbggrgrgrbgbgbggrgrgrdummydummydual 10-bit analog-to-digital convertersthe ycbcr/rgb data signal from the analog processingsection is fed to two on-chip 10-bit analog-to-digital (a/d)the color filters are bayer pattern. the primary colorbg/gr array is arranged in line-alternating fashion. of the326,688 pixels 307,200 are active. the other pixels areused for black level calibration and interpolation.the sensor array design is based on a field integrationread-out system with line-by-line transfer and anelectronic shutter with a synchronous pixel read-outscheme.when the column sample/hold circuit has sampled tworows of pixels, the pixel data will shift out one-by-one intoan analog amplifier. the amplifier gain can either beprogrammed by the user or controlled by the internalautomatic gain control circuit (agc). the gain adjustmentrange is 0-24 db.analog signal processorthe amplified signals are then routed to the analogprocessing section where the majority of signalprocessing occurs. specifically, in the channel balanceblock, red/blue channel gain is increased or decreased tomatch green channel luminance level. the adjustmentrange is 54 db. this function can be done manually by theuser or with the internal automatic white balance controller(awb).converters: one for the y/g channel and one shared bythe cbcr/br channels. the converted data stream isfurther conditioned in the digital formatter. the processedsignal is delivered to the digital video port through thevideo multiplexer which routes the user-selected 8-, or4-bit video data to the correct output pins.the on-chip 10-bit a/d operates at up to 12 mhz, and isfully synchronous to the pixel rate. actual conversion rateis related to the frame rate. a/d black-level calibrationcircuitry ensures:black level of y/rgb is normalized to a value of 16peak white level is limited to 240cbcr black level is 128cbcr peak/bottom is 240/16rgb raw data output range is 16/240 note: values 0 and 255 are reserved for sync flag.exposure controlthe algorithm used for the electronic exposure control isbased on the brightness of the full image. the exposure isoptimized for a normal scene that assumes the subjectis well lit relative to the background. in situations wherethe image is not well lit, the automatic exposure control(aec) white/black ratio may be adjusted to suit the needsof the application.version 1.2, april 21, 2003proprietary to omnivision technologies3 0 1 2 3 4 5 658 659 660 661 662 663ov7635/ov7135cmos vga (640 x 480l) camerachipomniisionadditional camerachip functions include:agc that provides a gain boost of up to 24 dbwhite balance control that enables setting of propercolor temperature and can be programmed forautomatic or manual operationseparate saturation, brightness, hue, and sharpnessadjustments allow for further fine-tuning of the picture quality and characteristicsarray is sub-sampled for maximal image quality. only halfof the pixel rate is required when programmed in thismode. both horizontal and vertical pixels are sub-sampledto an aspect ratio of 4:2 as illustrated in figure 5.figure 5 sub-sampling modecolumnrownbgbgbgwhite balance controlthe ov7635/ov7135 camerachip also provides controlover the white balance ratio for increasing/decreasing theimage field red/blue component ratio. the sensorprovides a default setting sufficient for most applications.n+1n+2n+3n+4n+5n+6n+7grbggrgrbggrgrbggrwindowingthewindowing featureofthe ov7635/ov7135camerachips allows user-definable window sizing asrequired by the application. window size setting (in pixels)ranges from 4 x 2 to 640 x 480, and can be positionedanywhere inside the 664 x 492 boundary. note thatmodifying window size and/or position does not changeframe or data rate. the ov7635 camerachip alters theassertion of the href signal to be consistent with theprogrammed horizontal and vertical region. the defaultoutput window is 640 x 480. see figure 4 for detailsfigure 4 windowingskipped pixelsvideo timing generatorin general, the timing generator controls the followingfunctions:frame rate adjustframe divisionframe rate timingframe rate adjustrow startrow endhrefrcolumnowcolumnstartdisplaywindowcolumnendsensor arrayboundaryov7635/ov7135 offers two methods of frame rateadjustment.1.clock prescaler (see “clkrc” on page 22)by changing the system clock divide ratio, the framerate and pixel rate will change together. thismethod can be used for dividing the frame/pixel rate by: 1/2, 1/3, 1/4 1/64 of the input clock rate.2.line adjustment (see “frarh” on page 31 and see“frarl” on page 31)by adding dummy pixel timing in each line, theframe rate can be changed while leaving the pixelrate as is.frame division4sub-sampling modethe ov7635/ov7135 can be programmed to output in320 x 240 (qvga) images. this mode is available forapplications where higher resolution image capture is notrequired. default resolution is 640 x 480 pixels. the entireproprietary to omnivision technologiesthe ov7635/ov7135 frame rate divider can divide livevideo output into a programmed number of time slots inunits of frames. the frame divider does not alter the videodata rate.figure 6 illustrates the operation of the framerate divider. refer to register fsd (see “fsd” on page 25)for details on setting the divider.version 1.2, april 21, 2003 hr e f i i+1 i+ 2 i+3 i+4 i+ 5 i+ 6 i+7 i+8 i+9omniisionfigure 6 frame division examplevsync1 framehrefwhen: fd = 1 fd = 0 fd = 000011hrefwhen: fd = 1 fd = 1 fd = 000011figure 8 slave mode timingtframevsynctvstlinehsynctclkmclknote:1) ths 6 tclk, tvs tlinefunctional descriptionthsframe rate timingdefault frame timing is illustrated infigure 13 andfigure 14. refer to table 1 for the actual pixel rate atdifferent frame rates.2) tline = 1520 x tclk (sxga); tline = 800 x tclk (vga)3) tframe = 1050 x tline (sxga); tframe = 500 x tline (vga)luminance average calculatortheov7635/ov7135provides frame-averagedtable 1 frame and pixel ratesluminance level. access to the data is via the serial controlport. average values are calculated from 128 pixels perframe rage (fps)15107.565line (64 in vga).pclk (mhz)2416129.68note: based on 24 mhz external clock and internal pllon, frame rate is adjusted by the main clock divide method.slave operation modethe ov7635/ov7135 can be programmed to operate inslave mode (default is master mode).when used as a slave device, the ov7635/ov7135changes the hsync and vsync outputs to input pins foruse as horizontal and vertical synchronization inputtriggers supplied by the master device. the master devicemust provide the following signals:1.system clock mclk to xclk1 pin2.horizontal sync mhsync to chsync pin3.vertical frame sync mvsync to vsync pinsee figure 7 for slave mode connections and figure 8 fordetailed timing considerations.figure 7 slave mode connectiony7:0resetthe ov7635/ov7135 includes a reset pin (pin 13 - see“reset” on page 11) that forces a complete hardwarereset when it is pulled high (vcc). the ov7635/ov7135clears all registers and resets them to their default valueswhen a hardware reset occurs. reset can also be initiatedthrough the sccb interface.power-down modetwo methods are available to place the ov7635/ov7135into power-down mode: hardware power-down and sccbsoftware power-down.to initiate hardware power-down, the pwdn pin (pin 4 -see “pwdn” on page 11) must be tied to high (+3.3 vdc).when this occurs, the ov7635 internal device clock ishalted and all internal counters are reset. the currentdraw is less than 10 a in this standby mode.executing a software power-down through the sccbinterface suspends internal circuit activity, but does nothalt the device clock. the current requirements drop toless than 1ma in this mode.chsyncvsyncxclk1ov7635(ov7135)version 1.2, april 21, 2003mhsyncmvsyncmclkmasterdevicesccb interfacethe ov7635/ov7135 provides an on-chip sccb serialcontrol port that allows access to all internal registers, forcomplete control and monitoring of the ov7635/ov7135operation.proprietary to omnivision technologies5ov7635/ov7135cmos vga (640 x 480l) camerachipomniisionrefer to omnivision technologies sccb (serial cameracontrol bus) specification for detailed usage of the serialcontrol port.video output portsthe ov7635/ov7135 has the following ports:digital video portzoom video port (zv)digital video portmsb/lsb swapthe ov7635/ov7135 has an 8-bit digital video port. themsb and lsb can be swapped with the control registers.figure 9 shows some examples of connections withexternal devices.figure 9 connection examplesthe active video period as defined by the href signal.see figure 10 for illustration.figure 10 pclk output only at valid pixelspclkpclk active edge negativehrefpclkpclk active edge positivevsyncpixel output patterntable 2 shows the output data order from theov7635/ov7135. the data output sequence following thefirst href and after vsync is: b0,0 g0,1 b0,2 g0,3b0,648 g0,649. after the second href the output is g1,0r1,1 g1,2 r1,3g1,648 r1,649,etc. iftheov7635/ov7135 is programmed to output vgaresolution data, horizontal and vertical sub-sampling willoccur. the default output sequence for the first line ofoutput will be: b0,0 g0,1 b0,4 g0,5 b0,646 g0,647,. thesecond line of output will be: g1,0 r1,1 g1,4 r1,5 g1,646r1,647.msb y7y6y5y7y6y5lsb y7y6y5y0y1y2table 2r/c0 data pattern123. . .648649y4y3y2y1lsb y0ov7635(ov7135)y4y3y2y1y0externaldevicey4y3y2y1msb y0ov7635(ov7135)y3y4y5y6y7externaldevice0b0,0g0,1b0,2g0,3. . .b0,648g0,6491g1,0r1,1g1,2r1,3. . .g1,648r1,6492b2,0g2b2,2g2,3. . .b2,648g2,6493g3,0r3,1g3,2r3,3. . .g3,648r3,649.default 8-bit connectionline/pixel timingswap 8-bit connection482 b482,0g482,1b482,2g482,3483 g483,0r483,1g483,2r483,3b482,648g482,649g483,648r483,6496the ov7635/ov7135 digital video port can beprogrammed to work in either master or slave mode.in both master and slave modes, pixel data output issynchronous with pclk (or mclk if port is a slave),href and vsync. the default pclk edge for valid datais the negative edge but may be programmed with registercomd6 (see “comd” on page 24) for the positive edge.basic line/pixel output timing is illustrated in figure 11 andfigure 12.to minimize image capture circuitry and conservememory space, pclk output can be programmed withregister comj6 (see “comj” on page 35) to be gated byproprietary to omnivision technologieszoom video port (zv)the zv port is a single-source unidirectional video busbetween a pc card socket and a vga controller. the zvport complies with itu601 timing to allow ntsc decodersto deliver real-ti