通信原理仿真实验报告.doc

通信原理仿真实验报告学 院 通信工程学院 班 级 1401014班 分 组 参 数 姓 名 学 号 目的：（1）熟悉（ ）通信系统的工作原理、电路组成和信息传输特点； （2）熟悉上述通信系统的设计方法与参数选择原则； （3）掌握使用参数化图符模块构建通信系统模型的设计方法； （4）熟悉各信号时域波形特点； （5）熟悉各信号频域的功率谱特点。实验内容一：（1）使用m序列为数字系统输入调试信号，采用正弦载波，码速率及载波频率参见附表； （2）采用模拟调制或数字检控实现2PSK调制； （3）通过相干解调完成2PSK解调，恢复初始m序列； （4）从时域观测各信号点波形，获得接收端信号眼图； （5）观测各信号功率谱；（6）完成串并及并串转换模块设计；实验内容二：（7）通过不少于三个频率正弦信号叠加而成的模拟信号作为系统真实输入信号，并采用PCM编码方法实现数模转换； （8）模拟输入信号转换形成的数字信号通过2PSK调制解调系统实现数字频带传输； （9）通过PCM解码恢复初始模拟信号； （10）从时域重点观测模拟信号点波形； （11）从频域重点观察模拟信号功率谱。方案：通信模拟信号的数字传输通信系统的组成框图如图1所示。系统输入的模拟随机信号 m(t)，经过该通信系统后要较好地得到恢复。 推荐方案：推荐的模拟信号数字频带传输通信系统的组成框图如图2所示。通过PCM方式完成数模与模数变换，采用2/BPSK调制方式完成基本数字频带传输。在2PSK中，通常用初始相位0和p分别表示二进制“1”和“0”。因此，2PSK信号的时域表达式为：即发送二进制符号“1”时（an取+1），e2PSK(t)取0相位；发送二进制符号“0”时（ an取 -1）， e2PSK(t)取p相位（也可以反之）。这种以载波的不同相位直接去表示相应二进制数字信号的调制方式，称为二进制(绝对)相移方式。 已调信号e2PSK(t)典型波形如下图。2PSK信号的调制器原理方框图 模拟调制的方法：2PSK信号的解调器（想干解调）原理方框图和波形图：2PSK仿真结果及分析电路图：时域波形：输入信号：与载波相乘后的波形：经过带通滤波器后的波形：经过低通滤波器后的波形：眼图：输出波形：功率谱图：输入信号：经带通滤波器后的信号：经低通滤波器后的信号：输出信号：带通幅频特性曲线：低通幅频特性曲线:图符参数设置表：编号名称参数0Source: PN SeqAmp = 1 v Offset = 0 v Rate = 14e+3 Hz Levels = 2 Phase = 0 deg Max Rate = 700e+3 Hz32Multiplier: Non ParametricInputs from t0p0 t26p0 Outputs to 6 28 Max Rate = 700e+3 Hz26Source: SinusoidAmp = 1 v Freq = 56e+3 Hz Phase = 0 deg Output 0 = Sine t32 Output 1 = Cosine Max Rate (Port 0) = 700e+3 Hz6Adder: Non ParametricInputs from t32p0 t5p0 Outputs to 7 Max Rate = 700e+3 Hz5Source: Gauss NoiseStd Dev = 100e-3 v Mean = 0 v Max Rate = 700e+3 Hz7Operator: Linear SysButterworth Bandpass IIR 2 PolesLow Fc = 42e+3 Hz Hi Fc = 70e+3 Hz Quant Bits = None Init Cndtn = Transient DSP Mode Disabled Max Rate = 700e+3 Hz8Multiplier: Non ParametricInputs from t7p0 t27p0 Outputs to 10 Max Rate = 700e+3 Hz27Source: SinusoidAmp = 1 v Freq = 56e+3 Hz Phase = 0 deg Output 0 = Sine t8 Output 1 = Cosine Max Rate (Port 0) = 700e+3 Hz10Operator: Linear SysButterworth Lowpass IIR 3 Poles Fc = 14e+3 Hz Quant Bits = None Init Cndtn = Transient DSP Mode Disabled Max Rate = 700e+3 Hz11Operator: CompareComparison = = True Output = 1 v False Output = 0 v A Input = t10 Output 0 B Input = t33 Output 0 Max Rate = 700e+3 Hz33Source: SinusoidAmp = 0 v Freq = 56e+3 Hz Phase = 0 deg Output 0 = Sine t11 Output 1 = Cosine Max Rate (Port 0) = 700e+3 Hz12Operator: SamplerInterpolatingRate = 700e+3 Hz Aperture = 0 sec Aperture Jitter = 0 sec Max Rate = 700e+3 Hz13Operator: HoldLast Value Gain = 1 Out Rate = 700e+3 Hz Max Rate = 700e+3 HzPCM仿真结果及分析：电路图：串并图符参数设置：编号名称参数0Source: SinusoidAmp = 1 v Freq = 1e+3 Hz Phase = 0 deg Output 0 = Sine t3 Output 1 = Cosine Max Rate (Port 0) = 1.3e+6 Hz1Source: SinusoidAmp = 1 v Freq = 500 Hz Phase = 0 deg Output 0 = Sine t3 Output 1 = Cosine Max Rate (Port 0) = 1.3e+6 Hz2Source: SinusoidAmp = 2 v Freq = 800 Hz Phase = 0 deg Output 0 = Sine t3 Output 1 = Cosine Max Rate (Port 0) = 1.3e+6 Hz3Adder: Non ParametricInputs from t0p0 t1p0 t2p0 Outputs to 4 6 Max Rate = 1.3e+6 Hz6Comm: CompanderA-Law Max Input = 5 Max Rate = 1.3e+6 Hz8Logic: ADCTwos Complement Gate Delay = 0 sec Threshold = 500e-3 v True Output = 1 v False Output = 0 v No. Bits = 8 Min Input = -5 v Max Input = 5 v Rise Time = 0 sec Analog = t6 Output 0 Clock = t14 Output 014Source: Pulse TrainAmp = 1 v Freq = 3.25e+3 Hz PulseW = 62.5e-6 sec Offset = -500e-3 v Phase = 0 deg Max Rate = 1.3e+6 Hz1623Operator: SamplerInterpolating Rate = 32.5e+3 Hz Aperture = 0 sec Aperture Jitter = 0 sec Max Rate = 32.5e+3 Hz41Comm: TD Mux No. Inputs = 8 Time per Input = 308e-6 sec Time Slot 0 = t32 Output 0 Time Slot 1 = t33 Output 0 Time Slot 2 = t34 Output 0 Time Slot 3 = t35 Output 0 Time Slot 4 = t36 Output 0 Time Slot 5 = t37 Output 0 Time Slot 6 = t38 Output 0 Time Slot 7 = t39 Output 0 Max Rate = 260e+3 Hz43Operator: HoldLast Value Gain = 1 Out Rate = 1.3e+6 Hz Max Rate = 1.3e+6 Hz45Comm: TD DeMuxNo. Outputs = 8 Time per Output = 308e-6 sec Output 0 = Time Slot 0 t9 Output 1 = Time Slot 1 t9 Output 2 = Time Slot 2 t9 Output 3 = Time Slot 3 t9 Output 4 = Time Slot 4 t9 Output 5 = Time Slot 5 t9 Output 6 = Time Slot 6 t9 Output 7 = Time Slot 7 t9 Max Rate (Port 0) = 162.5e+3 Hz9Logic: DACTwos Complement Gate Delay = 0 sec Threshold = 500e-3 v No. Bits = 8 Min Output = -5 v Max Output = 5 v D-0 = t45 Output 0 D-1 = t45 Output 1 D-2 = t4