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直流母线在中压应用中的综合设计马丁Buschendorf， 马可神户，罗德里戈阿尔瓦雷斯，斯特芬Bernet电力电子集团 德累斯顿技术大学（TUD） 德国德累斯顿 martin.buschendorf TU-dresden.de摘要：在大功率中压变频器的应用中，低电感母线的设计是为了实现快速切换，较高效率，及过电压时的安全操作。本文将，采用PEEC仿真试验台的简化直流母线的分析计算，与最终设计的测量做以比较。它还提供了，在半导体故障及其合力的情况下短路的计算。.引言转换器在所有工作点的高效率和安全操作，是对作为可再生能源（4，5），工业加工，或牵引6的现代转换器（1，2，3）在应用中的主要设计目标的。直流母线的漏电感直接影响IGBT的损耗7。漏电感在关断瞬间的影响尤为重要，关断瞬间的高di/dt结合大量漏电感产生一个电压峰值。这个峰值增大了IGBT的关断损耗，并可能因过电压故障（8，9）毁坏设备。用于保护设备的方法包括有源钳位10和减小电流斜率11。这两种方法通常会增加总的转换损耗和降低效率。因为这些原因，转换器低电感直流母线的设计就显得至关重要。 实现低电感直流母线的一般设计规则如文献12, 13所示：最大限度地减少导体的厚度， 最大限度地提高铜的含量，从而降低电感和电阻 通过大量重叠使用多层母线。本文的重点是，对最多三个串联的4.5 kV/1200AIGBT的中压试验台直流母线的综合设计。直流侧电容为3.25mF时，该系统的最大电压大约是13.5kv与的。为达到这些高能量和电压等级，有串并联连接电容器的电路是必要的。对最小的漏电感和最少量的铜，一个适当直流母线的几何形状是一个“U”形，其中，正负电极在图3a表示。该试验台的一个特点是漏电感可在322 nH的和595nH之间连续变化。.发展现状文献显示了一些直流母线进行计算和模拟的方法。部分元等效电路（PEEC）法与有限元法（FEM）的比较所示于14。在该出版物中，两片之间的成果由PEEC法计算，并和通过有限元分析计算的结果进行比较。该PEEC计算是将棒细分成若干元素，这样它可以看作是直的薄的导体并联。它表明，计算给出的结果一致，但PEEC法更容易和更快。中压变频器叠层母线的设计计算示于13和15。它表明，从一个简单的铜片开始，两个重叠的母线比单一母线的漏电感低得多。在其中，关于更复杂的几何形状和电流分布的多层母线被提及。据指出，母线设计在很大程度上依赖于，所研究的包括孔、穴的拓扑的特定结构，而且要准确预测漏电感，仿真模拟是十分必要的。大功率转换器直流母线的最优化记录在16。因此Simulink模型和PEEC法被用来计算电流分布和考虑集肤效应及磁场的漏电感。叠层母线在大功率转换器应用的研究中被特别提到。文献17表示了如何通过使用PEEC优化一条母线的方法，而且电路解算器仅和固定网格一起使用。它表明，电流平衡导致了漏电感的最小化。在简单结构中，它可由在母线设计中仅增加一条狭缝来完成。在更复杂的结构中，这种直观的方法可能会失败。.数学建模一 漏电感的计算如图1所示，对直流母线设计结构的数学建模可简化为一个单一带状导体。考虑到此带状导体的高度h和长度d比其宽度W和厚度大得多，且忽略顶部和底部边缘上的边界效应，这个问题可简化为二维问题。它可以通过，使用所提出的平而薄的差动导体环路，从而解析地解决，参见图2。图1 直流母线带状导体的简化模型图2 直流母线的二维模型 根据毕奥 - 萨伐尔定律，则磁通密度和磁通量可被确定，其中，是真空磁导率。求解此例的方程，则漏电感计算为，机械设计提出的几何形状几何形状，如图1所示，最小宽度W=25mm和最大宽度W=265mm时，分析计算的漏电感所示于表。表 分析计算的漏电感这种方法的优点是使估算漏电感变得简单。最显著的缺点是，大幅度简化了机械设计且忽略了边界效应。电流密度，对更高频率的集肤效应和带状导体的高度也未代表。特别是对带状导体两个长边之间的短距离来说，有一个无边界效应的，几乎均匀的磁场的假设是比较好的。然而，由于磁耦合，在两个相对面板之间电流的均匀变得更重要。在铜板之间的长距离，假设和实际的偏差更加重要。该磁场和由分析计算给出的并不相同。因此，由于带状导体顶部和底部的不均匀，导致计算漏电感的假性降低。二 短路电流和磁力的计算 直流短路时，直流母线的机械力与设计极为相关。直流母线的固有振动频率可用漏电感的最小计算值和直流连接电容计算。直流应用里瞬态短路电流的最大振幅是18:根据18，是母线和电容的电阻值，是冲击系数。计算两个平行导体的洛伦兹力F并考虑材料属性，可计算出直流母线的厚度是其中是动态对静态弯曲应力比. 是主要导体应力系数，是形状系数，它可以在19中找到，是两个支撑点之间的最大距离，是直流母线的高度，是短路时最大变形为0.2时，0.2 - 铜的明显拐点。短路的数学计算和它的合力对简单方程有益。其缺点与它冲突，即考虑这几个方面影响的耦合。.采用PEEC的模拟 为了更好的估计直流母线的实际漏电感，我们将之前提到的PEEC法几乎未简化的来模拟此漏电感。仿真工具被应用于此。它包含20:集肤效应，邻近效应， 边界效应和 连接电阻。给母线搭配更精确的模型，则漏电感结果应更为准确。它还提供了一个全球性的解决方案，即允许对这个问题从总体上考虑漏电感，短路计算和磁力。图3 直流母线的机械设计 a）CAD草图 b） 采用的PEEC网格 c）电流密度图3示出了直流母线机械设计的CAD草图（图3a）和PEEC网格图（图3b），包括为了绝缘而必要的孔，为电容器和IGBT的前方端子串并联的板层。这个仿真模型提供了一个阻抗矩阵，它允许在该配置中，直流母线不同部分漏电感的计算。图3c给出了直流母线在时电流分布的仿真结果。对最终的仿真，电容器之间的距离可以从变化到。表中几个距离下模拟漏电感的结果示于如下的分析计算中。表 采用PEEC模拟的漏电感 最小和最大距离的计算结果是相比于漏电感的解析计算，-7的最小距离的的和49的最大距离间的差异为我们所注意。这些差异是由于数学模型的简化造成的。尤其是短距离并行母线（）和长距离非均匀磁场在结果中引起了这些差异。正如已经提到的，由于母线顶部和的底部的边界效应，仿真中长距离的漏电感明显高于分析计算的漏电感。在图3c中可以看出，正如假定的分析计算，电流密度是不均匀的。在铜母线的前端，电流密度因导体宽度的减小而剧烈增加。这种影响不是能由分析计算表示。电容器端子电流密度的增加不能由在0段的简单带状导体表示。这两种影响导致漏电感的增加。. 实验验证测量是去核实分析计算，更准确的说是去核实模拟结果。测试电路和最终的机械结构示于图4，直流电容器充电到60v，并被两个 21.7kv/2.4 kA的IGBT短路。因此，直流电容器和电感的谐振电路振荡。其中电压和电流采用10 GS / s的示波器，600MHz低电压探针和16 MHz的Rogowski线圈测量，见图5。考虑到阻尼和短路电流频率，漏电感可计算为：图4 a)漏电感的测量电路 b）最终机械设计漏电感在几个距离下的测量值于表和图6可观察到。该过程被重复数次，结果是几次测量的算术平均值。表 漏电感测量值图5 ,时的电流电压测量值集电极 - 发射极电压，集电极电流图6 相比于电容器之间的距离的漏电感，分析计算，模拟，测量 可以看出，在大距离时，测量和模拟漏电感值间的差别小于10。很明显，PEEC法非常适合估计该试验台的母线漏电感。对短距离，测量漏电感明显小与模拟结果。可以假定，母线片之间距离短的接触电压降的影响比距离长的更相关。因此，阻尼常数增加且漏电感减小。这种情况的问题是如何在实际结构中有力的拧紧螺丝在下影响强。若不失败，实验设计的漏电感值总是比理想电气联系下的模拟值低一点。此外，PEEC模拟使得在各种情况下的估计值有低于10的错误率，相比与解析计算而言，这是一个巨大的进步。.结论文中给出了，确定一台中等电压试验台或一台变换器直流母线漏电感方法的概述。它展示了使用简化机械设计漏电感的解析计算。也计算出短路电流和机械强度。它将使用仿真程序PEEC分析的计算结果，和直流母线最终结构在各部分间不同距离的测量值做以比较。测量和解析计算之间的比较表明，因为机械设计的必要简化及边界效应的忽略为，所以解析结果只是对大约的粗略估计。对于较小的距离计算漏电感过高（），对较大的距离计算漏电感过低（）。预定义为机械直流连接时，此模拟和它相比给出了一个相当不错的结果。对于小距离，模拟和测量漏电感值之间的差异降低到，且对于较大的距离，此值降低到。.参考文献1 罗德里格斯,J.;Bernet,S.;吴斌;Pontt ,JO.;航路，S.;,“工业中压变频器多级电压源转换器的拓扑结构，” 工业电子， IEEE学报，第54卷，第6期， pp.2930 -2945 ， 2007年12月 2 航路，S.;马林诺夫斯基，M.;戈帕库玛，K.;宝， J.; Franquelo，LG ;吴斌;罗德里格斯， J.;佩雷斯，MA;莱昂，姬; ，“多电平变换器的新进展和工业应用，”工业电子，IEEE学报， 第57卷，8号，pp.2553 -2580 ，2010年8月 3 阿布 - 擦，H.;霍尔茨，J.;罗德里格斯， J.;葛宝明; ，“中压多电平换器艺术现状，挑战，以及在工业应用的要求，”工业电子，IEEE学报，第57卷，8号，pp.2581 -2596， 2010年8月 4 卡拉斯科，JM ; Franquelo，LG ; Bialasiewicz，JT ;高尔文，E.;Guisado，RCP，;普拉斯，Ma.AM ;莱昂，姬;莫雷诺 - 阿方索，N.;,“可再生能源并网：一项调查的电力电子系统，” 工业电子，IEEE学报，第53卷，第4期，pp.1002 -1016，2006年6月 5 ahavi，JSA ; Kanagapriya，T.; Seyezhai，R.;，“可再生能源交错式升压转换器的设计与分析，”计算机，电子和电气技术（ ICCEET ），2012年国际会议，第53卷，第4期，p.447 - 451，2012年3月21-22日 6 Bernet，S.; ，“大功率转换器在工业和牵引应用的近期发展，”电力电子技术， IEEE学报，第15卷，第6期，pp.1102 -1117 ，2000年11月 7 阿尔瓦雷斯，R.; Filsecker，F.; Bernet，S.;，“中压转换器新4.5kv压力包SPT + IGBT的描述，”能源转换会议博览会，2009 。ECCE2009 。IEEE学报，pp.3954 - 3962，2009年9月20-24日 8 阿尔瓦雷斯，M. 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Le Floch, S. Cadeau-Belliard, J.-P. Gonnet and V. Mazauric, Onthe InCa trail.,Flux Magazine, pp. 10-11, 1 June 2006.Comprehensive Design of DC Busbars for Medium Voltage Applications Martin Buschendorf, Marco Kbe, Rodrigo Alvarez, Steffen Bernet Power Electronics Group Technical University of Dresden (TUD) Dresden, Germany martin.buschendorftu-dresden.de AbstractIn high power medium voltage converter applications a low inductance busbar is designed in order to achieve fast switching, high efficiency and safe operation with low overvoltage. This paper compares an analytical calculation of a simplified DC busbar of a test bench with a PEEC simulation and the measurement of the final design. It also provides the short circuit calculation in case of semiconductor failure and its resulting forces. I. INTRODUCTION High efficiency and safe operation of the converter at all operating points are the main design goals for modern converters ( 1, 2, 3) in applications as regenerative energy ( 4, 5), industrial processes, or traction 6. The stray inductance of the DC busbar directly influences the IGBT losses 7. The effect of the stray inductance is particularly important during the turn-off transient where a highcombined with a large stray inductance results in a voltage peak. This peak increases IGBT turn off losses and could even destroy the device due to overvoltage failure ( 8, 9). Methods used to protect the device include active clamping 10 and reduction of the current slope 11. Both methods typically increase total converter losses and reduce efficiency. For these reasons the design of a low inductive DC busbar becomes essential for the converter. Some general design rules to achieve a low inductance DC busbar are shown in 12, 13: minimize conductor thickness, maximize copper volume, which decreases inductance and resistance and use multilayer busbars with a high amount of overlap. This paper is focused on the comprehensive design of the DC busbar for a medium voltage test bench for the series connection of up to three 4.5 kV/1200 A IGBTs. The maximum voltage of the system is about 13.5 kV with a DC-link capacitance of 3.25 mF . To reach these high energy and voltage levels a circuit of series and parallel connected capacitors is required. For minimal stray inductance and also minimal amount of copper, a proper DC busbar geometry is a “U”-form, where the plus and minus poles are at the front- see Figure 3a. A special feature of the test bench is the continuously variable stray inductance between 322 nH and595 nH . II. STATE OF THE ART The literature shows some methods for calculation and simulation of DC busbars. The Partial Element Equivalent Circuit (PEEC) method compared to Finite Element Method (FEM) is shown in 14. In this publication the effort between two sheets is calculated with PEEC method and compared to the result calculated by a FEM-analysis. The PEEC calculation is made by subdividing the bars into several elements, which can be seen as straight thin conductors in parallel. It was shown that the computation gives coherent results, but the PEEC is easier and quicker. The design calculation of a laminated busbar for a medium voltage inverter is presented in 13 and 15. It is shown that starting from a simple copper sheet two overlap busbars have a much lower stray inductance than a single one. For a more complex geometry and current distribution multilayer busbars are mentioned. It is stated that the busbar design strongly depends on the specific structure of the investigated topology including holes and apertures, and that simulation is necessary to accurately predict the stray inductance. The optimization of a DC busbar for high power converters is documented in 16. Therefore a simulink model and the PEEC method are used to calculate the current distribution and stray inductance with skin effect and magnetic fields in mind. Especially laminated busbars are mentioned in the investigated high power converter application. In 17 a methodology is shown for how a busbar can be optimized by using the PEEC and only the circuit solver is used with a fixed meshing. It is shown that a current balancing leads to a minimization of the stray inductance. In simple structures this can be made by simply adding a slit into the busbar design. In more complex structures this intuitive approach can fail. III. MATHEMATICAL MODELING A. Calculation of the stray inductance For the mathematical modeling the DC busbar design structure was simplified to a single conductor ribbon as it is shown in Figure 1. Considering that the heightand lengthof the ribbon are much larger than its widthand thickness and neglecting the boundary effects on the top and bottom edge, the problem can be simplified into two dimensions. This can be analytically solved by using a differential flat and thin conductor loop of the proposed ribbon, see Figure 2. Figure 1 Simplified DC busbar as a conductor ribbon Figure 2 Two dimensional model of the DC busbar Using the Biot-Savart law the magnetic flux densityand the magnetic fluxcan be determined whereis the magnetic vacuum permeability. Solving the equation for this example the stray inductance can be calculated as For the proposed geometry of the mechanical design, as shown in Figure 1, the analytical calculated stray inductance for a width distance of =25 mm and =265 mm are shown in TABLE I . The advantage of this method is the simplicity to estimate the stray inductance. The most significant disadvantages are the substantial simplifications of the mechanical design and the neglect of the boundary effects. The current density, skin effect for higher frequencies and the height of the ribbon are not represented. Especially for short distances between the two long sides of the conductor ribbon the assumption to have a nearly homogenous magnetic field without boundary effects is comparatively good. However, due to magnetic coupling, homogenous current in these two facing plates become more important. The deviation between assumption and reality is more important for long distances between the copper plates. The magnetic field is not as homogenous as given by the analytical calculation. Hence the inhomogeneity on the top and the bottom of the ribbon leads to a falsely lower calculated stray inductance. B. Calculation of the short circuit current and the magnetic force The mechanical strength of the DC busbar in case of DC-short circuit is extremely relevant for the desighn.With the minimal calculated value of the stray inductance and the DC-link capacitance the natural frequency of the DC busbarcan be calculated. The maximum amplitude of the transient short circuit currentfor DC-applications is 18:whereis the resistance of the busbar and the capacitors and is the shock coefficient,according 18 . Calculating the Lorentz forcefor two parallel conductors and considerig the material attributes the thickness of the DC busbar can be caoculated to Whereis the ratio of dynamic to static bendig stress,is the factor representing the main conductor stress and theis the form factor, which can be found in 19,is the maximal distance between two supporting points,is the height of the DC busbar andis the 0.2%apparent yielding point of the copper where the maximum is 0.2% in case of a short circuit. The mathematical calculation of the short circuit and its resulting force has the advantage of simple equations. In conflict to this the disadvantage is the uncoupled consideratio of the several effects. IV. SIMULATION WITH PEE To achieve a better estimation of the real stray inductance of the DC busbar, it was simulated with nearly no simplification by the already mentioned PEEC method .The simulation tool InCa3D is used for this. It contains20: skin effect, proximity effect, boundary effects and connection resistances. Paired with a more precise model of the busbar,the results for the stray inductance should be much more exact.It also provides a global solution methodology which allows a general view on the problem considering stray inductance,short circuit calculation and magnetic force. Figure 3 Mechanical design of the DC busbar a) as CAD sketch b) as PEEC grid in InCa3D c) current density Figure 3 shows the mechanical DC busbar design as CAD sketch (Fig. 3a) and PEEC grid(Fig.3b) including the necessary holes for insulation, the layers of the plates for the parallel and series connection of the capacitors and the IGBT terminals in front. This simulation model delivers an impedance matrix which allows the calculation of the stray inductance of the diverse parts of the DC busbar in this configuration. Figure 3c presents the simulation results of the current distribution for the DC busbar with .For the final simulation, the distance between the capacitors can be varied from up to . In TABLE II the simulated stray inductance which results for several distances are shown following the analytical calculation. The results for minimum and maximum distance are Compared to the analytical calculation of the stray inductance a difference of 7% at the minimum distance and 49% + at maximum distance is observed. These differences are due to the simplifications of the mathematical model. Especially the parallel busbars at short distances ( 25 mm w = ) and the inhomogeneous magnetic field at large distances induce these differences in the results. As already mentioned, the stray inductance for large distances is distinctly higher in the simulation compared to the analytical calculation because of the boundary effects on top and bottom of the busbar. It also can be seen in Figure 3c, that the current density is not homogenous, as assumed for the analytical calculation. On the front end of the copper busbar the current density increases strongly because of a reduced conductor width. This effect is not represented by the analytical calculation. Also the increase of current density on the terminals of the capacitors are not represented by the simple conductor ribbon in section 0. Both effects lead to an increase of stray inductance. V. EXPERIMENTAL VERIFICATION Measurements have been made to verify the analytical calculations or rather the simulation results. The test circuit and the final mechanical construction are shown in Figure 4. The DC capacitors where charged up to 60 V and short circuited by two 1.7 kV / 2.4 kA IGBTs. Hence the resonant circuit of DC capacitor and inductance oscillates. The voltage and current where measured with a 10 GS/s oscilloscope with a 600 MHz low-voltage probe and a 16 MHz Rogowski coil, see Figure 5. Considering the dampingand the frequencyof the short circuit current the stray inductance can be calculated as: Figure 4a) Test circuit for measuring the stray inductance b) final mechanical design The stray inductance has been measured for several distances as can be observed in TABLE III and Figure 6. The procedure was repeated several times and the results are the arithmetic mean of the several measurements.Figure 5 Current and voltage of the measurement U DC = 50 V, = 3,25 mF collector-emitter voltage, collector current Figure 6 Stray inductance in comparison to the distance between the capacitors, analytic calculation, simulation measurement It can be seen tha