文献翻译——基于单片机的多点温湿度检测系统的设计

第1页外文文献资料BasedonSCMmulti-functionaltemperatureandhumiditytestingsystemdesign1.PrefaceTemperatureandhumidityisanimportantphysicsparameterofhumansocialenvironment,thehumansurvivalandthesocialactivityandthetemperatureandhumidityarecloselyrelated,manyapplicationsinhumanlife,nomatteristhepreservationofbooks,orwarehousemanagement,whetheritisindustrialproduction,orliving,humanbeingshavecertainrequirementsfortemperatureandhumidityintheenvironment,buttherequirementsoftemperatureandhumidityinsomeindustriesmorehigh.so,wetheenvironmentaltemperatureandhumidityinthedetectionandcontrolisparticularlyimportant,temperatureandhumiditydetectionbecomesanimportanttechnologyinthefieldsofmoderntechnology.2.SystemsolutionsThissystemUSESthemonolithicintegratedcircuitAT89C51asthissystem.Thewholesystem,thehardwarecircuitincludingpowersupplycircuit,sensor,thetemperaturedisplaycircuitcircuit,upperalarmcircuit.Thealarmingcircuitcanbemeasuredinuppertemperaturerange,screamingvoicealarm.ThebasicprincipleforthetemperaturecontrolDSl8B20:whenthetemperaturesignalacquisitiontoaftertemperaturesignalsenttohandle,AT89C51temperaturetoLCDscreen,SCMaccordingtoinitializetheuppertemperaturesetting,namely.3.AT89C51SCMareintroducedTheAT89C51isalow-power,high-performanceCMOS8-bitmicrocomputerwith4KbytesofFlashprogrammableanderasablereadonlymemory(PEROM)and第2页128bytesofdatarandom-accessmemory(RAM).ThedeviceismanufacturedusingATMELCo.shigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindustry-standardMCS-51instructionsetandpin-out.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theATMELCo.sAT89C51isapowerfulmicrocomputerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.4.FunctionCharacteristicDescriptionTheAT89C51providesthefollowingstandardfeatures:4KbytesofFlashmemory,128bytesofRAM,32I/Olines,two16-bittimer/counters,afivevectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillatorandclockcircuitry.Inaddition,theAT89C51isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialportandinterruptsystemtocontinuefunctioning.ThePower-downModesavestheRAMcontentsbutfreezestheoscillatordisablingallotherchipfunctionsuntilthenexthardwarereset.5.PinDescriptionVCC:SupplyvoltageGND:GroundPort0:Port0isan8-bitopen-drainbi-directionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashighimpedanceinputs.Port0mayalsobeconfiguredtobethemultiplexedloworderaddress/busduringaccessestoexternalprogramanddatamemory.InthismodeP0hasinternalpullups.Port0alsoreceivesthecodebytesduringFlashprogramming,andoutputsthecodebytesduringprogramverification.Externalpullupsarerequiredduringprogramverification.第3页Port1:Port1isan8-bitbidirectionalI/Oportwithinternalpullups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpullups.Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.Port2:Port2isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpullups.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorywhichuses16-bitaddresses(MOVXDPTR).Inthisapplication,itusesstronginternalpullupswhenemitting1s.Duringaccessestoexternaldatamemorywhichuses8-bitaddresses(MOVXRI).Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.Port3:Port3isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseofthepullups.Port3alsoreceivessomecontrolsignalsforFlashprogrammingandverification.RST:Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.ALE/:AddressLatchEnableoutputpulseforlatchingthelowbytePROGoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput()duringFlashprogramming.InnormaloperationALEisemittedataconstantrateof1/6theoscillatorfrequency,andmaybe第4页usedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeachaccesstoexternalDataMemory.Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.：ProgramStoreEnableisthereadstrobetoexternalprogramPSENmemory.WhentheAT89C51isexecutingcodefromexternalprogrammemory,isactivatedtwiceeachmachinecycle,exceptthattwoPSENactivationsareskippedduringeachaccesstoexternaldatamemory.EA/VPP：ExternalAccessEnable.EAmustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFH.Note,however,thatiflockbit1isprogrammed,EAwillbeinternallylatchedonreset.EAshouldbestrappedtoVCCforinternalprogramexecutions.Thispinalsoreceivesthe12-voltprogrammingenablevoltage(VPP)duringFlashprogramming,forpartsthatrequire12-voltVPP.XTAL1：Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.XTAL2：Outputfromtheinvertingoscillatoramplifier.Ready/:TheprogressofbyteprogrammingcanalsobemonitoredbyBUSYtheRDY/outputsignal.P3.4ispulledlowafterALEgoeshighduringprogrammingtoindicateBUSY.P3.4ispulledhighagainwhenprogrammingisdonetoindicateREADY.OscillatorCharacteristics：XTAL1andXTAL2aretheinputandoutput,respectively,ofaninvertingamplifierwhichcanbeconfiguredforuseasanon-chiposcillator.Eitheraquartzcrystalorceramicresonatormaybeused.Todrivethedevicefromanexternalclocksource,XTAL2shouldbeleftunconnectedwhileXTAL1isdriven.Therearenorequirementsonthedutycycleoftheexternalclocksignal,sincetheinputtotheinternalclockingcircuitryisthroughadividebytwo第5页fliptrigger,butminimumandmaximumvoltagehighandlowtimespecificationsmustbeobserved.IdleMode：Inidlemode,theCPUputsitselftosleepwhilealltheon-chipperipheralsremainactive.Themodeisinvokedbysoftware.Thecontentoftheon-chipRAMandallthespecialfunctionsregistersremainunchangedduringthismode.Theidlemodecanbeterminatedbyanyenabledinterruptorbyahardwarereset.Itshouldbenotedthatwhenidleisterminatedbyahardwarereset,thedevicenormallyresumesprogramexecution,fromwhereitleftoff,uptotwomachinecyclesbeforetheinternalresetalgorithmtakescontrol.On-chiphardwareinhibitsaccesstointernalRAMinthisevent,butaccesstotheportpinsisnotinhibited.ToeliminatethepossibilityofanunexpectedwritetoaportpinwhenIdleisterminatedbyreset,theinstructionfollowingtheonethatinvokesIdleshouldnotbeonethatwritestoaportpinortoexternalmemory.Power-downMode:Inthepower-downmode,theoscillatorisstopped,andtheinstructionthatinvokespower-downisthelastinstructionexecuted.Theon-chipRAMandspecialfunctionregistersretaintheirvaluesuntilthepower-downmodeisterminated.Theonlyexitfrompower-downisahardwarereset.Resetredefinesthespecialfunctionregistersbutdoesnotchangetheon-chipRAM.TheresetshouldnotbeactivatedbeforeVCCisrestoredtoitsnormaloperatinglevelandmustbeheldactivelongenoughtoallowtheoscillatortorestartandstabilize.ProgramMemoryLockBits:Whenlockbit1isprogrammed,thelogiclevelattheEApinissampledandlatchedduringreset.Ifthedeviceispoweredupwithoutareset,thelatchinitializestoarandomvalue,andholdsthatvalueuntilresetisactivated.ItisnecessarythatthelatchedvalueofEAbeinagreementwiththecurrentlogiclevelatthatpininorderforthedevicetofunctionproperly.ProgrammingtheFlash:第6页TheAT89C51isnormallyshippedwiththeon-chipFlashmemoryarrayintheerasedstate(thatis,contents=FFH)andreadytobeprogrammed.Theprogramminginterfaceacceptseitherahigh-voltage(12-volt)oralow-voltage(VCC)programenablesignal.Thelow-voltageprogrammingmodeprovidesaconvenientwaytoprogramtheAT89C51insidetheuserssystem,whilethehigh-voltageprogrammingmodeiscompatiblewithconventionalthirdpartyFlashorEPROMprogrammers.TheAT89C51isshippedwitheitherthehigh-voltageorlow-voltageprogrammingmodeenabled.TheAT89C51codememoryarrayisprogrammedbyte-by-byteineitherprogrammingmode.Toprogramanynonblankbyteintheon-chipFlashmemory,theentirememorymustbeerasedusingthechiperasemode.ProgrammingAlgorithm:BeforeprogrammingtheAT89C51,theaddress,dataandcontrolsignalsshouldbesetupaccordingtotheFlashprogrammingmodetable.ToprogramtheAT89C51,takethefollowingsteps:1.Inputthedesiredmemorylocationontheaddresslines.2.Inputtheappropriatedatabyteonthedatalines.3.Activatethecorrectcombinationofcontrolsignals.4.RaiseEA/VPPto12Vforthehigh-voltageprogrammingmode.5.PulseALE/oncetoprogramabyteintheFlasharrayorthelockPROGbits.Thebyte-writecycleisself-timedandtypicallytakesnomorethan1.5ms.Repeatsteps1through5,changingtheaddressanddatafortheentirearrayoruntiltheendoftheobjectfileisreached.DataPolling:TheAT89C51featuresDataPollingtoindicatetheendofawritecycle.Duringawritecycle,anattemptedreadofthelastbytewrittenwillresultinthecomplementofthewrittendatumonPO.7.Oncethewritecyclehasbeencompleted,truedataarevalidonalloutputs,andthenextcyclemaybegin.Datapollingmaybeginanytimeafterawritecyclehasbeeninitiated.ProgramVerify:IflockbitsLB1andLB2havenotbeenprogrammed,theprogrammedcodedatacanbereadbackviatheaddressanddatalinesforverification.Thelockbitscannotbeverifieddirectly.Verificationofthelockbitsis第7页achievedbyobservingthattheirfeaturesareenabled.ChipErase:TheentireFlasharrayiserasedelectricallybyusingthepropercombinationofcontrolsignalsandbyholdingALE/lowfor10ms.ThePROGcodearrayiswrittenwithall“1”s.Thechiperaseoperationmustbeexecutedbeforethecodememorycanbere-programmed.ReadingtheSignatureBytes:Thesignaturebytesarereadbythesameprocedureasanormalverificationoflocations030H,031H,and032H,exceptthatP3.6andP3.7mustbepulledtoalogiclow.Thevaluesreturnedareasfollows:(030H)=1EHindicatesmanufacturedbyATMEL(031H)=51HindicatesAT89C51single-chip(032H)=FFHindicates12Vprogramming(032H)=05Hindicates5VprogrammingProgrammingInterface:EverycodebyteintheFlasharraycanbewrittenandtheentirearraycanbeerasedbyusingtheappropriatecombinationofcontrolsignals.Thewriteoperationcycleisselftimedandonceinitiated,willautomaticallytimeitselftocompletion.6.ThesensorDS18B20Inthetraditionalanalogsignaldistancetemperaturemeasuringsystem,needgoodsolveleaderrorcompensation,multi-pointmeasurementerrorandamplifyingcircuitswitchingtechnologiessuchaszerodrifterrorproblem,canachievehighmeasuringaccuracy.Anothergeneralmonitoringsiteoftheelectromagneticenvironmentisverybad,allkindsofjammingsignalisstronger,thesimulatedtemperaturesignalinterferenceandvulnerabletoproducemeasurementerrorandmeasuringprecision5.Therefore,intemperaturemeasuringsystem,thestronganti-jammingcapabilityofthenewdigitaltemperaturesensoristhemosteffectivetosolvetheseproblems,comparedwithothertemperaturesensorDSl820hasthefollowingfeatures:(1)theuniquesinglelineinterfaceway.DSl820inconnectionwiththe第8页microprocessoronlyneedoneinterfacetoimplementlineDSl820microprocessorsandtwo-waycommunication.(2)morefunctionsimplifiesdistributedtemperaturedetectionapplication.(3)DSl820inusewithoutanyperipheraldevices.(4)power,voltagerangedataavailablefrom3.0Vto5.5V.(5)canmeasuretemperaturerangefrom-55degreesc+to125,incrementalvalue0.5c,Fahrenheittemperaturerangefrom-67to+257,incrementalvalue0.9.(6)supportmulti-pointnetworkfunction.MultipleDS1820canpickonthesamebusand,moretemperaturemeasurement.(7)9temperatureresolution.Measuringresultsinnineserialtransmissionwaythedigitalquantity.(8)usercansettemperaturealarmthreshold.(9)havesupertemperaturesearchfunction.DSl8B20principleofworkTheinternalstructureofDS18B20DSl8B20temperaturemeasurementprinciplediagramshowninfigure3.2.Lowtemperaturecoefficientgraphoscillationfrequencyvibrationproducttemperatureisusedtoproducewithfixedfrequency,pulsesignaltocounterl.Hightemperaturecoefficientcrystalstemperature-dependentitsoscillationfrequencychangesignificantly.Thesignalgeneratedasthecounter2inputpulses.Counter1,2andtemperatureregistersarecounterin-55degreespresetcorrespondingabasevalue.Counterltolowtemperaturecoefficientofthepulsesignalgeneratedcrystals,whenthecounterforsubtractioncountingthepresetvaluereducedto1,whenthetemperaturecounterOvaluewilladdl,counterthepresetvaluewillbelmanagain,tocounterthelstartlowtemperaturecoefficientofcrystaloscillatorpulsesignal,socyclecountuntilthecounter2,stopcountingtoOaccumulativetemperature,temperatureoftheregisterfortheregisterismeasuredvalues.Figure3.2accumulativeusedfortheslopecompensationandfixedtemperaturemeasurement,theoutputoftheprocessofnonlinearcorrectionislessthanthepresetvaluecounterl.AT89C51interfacemodeandDS18B20ChipDS18B20andtheconnectionhastwokinds:namelyparasiticpowerandexternalpowersupplymode.Parasiticpowerway:intheparasiticpowersupplymode,thesignalfromthesinglechipDS18B20inlinedrawingenergyduringthehighlevelinthe第9页DQenergystoredintheinternalcapacitance,lowlevelinsignalintheenergyconsumedduringthecapacitanceonworkinguntilhigh-levelcomingagaintoparasiticpower(battery).Parasiticpowermodehasthreeadvantages:1)distancemeasuringtemperature,withoutthelocalpowersupply.2)noconventionalpowerintheconditionreadstheROM.3)circuit,withonlyonemoreconciserootI/Orealizetemperaturemeasurement.WanttomakeprecisetemperatureconversionchipDS18B20,I/Olinemustensurethatthetemperatureconversionperiod,duetoprovideenoughenergyconversionintemperatureduringeachDS18B20,whenthecurrent1mAtoworkafewtemperaturesensorinthesameroothangingontheI/Omulti-pointtemperaturemeasurement,onlyby4.7Kandresistancewillnotbeabletoprovideenoughenergy,whichcannotbeswitchovertemperatureorerrors.Theexternalpowersourcesupplyway:intheexternalpowersupplymodes,DS18B20workpowerbyVDDpin,I/Oaccesslinedoesnotneedstrongpullup,thereisnoshortageofelectricitypower,canensureaccuracyandconversioninthebustheorycanbearticulatedmultiplesensorDS18B20,multipointtemperaturemeasuringsystem.ThissystemUSEStheexternalpowersource.ConnectionmethodisonefootgroundingandDS18B202feet(DQ)andAT89C51footanI/Oport,3feetlineup+5V.A89S52intheI/Oportand+5Vconnectionbetweena4.7Kpull-upresistors,toensurethenormaloperationofthedatacollection.Ifyouwanttotestsystem,composedmulti-pointtemperatureinthesamerootchipI/Oportinthesameline,andthemethodofconnectingtheparallelmorepiecesofDS18B20chip7.ThedesignofthesoftwaresystemThissystemUSESAT89C51devicesasthecore,withDSl8B20afterthecollecteddata,andthetemperatureinsidethedatastorageAT89C51deposit,LCDdisplay,andcomparedwiththepriorvalue,andthentheoutputsignalbyMCUcontrolcircuitandalarmcircuitfan.Multi-functionaltemperaturetestingsystemsoftwaremainlyinclude:functiondeclarations,timedelayfunctionandDS18B20initializationfunction,readthetemperature,第10页temperatureDS18B20dataintoaliquidcrystaldisplaycharacterssuchprograms.8.SummaryWiththecontinuousdevelopmentofindustryoftemperatureandhumiditymeasurement,thehigherrequirement,andmoreandmorewidemeasuringrange,soaretherequirementsfortemperaturedetectiontechnologymoreandmoreisalsohigh.DSl8B20introducednewdigitaltemperaturesensorandAT89C51SCM,LCD1602LCDmoduleforconstructingthetemperaturetestingsystem.Thehardwarecircuitandmainprogramandsystemdesignofeachmodulesubroutines.ThissystemUSEStheDALLASisthedigitaltemperaturesensorDS18B20,plusA/Dcanoutputthedigitalquantity,thetemperaturesignaldirectlyconvertserialdigitalsignalprocessingformicrocomputer.Accordingly.Thissystemhasthehardwarecircuitstructureissimple,highprecision,andshowstheresultconversionclearstability,lowcostandsignificantadvantages.Intemperaturemeasurement,suchasgrainofintelligentbuilding,centralairconditioningoftheoccasiontotemperaturetestinghasgoodapplicationprospects.第11页中文翻译稿基于单片机的多点温湿度检测系统的设计1.引言温湿度是人类社会环境中一个重要的物理参数，人类的生存和社会活动与温湿度密切相关，在人类生活中的许多场合，不管是图书保存，还是仓库管理，不管是工业生产，还是居民生活，人类都对环境中的温湿度有一定的要求，然而在某些行业中对温湿度的要求更加高。所以，我们对环境中的温湿度的检测和控制尤为重要，温湿度检测在现代科技领域中也成为一项重要技术。2.系统方案的介绍本系统采用AT89C51作为该系统的单片机。系统整体包括以下的硬件电路，电源电路，温湿度传感器电路，液晶显示电路等。温度控制的基本原理为:当DSl8B20采集到温度信号后，将温度信号送至AT89C51中处理，同时将温度送到LCD液晶屏显示，单片机根据初始化设置的温度上下限进行判断处理。3.关于单片机AT89C51的介绍AT89C51是美国ATMEL公司生产的低电压，高性能COMS8位单片机，片内含4Kbytes的可反复擦写的只读程序存储器（PEROM）和128bytes的随机存取数据存储器（RAM），器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准MCS-51指令系统，片内置通用8位中央处理器（CPU）和Flash存储单元，功能强大AT89C51单片机可为您提供许多高性价比的应用场合，可灵活应用于各种控制领域。4.功能概述特性AT89C51提供以下标准功能：4K字节Flash闪速存储器，128字节内部RAM，32个I/O口线，两个16位定时/计数器，一个5向量两级中断结构，一个全双工串行通信口，片内振荡器及时钟电路。同时，AT89C51可降至0Hz的静态逻辑操作，并支持两种软件可选的节电工作模式。空闲方式停止CPU的工作，但允许RAM，定时/计数器。串行通信口第12页及中断系统继续工作。掉电方式保存RAM中的内容，但振荡器停止工作并禁止其它所有部件工作直到下一个硬件复位5.引脚功能说明VCC：电源电压GND：地P0口：P0口是一组8位漏极开路型双向I/O口，也即地址/数据总线复用口。作为输出口用时，每位能吸收电流的方式驱动8个TTL逻辑门电路，对端口写“1”可作为高阻抗输入端用。在访问外部数据存储器或程序存储器时，这组口线分时转换地址（低8位）和数据总线复用，在访问期间即或内部上拉电阻。在Flash编程时，P0口接收指令字节，而在程序校验时，输出指令字节，校验时，要求外接上拉电阻。P1口：P1是一个带有内部上拉电阻的8位双向I/O口，P1的输出缓冲级可驱动（吸收或输出电流）4个TTL逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。Flash编程和程序校验期间，P1接收低8位地址。P2口：P2是一个带有内部上拉电阻的8位双向I/O口，P2的输出缓冲级可驱动（吸收或输出电流）4个TTL逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。在访问外部程序存储器或16位地址的外部数据存储器（例如执行MOVXDPTR指令）时，P2口送出高8位地址数据。在访问8位地址的外部数据存储器（如执行MOVXRI指令）时，P2口线上的内容在整个访问期间不改变。Flash编程或检验时，P2亦接收高位地址和其它控制信号。P3口：P3口是一组带有内部上拉电阻的8位双向I/O口。P3口输出缓冲级可驱动（吸收或输出电流）4个TTL逻辑门电路。对P3口写入“1”时，它们被内部上拉电阻拉高并可作为输入端口。作输入端时，被外部拉低的P3口将用上拉电阻输出电流（IIL）。P3口还接收一些用于Flash闪速存储器编程和程序校验的控制信号。第13页RET：复位输入。当振荡器工作时，RET引脚出现两个机器周期以上高电平将使单片机复位。ALE/：当访问外部程序存储器或数据存储器时，ALE（地址锁存允许）输出PROG脉冲用于锁存地址的低8位字节。对Flash存储器编程期间，该引脚还用于输入编程脉冲（）。即使不访问外部存储器，ALE仍以时钟振荡频率的1/6输出固定的正脉冲信号，因此它可对外输出时钟或用于定时目的。要注意的是：每当访问外部数据存储器时将跳过一个ALE脉冲。如有必要，可通过对特殊功能寄存器（SFR）区中的8EH单元的D0位置位，可禁止ALE操作。该位置位后，只有一条MOVX和MOVC指令ALE才会被激活。此外，该引脚会被微弱拉高，单