文献翻译——利用TI的MSP430系列的嵌入式系统设计

第1页外文文献资料EmbeddedSystemsDesignusingtheTIMSP430SeriesThisbookisintendedfortheembeddedengineerwhoisnewtothefield,andasanintroductionandreferenceforthoseexperiencedwithmicro-controllerdevelopment,butarenewtotheMSP430familyofdevices.Ihaveassumedthatthereaderhassomeexperiencewithmicrocontroller-baseddesign,eitherprofessionallyoracademically.Asanexample,thebookde-scribesinterruptfunctionalityindetail,butassumesthatyou,thereader,alreadyknowwhataninterruptisandhowtouseit.Itisalsoimportanttonotethat,whilemuchoftheinformationinthisbookisidenticaltothatwhichisavailablefromtheTIdocumentation,thisbookisintendedtosupplement,notreplacethatvaluablesourceofinformation.TheUsersGuidesandApplicationNotestogetherofferadepthandbreadthoftechnicalinformationthatwouldbedifficulttoreplicateinasinglesource.Theintentofthisbookistohighlightsomeofthemostcommonlyusedinformation,alongwithsomehelpfulsuggestionsandrulesofthumb.TheMSP430FamilyTheMSP430familyisabroadfamilyoflowpower,featurerich16-bitmicrocontrollersfromTexasInstruments.Theyshareacommon,RISC-type,NeumannCPUcore.The430iscompetitiveinpricewiththe8-bitcontrollermarket,andsupportsboth8and16-bitinstructions,allowingmigrationfrommostsimilarlysizedplatforms.Thefamilyofdevicesrangesfromtheverysmall(1kROM,128bytesforRAM,sub-dollar)uptolarger(60kROM,2kRAM,withpricesinthe$10range)devices.Currently,thereareatleast40flavorsavailable,withmorebeingaddedregularly.Thedevicesaresplitintothreefamilies:theMSP430x3xx,whichisabasicunit,theMSP430x1xx,whichisamorefeature-richfamily,andtheMSP430x4xx,whichissimilartothe1xx,withabuiltinLCDdriver.Youwillfindthesereferredtoas1xx,3xx,and4xxdevicesthroughoutthisbook.PartNumberingConvention第2页PartnumbersforMSP430devicesaredeterminedbasedontheircapabilities.Alldevicepartnumbersfollowthefollowingtemplate:MSP430MtFaFbMcM:MemoryTypeC:ROMF:FlashP:OTPE:EPROM(fordevelopmentaluse.Therearefewofthese.)Fa,Fb:FamilyandFeatures10,11:Basic12,13:HardwareUART14:HardwareUART,HardwareMultiplier31,32:LCDController33:LCDController,HardwareUART,HardwareMultiplier41:LCDController43:LCDController,HardwareUART44:LCDController,HardwareUART,HardwareMultiplierMc:MemoryCapacity0:1kbROM,128bRAM1:2kbROM,128bRAM2:4kbROM,256bRAM3:8kbROM,256bRAM4:12kbROM,512bRAM5:16kbROM,512bRAM6:24kbROM,1kbRAM7:32kbROM,1kbRAM8:48kbROM,2kbRAM9:60kbROM,2kbRAMExample:TheMSP430F435isaFlashmemorydevicewithanLCDcontroller,ahardwareUART,16kbofcodememory,and512bytesofRAM.Thepartnumberingschemedescribedaboveisabitfragmented.Therearecommonfeaturesnotconsistentlyrepresented(typeofADC,numberoftimers,etc),andtherearesomeotherinconsistencies(forexample,the33family第3页hasthemultiplier,butthe13and43sdonot).Iwouldrecommendagainstselectingpartsbasedontheirnumberingscheme.Rather,onceyouhaveavagueideaofyourrequirements,gototheTIwebsite(www.TI.com),andusetheirparametricsortfeature.Architecture:CPUandMemoryAsdiscussedinchapter1,theMSP430utilizesa16-bitRISCarchitecture,whichiscapableofprocessinginstructionsoneitherbytesorwords.TheCPUisidenticalforallmembersofthe430family.Itconsistsofa3-stageinstructionpipeline,instructiondecoding,a16-bitALU,fourdedicated-useregisters,andtwelveworking(orscratchpad)registers.TheCPUisconnectedtoitsmemorythroughtwo16-bitbusses,oneforaddressing,andtheotherfordata.Allmemory,includingRAM,ROM,informationmemory,specialfunctionregisters,andperipheralregistersaremappedintoasingle,contiguousaddressspace.Thisarchitectureisuniqueforseveralreasons.First,thedesignersatTexasInstrumentshaveleftanawfullotofspaceforfuturedevelopment.AlmosthalftheStatusRegisterremainsavailableforfuturegrowth,roughlyhalfoftheperipheralregisterspaceisunused,andonlysixofthesixteenavailablespecialfunctionregistersareimplemented.Second,thereareplentyofworkingregisters.Afteryearsofhavingoneortwoworkingregisters,Igreatlyenjoyedmyfirstexperiencewiththetwelve16-bitCPUscratchpads.Theprogrammingstyleisslightlydifferent,andcanbemuchmoreefficient,especiallyinthehandsofaprogrammerwhoknowshowtousethisfeaturetoitsfullest.Third,thisarchitectureisdeceptivelystraightforward.Itisveryflexible,andtheaddressingmodesaremorecomplicatedthanmostothersmallprocessors.But,beyondthat,thisarchitectureissimple,efficientandclean.Therearetwobusses,asinglelinearmemoryspace,arathervanillaprocessorcore,andallperipheralsarememory-mapped.CPUFeatures第4页TheALUThe430processorincludesaprettytypicalALU(arithmeticlogicunit).TheALUhandlesaddition,subtraction,comparisonandlogical(AND,OR,XOR)operations.ALUoperationscanaffecttheoverflow,zero,negative,andcarryflags.Thehardwaremultiplier,whichisnotavailableinalldevices,isimplementedasaperipheraldevice,andisnotpartoftheALU(seeChapter6).WorkingRegistersThe430givesthedevelopertwelve16-bitworkingregisters,R4throughR15.(R0throughR3areusedforotherfunctions,asdescribedlater.)Theyareusedforregistermodeoperations(seeAddressingModes,Chapter8),whicharemuchmoreefficientthanoperationswhichrequirememoryaccess.Someguidelinesfortheiruse:Usetheseregistersasmuchaspossible.Anyvariablewhichisaccessedoftenshouldresideinoneoftheselocations,forthesakeofefficiency.Generallyspeaking,youmayselectanyoftheseregistersforanypurpose,eitherdataoraddress.However,somedevelopmenttoolswillreserveR4andR5fordebuginformation.Differentcompilerswillusetheseregistersindifferentfashions,aswell.Understandyourtools.Beconsistentaboutuseoftheworkingregisters.Clearlydocumenttheiruse.Ihavecode,writtenabout8monthsago,thatperformsextensiveoperationsonR8,R9,andR15.Unfortunately,IdontknowtodaywhatthevaluesinR8,R9andR15represent.ThiswascodeIwrotetoquicklyvalidateanalgorithm,ratherthanproductioncode,soIdidntdocumentitsufficiently.Now,itisrelativegibberish.Dontletthishappentoyou.Nomatterhowobviousortrivialregisteruseseems,documentitanyway.ConstantGeneratorsR2andR3functionasconstantgenerators,sothatregistermodemaybeusedinsteadofimmediatemodeforsomecommonconstants.(R2isadualuseregister.ItservesastheStatusRegister,aswell.)Generatedconstantsincludesomecommonsingle-bitvalues(0001h,0002h,0004h,and0008h),zero(0000h),andanall1sfield(0FFFFh).GenerationisbasedontheW(S)value第5页intheinstructionword,andisdescribedbythetablebelow.W(S)valueinR2valueinR3000000h01(0)(absolutemode)0001h100004h0002h110008h0FFFFhProgramCounterTheProgramCounterislocatedinR0.Sinceindividualmemorylocationaddressesare8-bit,butallinstructionsare16bit,thePCisconstrainedtoevennumbers(i.e.theLSBofthePCisalwayszero).Generallyspeaking,itisbesttoavoiddirectmanipulationofthePC.Oneexceptiontothisruleofthumbistheimplementationofaswitch,wherethecodejumpstoaspot,dependentonagivenvalue.(I.e.,ifvalue=0,jumptolocation0,ifvalue=1,jumptolocation1,etc.)ThisprocessisshowninExample3.1.Example3.1SwitchStatementviaManualPCControlMovvalue,R15;puttheswitchvalueintoR15CmpR15,#8;rangecheckingJgeoutofrange;ifR157,donotusePCswitchCmp#0,R15;morerangecheckingJnoutofrange;RlaR15;multiplyR15bytwo,sincePCisalwaysevenRlaR15;doubleR15again,sincesymbolicjmpis2wordslongAddR15,PC;PCgoestoproperjumpJmpvalue0Jmpvalue1Jmpvalue2Jmpvalue3Jmpvalue4Jmpvalue5Jmpvalue6Jmpvalue7OutofrangeJmpRangeError第6页Thisisarelativelycommonapproach,andmostCcompilerswillimplementswitchstatementswithsomethingsimilar.Whenimplementingthismanually(i.e.,inassemblylanguage),theprogrammerneedstokeepseveralthingsinmind:Alwaysdoproperrangechecking.Intheexample,wecheckedforconditionsoutsidebothendsofthevalidrange.Ifthisisnotperformedcorrectly,thecodecanjumptoanunintendedlocation.Paycloseattentiontotheaddressingmodesofthejumpstatements.TheseconddoublingofR15,priortotheaddstatement,isaddedbecausethejumpstatementrequirestwowordswhensymbolicmodeaddressingisused.Becarefulthatnoneofyourinterrupthandlershavethepotentialtoaffectyourvalueregister(R15intheexample).Iftheinterrupthandlerneedstouseoneoftheseregisters,thehandlerneedstostorethevaluetoRAMfirst.ThemostcommonprocedureistopushtheregistertothestackatthebeginningoftheISR,andtopoptheregisterattheendoftheISR.(SeeExample3.2.)Example3.2Push/PopCombinationinISRTimer_A_Hi_InterruptPushR12;WewilluseR12MovP1IN,R12;useR12aswepleaseRlaR12RlaR12MovR12DonewithR12PopR12;RestorepreviousvaluetoR12Reti;returnfrominterruptORG0FFF0hDWTimer_A_Hi_InterruptStatusRegisterTheStatusRegisterisimplementedinR2,andiscomprisedofvarioussystemflags.Theflagsarealldirectlyaccessiblebycode,andallbutthreeofthemarechangedautomaticallybytheprocessoritself.The7mostsignificantbitsareundefined.ThebitsoftheSRare:TheCarryFlag(C)第7页Location:SR(0)(theLSB)Function:Identifieswhenanoperationresultsinacarry.Canbesetorclearedbysoftware,orautomatically.1=Carryoccurred0=NocarryoccurredTheZeroFlag(Z)Location:SR(1)Function:Identifieswhenanoperationresultsinazero.Canbesetorclearedbysoftware,orautomatically.1=Zeroresultoccurred0=NonzeroresultoccurredTheNegativeFlag(N)Location:SR(2)Function:Identifieswhenanoperationresultsinanegative.Canbesetorclearedbysoftware,orautomatically.ThisflagreflectsthevalueoftheMSBoftheoperationresult(Bit7forbyteoperations,andbit15forwordoperations).1=Negativeresultoccurred0=PositiveresultoccurredTheGlobalInterruptEnable(GIE)Location:SR(3)Function:Enablesordisablesallmaskableinterrupts.Canbesetorclearedbysoftware,orautomatically.Interruptsautomaticallyresetthisbit,andtheretiinstructionautomaticallysetsit.1=InterruptsEnabled0=InterruptsDisabledTheCPUoffbit(CPUOff)Location:SR(4)Function:EnablesordisablestheCPUcore.Canbeclearedbysoftware,andisresetbyenabledinterrupts.Noneofthememory,peripherals,orclocksareaffectedbythisbit.Thisbitisusedasapowersavingfeature.1=CPUison第8页0=CPUisoffTheOscillatoroffbit(OSCOff)Location:SR(5)Function:Enablesordisablesthecrystaloscillatorcircuit(LFXT1).Canbeclearedbysoftware,andisresetbyenabledexternalinterrupts.OSCOffshutsdowneverything,includingperipherals.RAMandregistercontentsarepreserved.Thisbitisusedasapowersavingfeature.1=LFXT1ison0=LFXT1isoffTheSystemClockGenerator(SCG1,SCG0)Location:SR(7),SR(6)Function:Thesebits,alongwithOSCOffandCPUOffdefinethepowermodeofthedevice.TheOverflowFlag(V)Location:SR(8)Function:Identifieswhenanoperationresultsinanoverflow.Canbesetorclearedbysoftware,orautomatically.Overflowoccurswhentwopositivenumbersareaddedtogether,andtheresultisnegative,orwhentwonegativenumbersareaddedtogether,andtheresultispositive.1=Overflowresultoccurred0=NooverflowresultoccurredFouroftheseflags(Overflow,Negative,Carry,andZero)driveprogramcontrol,viainstructionssuchascmp(compare)andjz(jumpifZeroflagisset).Youwillseetheseflagsreferredtoofteninthisbook,astheirfunctionrepresentsafundamentalbuildingblock.TheinstructionsetisdetailedinChapter9,andeachbaseinstructiondescriptiontheredetailstheinteractionbetweenflagsandinstructions.Asaprogrammer,youneedtounderstandthisinteraction.StackPointerTheStackPointerisimplementedinR1.LiketheProgramCounter,theLSBisfixedasazerovalue,sothevalueisalwayseven.ThestackisimplementedinRAM,anditiscommonpracticetostarttheSPatthetop(highestvalidvalue)ofRAM.ThepushcommandmovestheSPdownonewordin第9页RAM(SP=SP-2),andputsthevaluetobepushedatthenewSP.Popdoesthereverse.CallstatementsandinterruptspushthePC,andretandretistatementspopthevaluefromtheTOS(topofstack)backintothePC.IhaveonesimpleruleofthumbfortheSP:leaveitalone.Setthestackpointeraspartofyourinitialization,anddontfiddlewithitmanuallyafterthat.Aslongasyouarewaryoftwostackconditions,thestackpointermanagesitself.Thesetwoconditionsare:Asymmetricpush/popcombinations.Everypushshouldhaveapop.Ifyoupushabunchofvariables,andfailtopopthembackout,itwillcomebacktohauntyou.Ifyoupopanemptystack,theSPmovesoutofRAM,andtheprogramwillfail.Stackencroachment.Remember,thestackisimplementedinRAM.Ifyourprogramhasmultipleinterrupts,subroutinecalls,ormanualpushes,thestackwilltakeupmoreRAM,potentiallyoverwritingvaluesyourcodeneedselsewhere.MemoryStructureSpecialFunctionRegistersSpecialfunctionregistersare,asyoumighthaveguessed,memory-mappedregisterswithspecialdedicatedfunctions.Thereare,nominally,sixteenoftheseregisters,atmemorylocations0000hthrough000Fh.However,onlythefirstsixareused.Locations0000hand0001hcontaininterruptenables,andlocations0002hand0003hcontaininterruptflags.ThesearedescribedinChapter3.Locations0004hand0005hcontainmoduleenableflags.Currently,onlytwobitsareimplementedineachbyte.ThesebitsareusedfortheUSARTs.PeripheralRegistersAllon-chipperipheralregistersaremappedintomemory,immediatelyafterthespecialfunctionregisters.Therearetwotypesofperipheralregisters:byte-addressable,whicharemappedinthespacefrom010hto0FFh,andword-addressable,whicharemappedfrom0100hto01FFh.RAM第10页RAMalwaysbeginsatlocation0200h,andiscontiguousuptoitsfinaladdress.RAMisusedforallscratchpadvariables,globalvariables,andthestack.SomerulesofthumbforRAMusage:Thedeveloperneedstobecarefulthatscratchpadallocationandstackusagedonotencroachoneachother,oronglobalvariables.AccidentalsharingofRAMisaverycommonbug,andcanbedifficulttochasedown.Youneedtoclearlyunderstandhowlargeyourstackwillbecome.Beconsistentaboutuse.LocatethestackattheveryendoftheRAMspace,andplaceyourmostcommonlyusedglobalsatthebeginning.Neverallocatemorescratchpadthanyouneed,andalwaysdeallocateasquicklyasisreasonable.YoucanneverhavetoomuchfreeRAM.BootMemory(flashdevicesonly)Bootmemoryisimplementedinflashdevicesonly,locatedinmemorylocations0C00hthrough0FFFh.Itistheonlyhard-codedROMspaceintheflashdevices.Thismemorycontainsthebootstraploader,whichisusedforprogrammingofflashblocks,viaaUSARTmodule.InformationMemory(flashdevicesonly)Flashdevicesinthe430familyhavetheaddedfeatureofinformationmemory.ThisinformationmemoryactsasonboardEEPROM,allowingcriticalvariablestobepreservedthroughpowerdown.Itisdividedintotwo128-bytesegments.Thefirstofthesesegmentsislocatedataddresses01000hthrough0107Fh,andthesecondisat01080hthrough010FFh.CodeMemoryCodememoryisalwayscontiguousattheendoftheaddressspace(i.e.alwaysrunstolocation0FFFFh).So,for8kdevices,coderunsfrom0E000hto0FFFFh,andforthe60kdevices,thecoderunsfrom01100hto0FFFFh.Allcode,tables,andhard-codedconstantsresideinthismemoryspace.InterruptVectorsInterruptvectorsarelocatedattheveryendofmemoryspace,inlocations0FFE0hthrough0FFFEh.ProgramminganduseofthesearedescribedindetailinChapter3.MemoryTypesTheMSP430isavailablewithanyoneofseveraldifferentmemorytypes.第11页ThememorytypeisidentifiedbytheletterimmediatelyfollowingMSP430inthepartnumbers.(Example:AllMSP430Fxxxpartsareflashdecices).ROMROMdevices,alsoknownasmaskeddevices,areidentifiedbytheletterCinthepartnumbers.TheyarestrictROMdevices,shippedpre-programmed.Theyhavetheadvantageofbeingveryinexpensive,andmaybethebestsolutionforhigh-volumedesigns.However,duetohighNRE(non-recurringengineering)costs,maskedROMisonlycost-efficientwhenhundredsofthousands(ormore)devicesarerequired.Theyshouldalsoonlybeusedforstabledesigns.Ifbugsarefoundtoolateintheprocess,theNREcostshavethepotentialtoberepeated.OTPOTPisanacronymforonetimeprogrammable,whichprettywelldescribesthefunctionalityofthesedevices.IdentifiedbytheletterPinthepartnumber,OTPpartsareagoodcompromisebetweenROMandflashparts.OTPsareshippedblank,andcanbeprogrammedatanytime.TheyaretypicallymoreexpensivethanROM.Theyalsorequireprogramming,whichcanbeahindranceinhigh-volumemanufacturingenvironments.However,OTPsareidealforlowandmediumvolumeapplications,andcanbeausefulintermediatestepwhenyouarestilluncertainaboutthestabilityofthedesign.EPROMTIofferswindowedEPROMversionsofseveraldevices,intendedforuseindevelopment.TheyareidentifiedbytheletterEinthepartnumber.Thesedevicesareelectricallyprogrammable,andUV-erasable.EPROMdevicesareonlyavailableforafewdevices,andtypicallycostontheorderof$50each.Theyarenotintendedforproductionuse,butmakeidealplatformsforemulatingROMdevicesindevelopment.FlashFlashdevices,identifiedbytheletterFinthepartnumber,havebecomeverypopularinthepastfewyears.Theyaremoreexpensive,butcodespacecanbeerasedandreprogrammed,thousandsoftimesifnecessary.Thiscapabilityallowsforfeaturessuchasdownloadablefirmware,andletsthedevelopersubstitutecodespaceforanexternalEEPROM.第12页中文翻译稿利用TI的MSP430系列的嵌入式系统设计这本书是写给新进入此领域的嵌入式工程师，作为一个关于微控制器的开发经验的介绍和依据，但新的MSP430系列的设备。我假定读者对微控制器基础设计无论是专业或学术上有一定的经验。作为一个例子，这本书详细描述中断功能，但假设你，读者，已经知道什么是中断，以及如何使用它。这也是需重要注意到，虽然在这本书的大部分信息与现成的TI的文件是相同的，这本书的目的是补充，而不是替代的宝贵的信息来源。该用户指南和应用笔记提供了一个共同的深度和广度的技术信息，就很难在重复一个信号源。该这本书的目的是介绍一些最常用的信息，通过一些有用的建议和经验法则。MSP430系列MSP430系列是一种低功率大家族，功能丰富的16位微控制器从得克萨斯仪器。他们都有一个共同的，RISC结构，冯诺依曼的CPU核心。该430是竞争在价格与8位控制器市场，同时支持8位和16位指令，通过大多数同样大小的平台进位。这系列从非常小的（1kROM,128bytesforRAM，美分）到大到（60kROM,2kRAM，并在10美元的价格范围）的设备。目前，至少有40个可用，更经常被规律添加。该设备分为三个系列：MSP430x3xx，这是一个基本单位，MSP430x1xx，这是一个功能更丰富的系列，MSP430x4xx，这是类似于1xx，带有LCD驱动器内置。通过书你会发现这些相近的1xx，3xx和4xx装置。部分编号惯例MSP430器件的数字部分为基础来决定他们的能力。所有设备部件编号按照以下模板：MSP430MtFaFbMcM:内存类型C:ROMF:FlashP:OTPE:EPROM(为推导使用.有以下几种.)Fa,Fb:系列和结构10,11:基本12,13:硬件串口14:硬件串口,硬件乘法器31,32:LCD控制器第13页33:LCD控制器,硬件串口,硬件乘法器41:LCD控制器43:LCD控制器,硬件串口44:LCD控制器,硬件串口,硬件乘法器Mc:电容存储器0:1kbROM,128bRAM1:2kbROM,128bRAM2:4kbROM,256bRAM3:8kbROM,256bRAM4:12kbROM,512bRAM5:16kbROM,512bRAM6:24kbROM,1kbRAM7:32kbROM,1kbRAM8:48kbROM,2kbRAM9:60kbROM,2kbRAM例如：MSP430F435是带有LCD控制器的FLASH存储器设备，硬件串口，16KB的程序存储器和512字节的RAM。上述这部分编号方案有点零碎。有共同特征的没有一贯表现（ADC的类型，定时器编号等），并有其他一些不一致的地方（例如，33系列有乘法器，但13和43没有）。我会建议对选择部分根据他们的编号方案。相反，一旦你有一个必要条件您存在模糊的想法，到TI的网站（www.TI.com）使用它们的参数排序功能。结构：CPU和内存正如在第一章中所讨论的，MSP430的采用16位RISC结构，这是在任何字节或字的处理指令的能力。430家庭的所有成员的CPU是完全相同的。它由一个三级指令栈道，指令解码，一个16位ALU，4个专用用途寄存器和12个工作（或暂存器）寄存器。CPU是连接至其存储器通过两个16位总线，一个是地址，另一个是数据。所有的存储器，包括RAM，ROM中，信息存储，特殊功能寄存器和外设寄存器映射到一个单一的，连续的地址空间。这种结构有独特的的几个原因。首先，设计师在德州仪器公司未来的发展留下了非常多的空间。几乎一半的状态寄存器仍然可以为未来的发展，大致外设寄存器空间的一半是未使用的，只有6位16位可用的特殊功能寄存器使用。第二，有大量的工作寄存器。经过多年使用一或两个工作寄存器，我非常喜欢我与12个16位CPUscratchpads的第一次经历。该程序设计的风格略有不同，可以可以大大第14页提高效率，特别是在知道如何将这个功能发挥到极致的程序员手中。第三，这种结构是看似简单。这是非常灵活，它的寻址方式更复杂比大多数其他小型处理器。但是，除此之外，这种结构简单，高效和清洁。有两种总线，一个单一的线性存储空间，一个不平凡的处理器核心，所有外设都是存储器映射。CPU的特点ALU该430处理器包括一个相当标准的ALU（算术逻辑单元）。ALU的处理加，减，比较和逻辑（与，或，异或）操作。ALU的操作可以影响溢出，零，负，和进位。硬件乘法器，这并非在所有设备上是可用的，是作为一个外围设备使用，而不是ALU的一部分（见第6章）。工作寄存器该430为开发者提供12个16位工作寄存器，R4通过R15（R0通过R3用于其他功能，稍后介绍。）他们用于寄存器模式操作（见寻址方式，第8章）这远比需要的内存访问的操作有效率。他们使用的一些准则：尽可能使用这些寄存器。为了效率目的任何经常使用的变量需要存放在这些地址之一。一般来说，为了任何目的你可以选择这些寄存器中的任何一种，数据或地址。但是，一些开发工具将保留R4和R5调试信息。同样，不同的编译程序将使用不同的寄存器形式。了解您的工具。在使用一致的工作寄存器。它们使用清楚的记录。我在八个月前写的代码，广泛的在R8、R9和R15