TimeQuest 分析器快速入门教程

TimeQuest 分析器快速入门教程 TimeQuest AnalyzerQuick Start Tutorial101Innovation DriveSanJose,CA95134 (800)800-EPLD (3753)(7:00a.m.to5:00p.m.Pacific Time)All OtherLocations.altera./mysupport/+1408-544-87677:00a.m.to5:00p.m.(GMT-8:00)Pacific Time.altera. literaturealtera.+1408-544-70007:00a.m.to5:00p.m.(GMT-8:00)Pacific Timeftp.altera. ProductliteratureAltera literatureservicesNon-technical customerserviceFTP site.altera. literaturealtera. (800)767-3753ftp.altera. Altera Corporation1TimeQuest AnalyzerQuick StartTutorialTypographic ConventionsTypographicConventionsVisual CueBoldType with Initial CapitalLetters boldtype Thisdocument uses the typographionventions shownbelow.MeaningCommand names,dialog boxtitles,checkbox options,and dialog box optionsare shown in bold,initial capital letters.Example:Save Asdialog box.External timingparameters,directory names,project names,disk drivenames,filenames,filename extensions,and softwareutility namesare shown in boldtype.Examples:f MAX,qdesigns directory,d:drive,chiptrip.gdf file.Italic TypewithInitial Capital Documenttitles are shown in italic typewith initial capitalletters.Example:AN75:Letters High-Speed BoardDesign.Italic typeInternal timingparameters andvariables are shown initalic type.Examples:t PIA,n+1.Variable namesare enclosedin anglebrackets()and shown initalictype.Example:,.pof file.InitialCapitalLetters“Subheading Title”Keyboard keysand menunamesareshown withinitialcapitalletters.Examples:Delete key,the Optionsmenu.References tosections within a documentand titlesof on-line helptopics areshown inquotation marks.Example:“T ypographicConventions.”Signal andport namesareshown in lowercaseCourier type.Examples:data1,tdi,input.Active-low signalsare denotedby suffixn,e.g.,resetn.Anything thatmust betyped exactlyas itappears isshownin Courier type.For example:c:qdesignstutorialchiptrip.gdf.Also,sections ofan actualfile,such asa ReportFile,references toparts offiles(for example.,the VHDLkeyword BEGIN),as wellas logicfunction names(e.g.,TRI)areshowninCourier.1.,2.,3.,anda.,b.,c.,etc.v1Courier typeNumbered stepsare used ina list of items when the sequence of the items isimportant,such as the stepslisted ina procedure.Bullets areusedinalist ofitemswhenthesequenceof theitemsis notimportant.The checkmarkindicates aprocedure thatconsists ofone steponly.The handpoints toinformation thatrequires specialattention.The cautionindicates required information thatneeds specialconsideration andunderstanding andshould be read prior to starting or continuingwith the procedure orprocess.The warningindicates informationthat should bereadprior tostartingorcontinuing theprocedure orprocessesThe angledarrow indicatesyou shouldpress theEnter key.The feetdirect you to moreinformation ona particulartopic.?cwr f2TimeQuest AnalyzerQuick StartTutorialAltera CorporationChapter1.About thisTutorialIntroductionThis tutorialdescribes thesteps necessaryto constrainand performa statictiming analysisusing the TimeQuest Timing Analyzer.This tutorialuses the fir_filter designthat shipswith the Quartus?II software.The fir_filter designschematic isshownin Figure11.Figure11.fir_filter DesignSchematicAltera CorporationMayxx11Introduction12TimeQuest AnalyzerQuick StartTutorial Altera CorporationMayxxChapter2.QuickStart TutorialSystemRequirementsThe stepsin thissection requirethe followinghardware andsoftware:A PCrunning Windows2000/XP,Red Hat Linux8.0,or RedHatLinuxEnterprise3,or anHP workstationrunning theHP-UX11.0operating system,or aSun workstationrunning theSolaris8or9operating systemQuartus?II softwarebeginning withversion6.0ProceduresThe followingsteps illustratethe flowyou use to constrainand analyzea design using the TimeQuest analyzer.Each stepincludes the GUI procedureand the mand-line equivalent.Step1:Open&Setup YourDesign in the Quartus II SoftwareIn the Quartus II software,browse to and open the fir_filter locatedin thefir_filterfolder.Use the GUI or the mand-line equivalentprocedures in Table21.Table21.Opening&Setting UpYour DesignTheQuartusII Software GUI Command LineOn the Filemenu,click OpenProject,and browse to Notrequiredin the mand-line procedure.and selectthe projectfile pile_fir_filter.qpf.Step2:Setup the TimeQuest AnalyzerBy default,the QuartusII softwareusestheClassic Timing Analyzer as the timing analysis tool.To use theTimeQuest analyzer for the fir_filter projectin theCompilation flow,you mustspecify theTimeQuest analyzer as the timing analysis tool in the QuartusII software.Altera CorporationMayxx21ProceduresTo specify theTimeQuest analyzer as the timinganalysis toolin the QuartusII software,use theGUI or mand-line proceduresin Table22.Table22.Specifying theTimeQuest Timing Analyzer asDefaultThe QuartusII SoftwareGUICommand LineType:On theAssignments menu,click Settings.The Settingsdialog box appears.In theCategory list,expand CompilationProcess Settingsand clickTiming AnalysisProcessing.Turn onUse TimeQuest Timing Analyzerduring pilation.Click OK.quartus_shs project_open filtrefset_global_assignment-nameUSE_TIMEQUEST_TIMING_ANALYZER ONToclose theproject,type:project_closeStep3:Perform InitialCompilationBefore youapply timing constraints to the design,you mustcreate aninitial database.The initial database isgenerated from the post-map resultsof the design.Use theGUI or mand-line proceduresin Table23to plete this step.Table23.Performing InitialCompilationThe QuartusII SoftwareGUICommandLineOn the Processing menu,point toStart and click StartType:Analysis&Synthesis.quartus_map filtrefNote toTable23: (1)The quartus_map isused to create a post-map database.Run Analysis&Synthesis to generate a post-map database.1You canalso create a post-fit list for theinitialdatabase.However,creating apost-map isless timeconsuming,and issufficient forthis tutorialexample.22TimeQuest AnalyzerQuick StartTutorial Altera CorporationMayxxQuick StartTutorialStep4:Launch theTimeQuest AnalyzerTo create andverify all timing constraints and exceptions,you mustlaunch theTimeQuest Timing Analyzer.Refer toTable24for theGUI andmand-line proceduresto pletethis step.Table24.Launching theTimeQuest Timing AnalyzerThe QuartusIISoftwareGUIOn theT oolsmenu,click TimeQuest Timing Analyzer.Note toTable24: (1)This mandlaunches theTimeQuest shellmode.Command LineType:quartus_stas (1)Step5:Create aPost-Map Timing NetlistBefore specifyingany timingrequirements,you mustcreate a timing list;you cancreateatiming listfrom apost-map orpost-fit database.The timing list isderived fromthe post-map databaseyou createdin Step3:Perform InitialCompilation.To createatiming list basedon thepost-map list,use theGUI ormand-line proceduresin Table25.1When youlaunch theTimeQuest analyzerdirectly fromtheQuartusII software,the currentproject isautomatically opened.Table25.Creating aPost-Map Timing NetlistThe TimeQuest Timing Analyzer GUIThe TimeQuest Timing AnalyzerConsoleType:On theNetlist menu,click Create Timing Netlist.The CreateTiming Netlistdialog box appears.Under Inputlist type,select Post-Map.Click OK.create_timing_listpost_map1You cannotuse the CreateTiming Netlist mand in the Tasks pane to createapost-map timing list.By default,the CreateTimingNetlistrequires apost-fit database.Altera CorporationMayxx23TimeQuest AnalyzerQuick StartTutorialProceduresStep6:Specify TimingRequirementsYou mustdefine two clocks in the fir_filter design.Refer toTable26for alistofproperties foreach clock.Table26.Clocks infir_filter DesignClockPort Nameclkclkx2Requirement50MHz with a50/50duty cycle.100MHz witha60/40duty cycle.Tocreate the clocks in thefir_filter design,and assigntheproperclock ports,use theGUI ormand-line proceduresin Table27.Table27.Creating Clocks&Assigning ClockPortsThe TimeQuest Timing Analyzer GUIThe TimeQuest Timing AnalyzerConsoleType:On theConstraints menu,click Create Clock.The CreateClock dialog box appears.Specify theparameters in Table26for the50MHz clock.Repeat thesestep for the100MHz clock.#create the50MHz clockcreate_clockperiod20get_ports clk#createthe100MHz clockcreate_clockperiod10waveform06get_ports clkx21Bydefault,the create_clock mandassumes a50/50duty cycle.Once youhave pletedtheprocedureshownin Table27,the clockdefinition isplete.Step7:Update theTiming NetlistAfter you createtiming constraints or exceptions,you mustupdate the timing list to applyall timingrequirements to the timing list.24TimeQuest AnalyzerQuick StartTutorial Altera CorporationMayxxQuick StartTutorialTo update the timing listfor the newclk andclkx2clock constraints,use theGUI ormand-line proceduresin Table28.Table28.Updating theTiming NetlistThe TimeQuest Timing Analyzer GUIIn the Tasks pane,double-click theUpdate TimingNetlist mand.Type:The TimeQuest Timing AnalyzerConsoleupdate_timing_listStep8:Save theSynopsys DesignConstraints(SDC)FileBefore you generate atiming report,you shouldcreate anSDC file.Once you specify the clock constraintsfor the design and update thetiming list,you shouldcreate anSDC file.All of your timing constraints and exceptions aresaved to the SDC file.1If youinadvertently overwrite any ofyour constraintslater in the designflow,you canuse thisinitial SDC file torestore allofyourconstraints.The initialSDC filecan actasthe“golden”SDC file that contains the originalconstraints and exceptions for the design.Use theGUI ormand-line proceduresin Table29to create anSDC file.Table29.Saving the SDC FileThe TimeQuest Timing AnalyzerGUIThe TimeQuest Timing Analyzer ConsoleIn the Tasks pane,double-click theWrite SDC File Type:mand.write_sdc filtref.sdcIn theWrite SDC File dialog box,enter filtref.sdc in the FileName field.The filtref.sdc filenow containsthe constraints and false path exceptionsfor the two clocksthat youdefined in Step6:Specify TimingRequirements.The Write SDC File mand canoverwrite anySDC files.When thisours,the new SDC filedoes not maintain orderor ments.Therefore,it isremended that you savea goldenSDC fileseparately that you canmanually editwithatext editor.This allowsyoutoenter mentsand organizethe fileto yourown specifications.Altera CorporationMayxx25TimeQuest AnalyzerQuick StartTutorialProceduresStep9:Generate TimingReports forInitial TimingNetlistAfter youupdate thetiming list,you cangenerate timingreports for the two clocks youdefined.To generate a report that verifiesthat all clocks areproperly definedand applied tothecorrect nodes,use theGUI ormand-line proceduresin Table210.Table210.Report SDC CommandThe TimeQuest Timing AnalyzerGUI The TimeQuestTiming Analyzer Consolereport_sdcIn the Tasks pane,double-click the Report SDC mand.Type:Figure21shows the CreateClock report thatyougeneratewhen youclick the Report SDCmand in the Tasks pane.Figure21.Generating the Report SDCReportThe TimeQuest analyzer generatesonly the Report SDCmand fromtheCreateClockreportbecause the clocks arethe onlyconstraints in the design.Once yougenerate the Report SDC report,you cangenerate a report thatsummarizes allclocks in the design.To dothis,use theGUI ormand-line proceduresin Table211.Table211.Generating theReport ClocksReportThe TimeQuestTiming AnalyzerGUI The TimeQuestTiming Analyzer Consolereport_clocksIn the Tasks pane,double-click theReport Clocksmand.Type:26TimeQuest AnalyzerQuick StartTutorial Altera CorporationMayxxQuick StartTutorialFigure22shows theReport Clocksreport.Figure22.Report ClocksReportOnce yougenerate theReport Clocksreport,you canuse theReport Clock Transfers mand togenerate areportto verify that allclock-to-clock transfersare valid.This reportcontains allclock-to-clock transfersin the design.Table212.Generating theReport Clock TransfersThe TimeQuestTiming Analyzer GUIIn the Tasks pane,double-click theReport ClockTransfers mand.Type:The TimeQuestTiming AnalyzerConsolereport_clock_transfersFigure23shows theReport ClockTransfers report.Figure23.Report ClockTransfers ReportThe Report ClockTransfers report indicates thata clock-to-clock transferexists between thesourceclk and the destinationclkx2.There are9instances whereclock clkclocks thesource node,and8of theseinstances whereclock clkx2clocks thedestination node.AlteraCorporationMayxx27TimeQuest AnalyzerQuick StartTutorialProceduresIn thefir_filter design,you shoulddeclare allclock transfersfrom clkto clkx2as false paths.To declarethese falsepaths,use theGUI ormand-line proceduresin Table213:Table213.Declaring False PathsThe TimeQuestTiming AnalyzerGUIThe TimeQuestTiming AnalyzerConsoleIn theClockTransfer report,select clkin theType:From Clockcolumn.set_false_path-fromget_clocks clkRight-click and select SetFalsePaths-toget_clocks clkx2 (1)Between ClockDomains.This mandcuts pathsbetween thetwoclock domains. (1)When youpletethisprocedure,theTimeQuest analyzer indicates that theClockTransferreport isoutdated.Note toTable213: (1)1Alternatively,you canuse theset_clock_groups mandto cutthe pathsbetweenthetwoclockdomains,for example,set_clock_groupsexclusivegroupget_clocks clkgroupget_clocks clkx2.Because youhave addeda newtimingconstraint,you mustupdate thetiminglist.To dothis,use theGUI ormand-line procedurein Table214.Table214.Updating theTimingNetlistThe TimeQuestTiming Analyzer GUIIn the Tasks pane,double-click theUpdate TimingNetlist mand.Type:The TimeQuestTiming AnalyzerConsoleupdate_timing_listAfter youenter theset_false_path mandfor allconstraints,all generatedreport panelsare labeled“Out ofDate,”indicating that the reportpanels donot containresults thatreflects thecurrent stateof constraintsor exceptionsin theTimeQuest analyzer.To update the reportpanels,you mustregenerate allofthereports.If yourreports areoutofdate,you canreenter thereport mandsinto the Console pane,or selectthe Historytab in theConsolepane,right-click thereport mand,andclick“Rerun.”This automaticallyreissues thatmand.28TimeQuest AnalyzerQuick StartTutorial AlteraCorporationMayxxQuick StartTutorialAfter youupdatethetiminglist,you canverifythat the clock-to-clock transferhas beencut with theReportSDCmand.To dothis,use theGUI ormand-line proceduresin Table215Table215.Verifying UsingtheReportSDCCommandThe TimeQuestTiming Analyzer GUIIn the Tasks pane,double-click ReportSDC.Type:The TimeQuestTiming AnalyzerConsolereport_sdcFigure24shows the new ReportSDCreport.Figure24.Report SDCThereport showninFigure24indicates thatthe clock constraints andthe falsepaths arecorrect.You cannow use theReport Clocks andReport ClockTransfers mandsto verifythatthetwo clockshave beenremoved fromanalysis.Figure25shows theReport ClockTransferreport.Figure25.ReportClockTransfers ReportTheComment columncontainsthement“User Cut”to indicatethatyouhave cuttheclockdomains.AlteraCorporationMayxx29TimeQuest AnalyzerQuick StartTutorialProceduresStep10:Save Constraintsto anSDC FileAfteryouspecify allclockconstraintsandfalsepathsforthe design,you mustsave thetiming constraintsandexceptionsto anSDC fileusing theGUI ormand-line proceduresin Table216.Table216.Saving ConstraintstoanSDC FileThe TimeQuestTiming AnalyzerGUIThe TimeQuestTiming AnalyzerConsoleType:In theTasks pane,double-click WriteSDC File.The WriteSDC Filedialog boxappears.In thedialog box,intheFile namefiled,enter filtref.sdc. (1)write_sdc filtref.sdc (1)Note toTable216: (1)This procedureoverwrites thepreviously createdfiltref.sdc file.1If youoverwriteanSDC filewith theWriteSDCFilemand,your customformatting andments areremoved inthe newSDC file.The filtref.sdc filenow containsthetwoclockconstraintsandthefalsepathexceptions.Step11.Perform Timing-Driven CompilationAfteryou savethe constraints tothe SDC file,you canrun afull pilationon the design tooptimize fittingto meet the constraints.However,before youstart afull pilationyou mustadd theSDC fileto yourproject using theGUI ormand-line proceduresin Table217.Table217.Adding theSDCFileto YourProjectThe TimeQuestTiming AnalyzerGUITheTimeQuestTimingAnalyzerConsoleOn theProject menu,click Add/Remove FilesIn Type:Project.The Add/Remove FilesIn Projectdialog set_global_assignmentboxappears.-name SDC_FILE filtref.sdcIn thedialog box,browsetoandselecttheSDCfile.Click OK.210TimeQuest AnalyzerQuick StartTutorial AlteraCorporationMayxxQuick StartTutorialAfter youadd theSDCfileto yourproject,you canrun afull pilationon the design usingtheGUI ormand-line proceduresin Table218.Table218.Running aFull CompilationTheTimeQuestTimingAnalyzer GUIOn theProcessingmenu,click StartCompilation.Type:TheTimeQuestTimingAnalyzerConsolequartus_fit filtrefAfterpilation isplete,theTimeQuestanalyzer generatesa summaryreport oftheclock setup andclock holdchecks performedintheCompilation Report.Step12.Verify TimingintheTimeQuest AnalyzerToobtain detailedtiminganalysisdata onspecific paths,you mustview timinganalysis resultsintheTimeQuestanalyzer.1After afull place-and-route isperformed,you needto launchtheTimeQuestanalyzerasdescribed in“Step4:Launch theTimeQuest Analyzer”on page23.You mustgenerate atiminglist,read theSDCfile,andupdatethetiminglisttogenerate reportsabout thelatest pilation.To dothis,use theGUI ormand-line proceduresin Table219.Table219.Generating ReportsAbout theLatest CompilationTheTimeQuestTimingAnalyzer GUIIn theTaskspane,double-click the desired reportingmand,for example,Report All Summaries.TheTimeQuestTimingAnalyzerConsoleType:create_timing_listread_sdc filref.sdcupdate_timing_list1When youdouble-click oneofthereporting mands,theCreateTimingNetlist,Read SDC,and UpdateTimingNetlistmands aresequentially executedintheTaskspane,automatically settingup thetiminglist.The clock setup checkensures thateach register-to-register transferdoes notviolate thetiming constraintsyou specifiedintheSDCfile.To verifythat noviolations haveourred,you mustgenerate aclocksetupreport.AlteraCorporationMayxx211TimeQuest AnalyzerQuick StartTutorialProceduresYou cangenerate aclocksetupsummary checkfor allclocksinthedesignwith theReport Setup Summary mand.To dothis,use theGUI ormand-line proceduresin Table220.Table220.Generating aClock SetupS