2013年电赛系统板原理图和pcb图 - 副本

A B C DD C B A Title NumberRevisionSize C Date:28-Jun-2013Sheet of File:H:U盘备份2013.6.26资料ec13年电赛ddb改版-2013.6.2ec_mcu_2013.6.2可以制版的.ddbDrawn By: CX1 30pF CX2 30pF GND X1X212 XTAL1 11.0592MHz 12 34 56 78 910 mcu_ISP ISP-INTERFACE P17 P16 P15 RESET VDD5V GND RX TX GND VDD5V CR1 10uF RR1 10K GND RS232接口用母头 对PC而言，2为接收，3为发送 若用到串口，晶振最好用11.0592MHz P36 VDD5V P10 P11 P12 P13 P14 P15 P16 P17 EA/VPP 31 XTAL1 19 XTAL2 18 RST 9 P3.7(RD) 17 P3.6(WR) 16 P3.2(INT0) 12 P3.3(INT1) 13 P3.4(T0) 14 P3.5(T1) 15 P1.0 1 P1.1 2 P1.2 3 P1.3 4 P1.4 5 P1.5 6 P1.6 7 P1.7 8 (AD0)P0.0 39 (AD1)P0.1 38 (AD2)P0.2 37 (AD3)P0.3 36 (AD4)P0.4 35 (AD5)P0.5 34 (AD6)P0.6 33 (AD7)P0.7 32 (A8)P2.0 21 (A9)P2.1 22 (A10)P2.2 23 (A11)P2.3 24 (A12)P2.4 25 (A13)P2.5 26 (A14)P2.6 27 (A15)P2.7 28 PSEN 29 ALE/PROG 30 (TXD)P3.1 11 (RXD)P3.0 10 GND 20 VCC 40 U5 AT89S51/STC12C5A60S2 GND VDD5V C20 0.1uF RXD TXD X1 X2 RESET INT0 INT1 P23 P37 P27 ALE D0 D1 D2 D3 D4 D5 D6 D7 R/W LCD_CS 1 2 3 4 5 6 7 8 9 RSL1 10K*8 VDD5V P21 P22 RS A0 1 A1 2 NC 3 GND 4 SDA 5 SCL 6 WP 7 VCC 8 U7 AT24C02_128 VDD5V GND GND C21 0.1uF P13 P12SCL SDA GND P34 P35 P20 1 2 Power_input HEADER 2 为防止上电时继电器的误动作，应在前加74LS20四输入与非门做为反相器 RL1 1K B1 BELL GND VDD5V Q2 8550 P14BELL 低电平有效 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 JMCU1 CON20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 JMCU2 CON20 P10 P11 P12 P13 P14 P15 P16 P17 RESET RXD TXD INT0 INT1 P34 P35 P36 P37 X2 X1 GND D0 D1 D2 D3 D4 D5 D6 D7 P20 P21 P22 P23 ALE VDD5V VDD5V 1 6 2 7 3 8 4 9 5 BO2 BO1 com RS232 GND 12 KR 用SLISP.exe下载，兼容avr/s5X的线 Rc1 10k Rc2 10k VDD5V P13 P12 T1IN 11 T2IN 10 R1OUT 12 R2OUT 9 T1OUT 14 T2OUT 7 R1IN 13 R2IN 8 V+ 2 C1+ 1 C1- 3 C2+ 4 C2- 5 V- 6 VDD 16 GND 15 U8 SP3232EEN/max3232 C16 104 C18 104 C15 104 C17 104 GND VDD5V RX TX RXD C19 104 TXD C2 470uF/16VC4 104 VDD5V C6 220uF/16V C8 104 7_12V GND Vin 1 gnd 6 gnd 3 on/off 5 output 2 feedback 4 U2 LM2596S-5.0 L2 33uH D2 1N5824 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 LCD VDD5V D0 D1 D2 D3 D4 D5 D6 D7 VDD5V RS R/W LCD_CS P_S GND GND 1 2 Jbg CON2 OCMJ4X8C型型128*64液晶液晶/SGX-12864-2H CL 10uf RL 10k GND VDD5V Ra 20k GND 1 VCC 2 CE 3 CSN 4 SCK 5 MOSI 6 MISO 7 IRQ 8 nrf24L01 NRF24L01 GND +3V3 INT1 P17 P27 P23 P15 P16 NRF24L01部分部分 D3 6.2V GND C7 104 C11 104 D1 RED +3V3 GND R1 1K +C5 10uf/16v +C3 10uf/16v OUT_1 2 GND 1 IN 3 OUT 4 U4 LM1117-3.3 VDD5V mcu部分 电源部分继电器部分 部分 电源部分继电器部分 key/led部分部分 RS232串口部分 蜂鸣器部分 串口部分 蜂鸣器部分 lcd部分部分 iic部分部分 C13 10uF #PSEN #PSEN P27 R/W LCD_CS RS GND 1 2 Pin HEADER 2 R2 10K 1 2 PS CON2 P_S GND VDD5V 并行模式：并行模式：R2取取0欧姆，不加跳线 串行模式：加跳线， 欧姆，不加跳线 串行模式：加跳线，R2可以不焊可以不焊 1 2 3 JCOMTTL CON3GND TXD RXD P12 P13TXOUT2 RXIN2 1 2 3 JCOM CON3GND TXOUT2 RXIN2 串口串口2和和iic不能同时用不能同时用 nrf24L01不影响isp下载 global_sw global_switch 7_12V VDD5V 123456 A B C D 654321 D C B A Title NumberRevisionSize C Date:28-Jun-2013Sheet of File:H:U盘备份2013.6.26资料ec13年电赛ddb改版-2013.6.2ec_mcu_2013.6.2可以制版的.ddbDrawn By: 1 2 3 4 5 6 7 8 9 10 KEYIN INT0 GND VDD5V 接原来的4*4key小板 P34 P35 P36 P37 RTCC 1 VCC 2 NC 3 GND 4 NC 5 CS 6 CLK 7 DIO 8 KEY 9 SG 10 SF 11 SE 12 SD 13 SC 14 SB 15 SA 16 DP 17 DIG0 18 DIG1 19 DIG2 20 DIG3 21 DIG4 22 DIG5 23 DIG6 24 DIG7 25 CLKO 26 RC 27 REST 28 U202 ZLG7289A/B C202 104 GND Y200 12M C206 15P C205 15P R203 10k GND GND R216 270 R217 270 R218 270 R219 270 + C204 10uf A H:A-B U102 74LVC4245A VDD5V PIN112 VCC GND GNDGND PIN80 PIN85 PIN103 PIN105 MPIN80 MPIN85 MPIN103 MPIN105 MPIN110 PIN110 单片机部分：单片机部分：RSL200不焊， 用 不焊， 用74lvc4245a来实现来实现 mcu 5v io到到 fpga 3.3v io的转换的转换 mcufpga MPIN112 P15 P17 P16 P20 P21 P22 VCCA 1 DIR 2 A0 3 A1 4 A2 5 A3 6 A4 7 A5 8 A6 9 A7 10 GND 11 GND 12 GND 13 B7 14 B6 15 B5 16 B4 17 B3 18 B2 19 B1 20 B0 21 nOE 22 NC 23 VCCB 24 DIR L:B-A H:A-B U103 74LVC4245A VDD5VVCC GND GNDGND PIN87 PIN99MPIN87 MPIN99 mcufpga P23 P27 GND VDD12V VDD12V C100 104 GND C101 104 GND C107 104 GND C102 104 GND PIN70 PIN138 PIN61-mcu板板 PIN134-mcu板板 PIN34 PIN38 PIN84 PIN124 PIN3 PIN1 PIN75 PIN73 PIN74 PIN2 OE 1 GND 2 OUT 3 VDD 4 Y1 20MHz GND 123456 A B C D 654321 D C B A Title NumberRevisionSize B Date:28-Jun-2013Sheet of File:C:Documents and SettingsAdministrator桌面改版_ec_fpga_2013.6.2可以制版的.ddbDrawn By: POWER No.3 C333 0.1uF C337 10uF VDD5VVCC OUT_1 2 GND 1 IN 3 OUT 4 U302LM1117-3.3 VDD5V GND VDD5V VCC C328 10uF/10V C330 10uF/10V OUT_1 2 GND 1 IN 3 OUT 4 U300 LM1117-3.3 C331 0.1uF C332 0.1uF GND GND C327 10uF/10V C329 10uF/10V GND VDD12V C335 10uF/16V GND C336 10uF/16V C315 104 C321 104 C320 104 C325 104 C322 104 C323 104 C324 104 VDD5V VDD5V LED R300 2K C355 0.1uF VCC VDD12V OUT_1 2 GND 1 IN 3 OUT 4 U303LM1117-1.2 GND 1 1.2v CON1 C354 104 C338 10uF C309 104 C310 104 C311 104 C300 104 C301 104 C302 104 C303 104 C304 104 C305 104 C306 104 C307 104 C308 104 GND GND VCC VCC C312 104 VDD5V VDD25V OUT_1 2 GND 1 IN 3 OUT 4 U301LM1117-2.5 GND 1 2 3 4 Jpower CON4 C346 0.1uF VDD5VVCC OUT_1 2 GND 1 IN 3 OUT 4 U304LM1117-3.3 GND C339 104 C344 10uF D300 6.2V GND C343 0.1uFC350 10uF GND C316 104 L301 100uh AVDD25VVDD25V C352 10uF/16V AGND C342 104 L303 100uh AVDD