数字集成电路

1,DigitalIntegratedCircuitsADesignPerspective,Introduction,陆生礼lsl,2,MostPPTsFrom,Website/IcBook/slides.htm,3,WhatisthisCourseallabout?,Introductiontodigitalintegratedcircuits.manufacturingCMOSdevicesWireCMOSinvertersStatic/DynamicCMOSgatesSequentialcircuitsInterconnectArithmeticmemories,4,ClassMaterial,Textbook:“DigitalIntegratedCircuitsADesignPerspective,”2ndEdition,byJ.Rabaey,A.Chandrakasan,andB.NikolicReadings:AvailableonthewebpagesIEEEpaper,5,目录,历史回顾数字IC设计中的问题数字设计的质量评价,6,TheFirstComputer,1834年Babbage发明差动引擎机械计算装置（DifferenceEngine）25,000各机械部件成本为17,470特点：十进制系统可执行加减乘除运算基本概念与现代计算机很相似设计复杂成本高昂,7,TheFirstVaccumTube,1904年英国电气工程师弗莱明发明第一只真空二极管1906年美国科学家德福雷斯特发明第一只具有放大作用的真空三极管电子管产生后，计算机便跨入电子纪元左下图是现在使用的电子管,8,ENIAC-Thefirstelectroniccomputer(1946),基于真空电子管的计算机“埃尼阿克”18000个电子管6000个开关10000个电容器、70000个电阻1500个继电器长24m高2.6m,重达30吨。速度较机械计算高可靠性不高功耗极大(140KW)真空管计算极限,9,TheFirstTransistor,1947年BellLab的布拉顿和巴丁发明了第一只晶体管1948年BellLab的肖克利发明了现代晶体管的始祖结型晶体管,10,贝尔实验室研制出世界上第一台全晶体管计算机TRADIC，装有800只晶体管，仅100瓦功率，体积3立方英尺。,TRADIC-Thefirstfull-transisitorcomputer(1955),11,TheFirstIntegratedCircuits,1958年TI的JackKilby制成了世界上第一块集成电路。使用半导体单晶硅制成了相移振荡器，其中的每个元器件已不需要用金属导线相连。,12,TheFirstMOSDevice,1957年仙童半导体公司成功地制造出金属氧化物半导体（MOS）器件1958年美国仙童电子公司赫尔尼等人发明了一整套制作微型晶体管的新工艺“平面工艺“被移用到集成电路的制作中，使集成电路很快从实验室研制试验阶段转入工业生产阶段。,13,Intel4004Micro-Processor,1971年仅用NMOS2250个晶体管3x4mm2108kHz时钟速率,历史CMOSPMOSNMOSCMOS,14,IntelPentium(IV)microprocessor,15,目录,历史回顾数字IC设计中的问题数字设计的质量评价,16,MooresLaw,1965年,GordonMoore预测:单芯片的晶体管数以每18个月24个月翻倍.,17,MooresLaw,Electronics,April19,1965.,18,EvolutioninComplexity,19,TransistorCounts,1,000,000,100,000,10,000,1,000,10,100,1,1975,1980,1985,1990,1995,2000,2005,2010,8086,80286,i386,i486,Pentium,PentiumPro,K,1BillionTransistors,Source:Intel,Projected,PentiumII,PentiumIII,Courtesy,Intel,20,MooreslawinMicroprocessors,4004,8008,8080,8085,8086,286,386,486,Pentiumproc,P6,0.001,0.01,0.1,1,10,100,1000,1970,1980,1990,2000,2010,Year,Transistors(MT),2Xgrowthin1.96years!,主流的单片处理器晶体管数约每2年翻倍,21,DieSizeGrowth,4004,8008,8080,8085,8086,286,386,486,Pentiumproc,P6,1,10,100,1970,1980,1990,2000,2010,Year,Diesize(mm),7%growthperyear,2Xgrowthin10years,Moore定律下，单芯片面积增长14%,Courtesy,Intel,22,Frequency,P6,Pentiumproc,486,386,286,8086,8085,8080,8008,4004,0.1,1,10,100,1000,10000,1970,1980,1990,2000,2010,Year,Frequency(Mhz),主流处理器时钟速率每2年翻倍,Doublesevery2years,Courtesy,Intel,23,PowerDissipation,P6,Pentiumproc,486,386,286,8086,8085,8080,8008,4004,0.1,1,10,100,1971,1974,1978,1985,1992,2000,Year,Power(Watts),主流处理器功耗持续增加（CMOS工艺的采用出现短暂下降）,Courtesy,Intel,24,Powerwillbeamajorproblem,5KW,18KW,1.5KW,500W,4004,8008,8080,8085,8086,286,386,486,Pentiumproc,0.1,1,10,100,1000,10000,100000,1971,1974,1978,1985,1992,2000,2004,2008,Year,Power(Watts),电力供给和消耗将受到限制,Courtesy,Intel,25,Powerdensity,4004,8008,8080,8085,8086,286,386,486,Pentiumproc,P6,1,10,100,1000,10000,1970,1980,1990,2000,2010,Year,PowerDensity(W/cm2),功率密度太大，以至于无法降低结温,Courtesy,Intel,26,NotOnlyMicroprocessors,DigitalCellularMarket(PhonesShipped),(datafromTexasInstruments),CellPhone,27,ChallengesinDigitalDesign,“MicroscopicProblems”Ultra-highspeeddesignInterconnectNoise,CrosstalkReliability,ManufacturabilityPowerDissipationClockdistribution.EverythingLooksaLittleDifferent,“MacroscopicIssues”Time-to-MarketMillionsofGatesHigh-LevelAbstractionsReusechipcostdoesnotincreasesignificantlyCostofafunctiondecreasesby2xButHowtodesignchipswithmoreandmorefunctions?Designengineeringpopulationdoesnotdoubleevery2yearsHence,aneedformoreefficientdesignmethodsExploitdifferentlevelsofabstraction,30,DesignAbstractionLevels,n+,n+,S,G,D,+,DEVICE,CIRCUIT,GATE,MODULE,SYSTEM,31,EDALimitation,工艺的更新需要重新设计和实现模块（单元）库建立单元模型需要对其内部操作有深刻的理解高要求的设计约束需要定制化的设计，编译工具无法实现EDA工具不考虑互联等产生的寄生效应，其所生成的电路只在一定程度上是正确的工艺尺寸的缩小影响时钟分布、电路同步、电源电压分布等工艺水平的提高会出现新的设计问题和约束条件设计和制造之间的偏差也需要有电路方面的专门知识,32,IntelCPU,1989年：486，25MHz，1m；50MHz，0.8m1993年：Pentium，66MHz，0.6；1995年：PentiumPro，133MHz，0.6-0.35；1997年：奔腾，300MHz，0.25；1999年：奔腾，450MHz，0.25；2000年：奔腾IV，1.5GHz，0.18；2003年：奔腾IV，2.4GHz，0.09；2006年：Core2，2/4核，3GHz，0.065；2008年：Corei7，4核，3GHz，0.045。,33,目录,历史回顾数字IC设计中的问题数字设计的质量评价,34,DesignMetrics,Howtoevaluateperformanceofadigitalcircuit(gate,block,)?CostReliabilitySpeed(delay,operatingfrequency)PowerdissipationEnergytoperformafunction,35,CostofIntegratedCircuits,NRE(non-recurrentengineering)costsdesigntimeandeffort,maskgenerationone-timecostfactorRecurrentcostssiliconprocessing,packaging,testproportionaltovolumeproportionaltochiparea,36,NRECostisIncreasing,37,DieCost,Singledie,Wafer,From,Goingupto12”(30cm),38,CostperTransistor,0.0000001,0.000001,0.00001,0.0001,0.001,0.01,0.1,1,1982,1985,1988,1991,1994,1997,2000,2003,2006,2009,2012,cost:-per-transistor,Fabricationcapitalcostpertransistor(Mooreslaw),39,Yield,40,Defects,aisapproximately3,41,SomeExamples(1994),42,ReliabilityNoiseinDigitalIntegratedCircuits,i,(,t,),Inductivecoupling,Capacitivecoupling,Powerandground,noise,v,(,t,),V,DD,43,DCOperationVoltageTransferCharacteristic,VOH=f(VOL)VOL=f(VOH)VM=f(VM),44,Mappingbetweenanaloganddigitalsignals,“,0,”,V,OL,V,IL,V,IH,V,OH,Undefined,Region,“,1,”,45,DefinitionofNoiseMargins,Noisemarginhigh,Noisemarginlow,V,IH,V,IL,UndefinedRegion,1,0,V,OH,V,OL,NM,H,NM,L,GateOutput,GateInput,46,NoiseBudget,AllocatesgrossnoisemargintoexpectedsourcesofnoiseSources:supplynoise,crosstalk,interference,offsetDifferentiatebetweenfixedandproportionalnoisesources,47,KeyReliabilityProperties,Absolutenoisemarginvaluesaredeceptiveafloatingnodeismoreeasilydisturbedthananodedrivenbyalowimpedance(intermsofvoltage)NoiseimmunityisthemoreimportantmetricthecapabilitytosuppressnoisesourcesKeymetrics:Noisetransferfunctions,Outputimpedanceofthedriverandinputimpedanceofthereceiver;,48,RegenerativeProperty,Regenerative,Non-Regenerative,|Slope|1,|Slope|1,49,RegenerativeProperty,Achainofinverters,Simulatedresponse,50,Fan-inandFan-out,