验证成功的iicverilog代码

1、'timescale1ns/1ps/Company:kuayuanelectronicandteclonogy/Engineer:xiao;/CreateDate:2012/11/15/DesignName:cycloneIV/ModuleName:iic_top/ProjectName:iic_project/TargetDevice:/Toolversions:cycloneIVQuartus12.0verilogV1.0FileCreated/Dependencies:/Revision:/Revision/moduleiic_project(clk,rst_n,bu1,bu2,

2、scl,sda,LED);inputclk;/50MHzinputrst_n;/复位信号，低有效inputbu1,bu2;/按键1、2,(1按卜执行写人操作,outputscl;/24C02的时钟端口inoutsda;/24C02的数据端口output7:0LED;/数码管显示的数据2按下执行读操作)/按键检测regsw1_r,sw2_r;/键值锁存寄存器，每20ms检测一次键值reg19:0cnt_20ms;/20ms计数寄存器always(posedgeclkornegedgerst_n)if(!rst_n)cnt_20ms<=20'd0;elsecnt_20ms<=c

3、nt_20ms+1'b1;/不断计数always(posedgeclkornegedgerst_n)if(!rst_n)beginsw1_r<=1'b1;/键值寄存器初始化为高电平;sw2_r<=1'b1;endelseif(cnt_20ms=20'hfffff)beginsw1_r<=bu1;/按键1值锁存sw2_r<=bu2;/按键2值锁存end/分频部分reg2:0cnt;/cnt=0:scl上升沿，cnt=1:scl高电平中间，cnt=2:scl下降沿，cnt=3:scl低电平中间reg8:0cnt_delay;/500循环计数，

4、产生iic所需要的时钟regscl_r;/时钟脉冲寄存器always(posedgeclkornegedgerst_n)if(!rst_n)cnt_delay<=9'd0;elseif(cnt_delay=9'd499)cnt_delay<=9'd0;周期为20us,即100KHzelsecntdelay<=cntdelay+1'b1;时钟计数；always(posedgeclkornegedgerst_n)beginif(!rst_n)cnt<=3'd5;elsebegincase(cnt_delay)/cnt=1:scl高电平

5、中间，用于数据采样/cnt=2:scl下降沿/cnt=3:scl低电平中间，用于数据变化/cnt=0:scl上升沿9'd124:cnt<=3'd1;9'd249:cnt<=3'd2;9'd374:cnt<=3'd3;9'd499:cnt<=3'd0;default:cnt<=3'd5;endcaseendend'defineSCL_POS(cnt=3'd0)/cnt=0:scl上升沿'defineSCL_HIG(cnt=3'd1)cnt-1:scl局电平中同，用

6、于数据米样'defineSCL_NEG(cnt=3'd2)/cnt=2:scl下笛？'defineSCL_LOW(cnt=3'd3)cnt-3:scl偷缙彳t屑？用于数据变化always(posedgeclkornegedgerst_n)if(!rst_n)scl_r<=1'b0;elseif(cnt=3'd0)scl_r<=1'b1;elseif(cnt=3'd2)scl_r<=1'b0;assignscl=scl_r;/scl信号上升沿/scl信号下降沿产生iic所需要的时钟需要写入24C02的地址和

7、数据'defineDEVICE_READ8'b1010_0001/被寻址器件地址(读操作)'defineDEVICE_WRIT邑b1010_0000被寻址器件地址(写操作)'defineWRITE_DATA8'b1001_1010写入EEPROM的数据'defineBYTE_ADDR8'b0000_0011写入/读出EEPROM的地址寄存器reg7:0db_r;/在IIC上传送的数据寄存器reg7:0read_data;读出EEPROM的数据寄存器读、写时序parameterIDLE=4'd0;parameterSTART1=4&

8、#39;d1;parameterADD1=4'd2;parameterACK1=4'd3;parameterADD2=4'd4;parameterACK2=4'd5;parameterSTART2=4'd6;parameterADD3=4'd7;parameterACK3=4'd8;parameterDATA=4'd9;parameterACK4=4'd10;parameterSTOP1=4'd11;parameterSTOP2=4'd12;reg3:0estate;regsda_r;regsda_link

9、;reg3:0num;/状态寄存器/输出数据寄存器输出数据sda信号inout方向控莆？always(posedgeelkornegedgerst_n)beginif(!rst_n)beginestate<=IDLE;sda_r<=1'b1;sda_link<=1'b0;num<=4'd0;read_data<=8'b0000_0000;endelseease(estate)IDLE:beginsda_link<=1'b1;/数据线sda为inputsda_r<=1'b1;if(!sw1_r|!sw2_r

10、)begin/SW1,SW2键有一个被按下dbr<='DEVICEWRITE;/送器件地址（写操作）/没有任何键被按下/sel为高电平期间/数据线sda为output拉低数据线sda,产生起始位信号/num计数清零estate<=START1endelseestate<=IDLE;endSTART1:beginif('SCL_HIG)beginsda_link<=1'b1;sda_r<=1'b0;estate<=ADD1;num<=4'd0;endelseestate<=START1;等待sel高电平中间位

11、置到来endADD1:beginif('SCL_LOW)beginif(num=4'd8)beginnum<=4'd0;/num计数清零sda_r<=1'b1;sda_link<=1'b0;/sda置为高阻态(input)cstate<=ACK1;endelsebegincstate<=ADD1;num<=num+1'b1;case(num)4'd0:sda_r<=db_r7;4'd1:sda_r<=db_r6;4'd2:sda_r<=db_r5;4'd3:sd

12、a_r<=db_r4;4'd4:sda_r<=db_r3;4'd5:sda_r<=db_r2;4'd6:sda_r<=db_r1;4'd7:sda_r<=db_r0;default:;endcase/sda_r<=db_r4'd7-num;送器件地址，从高位开始endend/elseif('SCL_POS)db_r<=db_r6:0,1'b0;/器件地址左移1bitelsecstate<=ADD1;endACK1:beginif(/*!sda*/'SCL_NEG)begin/注：24

13、C01/02/04/08/16器件可以不考虑应答位cstate<=ADD2;/从机响应信号db_r<='BYTE_ADDR;/1地址endelsecstate<=ACK1;/等待从机响应endADD2:(input)beginif('SCL_LOW)beginif(num=4'd8)beginnum<=4'd0;sda_r<=1'b1;sda_link<=1'b0;/num计数清零/sda置为高阻态cstate<=ACK2;endelsebegin/sda作为outputsda_link<=1

14、9;b1;num<=num+1'b1;case(num)4'd0:sda_r<=db_r7;4'd1:sda_r<=db_r6;4'd2:sda_r<=db_r5;4'd3:sda_r<=db_r4;4'd4:sda_r<=db_r3;4'd5:sda_r<=db_r2;4'd6:sda_r<=db_r1;4'd7:sda_r<=db_r0;default:;endcase/sda_r<=db_r4'd7-num;/送EEPROM地址（高bit开始）cst

15、ate<=ADD2;/endendelseif('SCL_POS)db_r<=db_r6:0,1'b0;/器件地址左移1bitelsecstate<=ADD2;endACK2:beginif(/*!sda*/'SCL_NEG)begin/从机响应信号if(!sw1_r)begincstate<=DATA;/写操作db_r<='WRITE_DATA;/写入的数据endelseif(!sw2_r)begindb_r<='DEVICE_READ;送器件地址(读操作)，特定地址读需要执行该步骤以下操作cstate<=ST

16、ART2;/读操作endendelsecstate<=ACK2;/等待从机响应endSTART2:begin/读操作起始位if('SCL_LOW)beginsda_link<=1'b1;/sda作为outputsda_r<=1'b1;拉高数据线sdacstate<=START2;endelseif('SCL_HIG)begin/scl为高电平中间sda_r<=1'b0;拉低数据线sda,产生起始位信号cstate<=ADD3;endelsecstate<=START2;endADD3:begin/送读操作地址if

17、('SCL_LOW)beginif(num=4'd8)beginnum<=4'd0;/num计数清零sda_r<=1'b1;sda_link<=1'b0;/sda置为高阻态(input)cstate<=ACK3;endelsebeginnum<=num+1'b1;case(num)4'd0:sda_r<=db_r7;4'd1:sda_r<=db_r6;4'd2:sda_r<=db_r5;4'd3:sda_r<=db_r4;4'd4:sda_r<=d

18、b_r3;4'd5:sda_r<=db_r2;4'd6:sda_r<=db_r1;4'd7:sda_r<=db_r0;default:;endcase/sda_r<=db_r4'd7-num;/送EEPROM地址(高bit开始)cstate<=ADD3;endend/elseif('SCL_POS)db_r<=db_r6:0,1'b0;/器件地址左移1bitelsecstate<=ADD3;endACK3:beginif(/*!sda*/'SCL_NEG)begincstate<=DATA;

19、从机响应信号sda_link<=1'b0;endelsecstate<=ACK3;/等待从机响应endDATA:beginif(!sw2_r)begin读操作if(num<=4'd7)begincstate<=DATA;if('SCL_HIG)beginnum<=num+1'b1;case(num)4'd0:read_data7<=sda;4'd1:read_data6<=sda;4'd2:read_data5<=sda;4'd3:read_data4<=sda;4'd

20、4:read_data3<=sda;4'd5:read_data2<=sda;4'd6:read_data1<=sda;4'd7:read_data0<=sda;default:;endcase/read_data4'd7-num<=sda;/读数据(高bit开始)end/elseif('SCL_NEG)read_data<=read_data6:0,read_data7;/数据循环右移endelseif('SCL_LOW)&&(num=4'd8)beginnum<=4'd

21、0;/num计数清零cstate<=ACK4;endelsecstate<=DATA;endelseif(!sw1_r)begin/写操作sda_link<=1'b1;if(num<=4'd7)begincstate<=DATA;if('SCL_LOW)beginsda_link<=1'b1;/数据线sda作为outputnum<=num+1'b1;case(num)4'd0:sda_r<=db_r7;4'd1:sda_r<=db_r6;4'd2:sda_r<=db_r5;4'd3:sda_r<=db_r4;4'd4:sda_r<=db_r3;4'd5:sda_r<=db_r2;4'd6:sda_r<=db_r1;4'd7:sda_r<=db_r0;default:;endcase/sda_r<=db_r4'd7-num;/写入数据(高bit开始)end/elseif('SCL_P