FPGA蓝牙控制电子琴

1、深圳大学考试答题纸（以论文、报告等形式考核专用）二。一五学年度第学期课程编,02号课程名称数字系统设计主讲教XXXX师评分号“XXXX姓名XXX专业年级XXXXX教师评语:题目：蓝牙控制电子发生器摘要：基于Basys2设计平台而搭建的“谱曲软件在fpga上的实现”的系统，融入了蓝牙传输模块，VGA&示模块，以及安卓手机的app应用软件，完成了对课题的基本功能的实现。谱曲软件由我校陈必红老师编写，通过输入“陈谱”，实现了对钢琴曲以及一般的乐曲的播放，软件界面如下在界面的最下部分编写陈谱，再点击装入，就会出现美妙的乐曲1、系统总流程1.1系统总框图1.2系-3统总框图介绍31.3设计中遇至

2、U的难点、舍弃32、蓝牙模块蓝牙模块波特率设置以及信号检测ASM图4蓝牙主模块、ASM图5,63、A模块（VGA莫块由周玲同学编写实现）4、分频器模块4.1分频器模块的ASM图75仿真-86、资源利用以及布局布线后的时序-97开发板截图1011过冠中活到的难点以及舍弃；卜不得不说，这个设计只是当初设想的半成品，为什么这么说呢？陈必红老师所缉与的谱曲软件用的是完全模拟钢琴的波形，这就必须票有一个da转换模块口而D.A转换模块有两种，一种是以PCF8591芯片为例子的IX：总线控制的'一种是以DAC0&32为例子的T型解码网络的；卜建者前期使用的是DAC0&32芯片，在开踱

3、后的一个星期内,笔者利用单片机开发，经过上几十次的实验，发现DAC0832出效果非常不理想.出现的偏差非常大，在找资料，验证芯片的时候耗费了大部分的时间，后来了笔者找到了PCTQ832r利用单片机进行测试后，效果基本能够接受，但是.由于I2C总线实现的困雕以段时间上的问巍，笔者最终放弃了DA转换，改用最基本的分频器模块，十分遗慎波特率设置模块以及检波cnt<=cnt+1'b1;always(posedgeclkorposedgerst_n)begin输出0clk_bps_r<=1'b1;elseclk_bps_r<=1'b0endassignclk_b

4、ps=clk_bps_r;endmoduleinputclk;inputrst_n;inputrs232_rx;/inputclk_bps;outputbps_start;output7:0rx_data;outputrx_int;output9:0led;outputreg7:0led_new;reg9:0led;regrs232_rx0,rs232_rx1,rs232_rx2,rs232_rx3;wireneg_rs232_rx;always(posedgeclkorposedgerst_n)beginif(rst_n)beginrs232_rx0<=1'b0;rs232_r

5、x1<=1'b0;rs232_rx2<=1'b0;rs232_rx3<=1'b0;endelsebeginrs232_rx0<=rs232_rx;rs232_rx1<=rs232_rx0;rs232_rx2<=rs232_rx1;rs232_rx3<=rs232_rx2;endendassignneg_rs232_rx=rs232_rx3&rs232_rx2&rs232_rx1&rs232_rx0;regbps_start_r;reg3:0num;regrx_int;从蓝牙模块（硬件）处接收到下沿标志al

6、ways(posedgeclkorposedgerst_n)if(rst_n)beginbps_start_r<=1'bz;rx_int<=1'b0;end启动信号检测模块（即上5I检测后得到尹分八次检测，分别存入8位的皆存器elseif(neg_rs232_rx)begin/bps_start_r<=1'b1;一_rx_int<=1'b1;endelseif(num=4'd12)beginbps_start_r<=1'b0;rx_int<=1'b0;endassignbps_start=bps_sta

7、rt_r;reg7:0rx_data_r;reg7:0rx_temp_data;always(posedgeclkorposedgerst_n)if(rst_n)beginled<=10'b000_0000000;rx_temp_data<=8'd0;num<=4'd0;rx_data_r<=8'd0;endelseif(rx_int)beginif(clk_bps)beginnum<=num+1'b1;case(num)4'd1:rx_temp_data0<=rs232_rx;4'd2:rx_temp

8、_data1<=rs232_rx;4'd3:rx_temp_data2<=rs232_rx;4'd4:rx_temp_data3<=rs232_rx;4'd5:rx_temp_data4<=rs232_rx;4'd6:rx_temp_data5<=rs232_rx;4'd7:rx_temp_data6<=rs232_rx;4'd8:rx_temp_data7<=rs232_rx;default:;endcasecase(rx_temp_data)8'b00000000:led<=10'

9、;b000_0000000;8'b00000001:led<=10'b001_0000001;8'b00000010:led<=10'b001_0000010;8'b00000011:led<=10'b001_0000100;8'b00000100:led<=10'b001_0001000;8'b00000101:led<=10'b001_0010000;8'b00000110:led<=10'b001_0100000;8'b00000111:led<

10、;=10'b001_1000000;8'b00001000:led<=10'b010_0000001;8'b00001001:led<=10'b010_0000010;8'b00001010:led<=10'b010_0000100;8'b00001011:led<=10'b010_0001000;8'b00001100:led<=10'b010_0010000;8'b00001101:led<=10'b010_0100000;8'b0000111

11、0:led<=10'b010_1000000;8'b00001111:led<=10'b100_0000001;8'b00010000:led<=10'b100_0000010;8'b00010001:led<=10'b100_0000100;8'b00010010:led<=10'b100_0001000;8'b00010011:led<=10'b100_0010000;8'b00010100:led<=10'b100_0100000;8'

12、b00010101:led<=10'b100_1000000;endcaseled_new<=rx_temp_data;*endVga分频elseif(num=4'd12)beginnum<=4'd0;/数据接收完毕rx_data_r<=rx_temp_data;endendassignrx_data=rx_data_r;endmodulemodulesound(clk,rst_n,led_new,sound_out);inputclk;input嵩£_因为调试初期是使用led来进行检测的，某些命名不方便改outputregsound_

13、out;作蠢嘛羿周此就继续沿用always(posedgeclkorposedgerst_n)beginif(rst_n)value<=1'b0;elsebegincase(led_new)8'd1:fre<=18'd18898;8'd2:fre<=18'd21212;8'd3:fre<=18'd19515;8'd4:fre<=18'd25223;8'd5:fre<=18'd28315;8'd6:fre<=18'd31783;8'd7:fre

14、<=18'd35674;8'd8:fre<=18'd37796;8'd9:fre<=18'd42424;8'd10:fre<=18'd47588;8'd11:fre<=18'd50451;8'd12:fre<=18'd56608;8'd13:fre<=18'd63566;8'd14:fre<=18'd71348;8'd15:fre<=18'd75592;8'd16:fre<=18'd8

15、4843;8'd17:fre<=18'd95177;接收到蓝牙主模块发送过来的8位信号，并8'd18:fre<=18'd100846;8'd19:fre<=18'd113259;8'd20:fre<=18'd127130;8'd21:fre<=18'd142680;default:fre<=18'd86;endcasevalue<=value+fre;endend/记满了便进行输出always(posedgeclkorposedgerst_n)beginif(rst

16、_n)sound_out<=1'b0;elsebeginif(value<32'h7FFF_FFsound_out<=1'b0;elsesound_out<=1'b1;endendendmodule仿真FPGAF发的布局布线后的时序和资源利用报告实验成功的开发板截图最终主模块代码moduletonetop(clk,clr,rxd,hsync,vsync,rgb_8bits,sound_out);inputclk;inputclr;inputrxd;outputhsync;outputvsync;output7:0rgb_8bits;out

17、putsound_out;wire7:0led_new;wire9:0control;wire20:0tone;sounds(.clk(clk),.rst_n(clr),.led_new(led_new),.sound_out(sound_out);uart_topuut4(.clk(clk),.rst_n(clr),.rs232_rx(rxd),.led(control),.led_new(led_new);keynauut1(.clr(clr),.clk(clk),.control(control),.tone(tone);vgauut2(.clk(clk),.clr(clr),.tone

18、(tone),.hsync(hsync),.vsync(vsync),.rgb_8bits(rgb_8bits);Endmodule分频器代码modulesound(clk,rst_n,led_new,sound_out);inputclk;inputrst_n;input7:0led_new;outputregsound_out;reg18:0fre;/parameterFREQ_WORD=32'd44;/1KHzreg31:0value=0;always(posedgeclkorposedgerst_n)beginif(rst_n)value<=1'b0;elsebe

19、gincase(led_new)8'd1:fre<=18'd18898;8'd2:fre<=18'd21212;8'd3:fre<=18'd19515;8'd4:fre<=18'd25223;8'd5:fre<=18'd28315;8'd6:fre<=18'd31783;8'd7:fre<=18'd35674;8'd8:fre<=18'd37796;8'd9:fre<=18'd42424;8'

20、;d10:fre<=18'd47588;8'd11:fre<=18'd50451;8'd12:fre<=18'd56608;8'd13:fre<=18'd63566;8'd14:fre<=18'd71348;8'd15:fre<=18'd75592;8'd16:fre<=18'd84843;8'd17:fre<=18'd95177;8'd18:fre<=18'd100846;8'd19:fre<

21、;=18'd113259;8'd20:fre<=18'd127130;8'd21:fre<=18'd142680;default:fre<=18'd86;endcasevalue<=value+fre;endend/always(posedgeclkorposedgerst_n)beginif(rst_n)sound_out<=1'b0;elsebeginif(value<32'h7FFF_FFFF)sound_out<=1'b0;elsesound_out<=1'b

22、1;endendendmodule蓝牙主模块代码'timescale1ns/1psmoduleuart_top(clk,rst_n,rs232_rx,led,led_new);inputclk;/时钟信号50Minputrst_n;/复位信号，低有效inputrs232_rx;/数据输入信号/数据输出信号output9:0led;output7:0led_new;wire7:0led_new;wirebps_start1，bps_start2;/wireclk_bps1，clk_bps2;wire7:0rx_data;/接收数据存储器，用来存储接收到的数据，直到下一个数据接收wirer

23、x_int;/接收数据中断信号，接收过程中一直为高，/子模块端口申明/speed_select_rxspeed_rx(/数据接收波特率选择模块.clk(clk)，.rst_n(rst_n)，.bps_start(bps_start1)，.clk_bps(clk_bps1);uart_rxuart_rx(/数据接收模块.clk(clk)，.rst_n(rst_n)，.bps_start(bps_start1)，.clk_bps(clk_bps1)，.rs232_rx(rs232_rx)，.rx_data(rx_data)，.rx_int(rx_int)，.led(led)，.led_new(le

24、d_new);Endmodule波特率设置以及信号检测代码modulespeed_select_rx(clk，rst_n，bps_start，clk_bps);/inputclk;/50Minputrst_n;/inputbps_start;/outputclk_bps;/波特率设定/'defineBPS_PARA5207;/9600/'defineBPS_PARA_22603;/reg12:0cnt;/regclk_bps_r;/reg2:0uart_ctrl;/时钟复位信号接收到信号以后，波特率时钟信号置位接收数据中间采样点，波特率分频计数值计数一半时采样分频计数器波特率时

25、钟寄存器波特率选择寄存器always(posedgeclkorposedgerst_n)if(rst_n)cnt<=13'd0;elseif(cnt=5207)|!bps_start)/cnt<=13'd0;elsecnt<=cnt+1'b1;/波特率时钟启动always(posedgeclkorposedgerst_n)beginif(rst_n)clk_bps_r<=1'b0;elseif(cnt=2603)/clk_bps_r<=1'b1;判断计数是否达到，当接收到uart_rx传来的信号以后，模块开始运行1个脉宽当波

26、特率计数到一半时，进行采样存储elseclk_bps_r<=1'b0;将采样数据输出给uart_rx模块endassignclk_bps=clk_bps_r;/endmodule蓝牙数据接收以及编码代码moduleuart_rx(clk,rst_n,bps_start,clk_bps,rs232_rx,rx_data,rx_int,led,lednew)；时钟复位接收数据信号高电平时为接收信号中间采样点接收信号时，波特率时钟信号置位接收数据寄存器接收数据中断信号，接收过程中为高inputclk;/inputrst_n;/inputrs232_rx;/inputclk_bps;/o

27、utputbps_start;/output7:0rx_data;/outputrx_int;/output9:0led;outputreg7:0led_new;接收数据寄存器reg9:0led;regrs232_rx0,rs232_rx1,rs232_rx2,rs232_rx3;/wireneg_rs232_rx;/表示数据线接收到下沿always(posedgeclkorposedgerst_n)beginif(rst_n)beginrs232_rx0<=1'b0;rs232_rx1<=1'b0;rs232_rx2<=1'b0;rs232_rx3&

28、lt;=1'b0;endelsebeginrs232_rx0<=rs232_rx;rs232_rx1<=rs232_rx0;rs232_rx2<=rs232_rx1;rs232_rx3<=rs232_rx2;end串口传输线的下沿标志endassignneg_rs232_rx=rs232_rx3&rs232_rx2&rs232_rx1&rs232_rx0;/regbps_start_r;reg3:0num;/移位次数regrx_int;/接收中断信号always(posedgeclkorposedgerst_n)if(rst_n)begi

29、nbps_start_r<=1'bz;rx_int<=1'b0;endelseif(neg_rs232_rx)begin/bps_start_r<=1'b1;/启动串口，准备接收数据rx_int<=1'b1;/接收数据中断使能endelseif(num=4'd12)begin/接收完有用的信号,bps_start_r<=1'b0;/接收完毕,改变波特率置位,方便下次接收rx_int<=1'b0;/接收信号关闭endassignbps_start=bps_start_r;reg7:0rx_data_r;/

30、串口数据寄存器reg7:0rx_temp_data;/当前数据寄存器always(posedgeclkorposedgerst_n)if(rst_n)beginled<=10'b000_0000000;rx_temp_data<=8'd0;num<=4'd0;rx_data_r<=8'd0;end接收数据处理elseif(rx_int)begin/if(clk_bps)beginnum<=num+1'b1;case(num)4'd1:rx_temp_data0<=rs232_rx;4'd2:rx_tem

31、p_data1<=rs232_rx;4'd3:rx_temp_data2<=rs232_rx;4'd4:rx_temp_data3<=rs232_rx;4'd5:rx_temp_data4<=rs232_rx;4'd6:rx_temp_data5<=rs232_rx;4'd7:rx_temp_data6<=rs232_rx;4'd8:rx_temp_data7<=rs232_rx;default:;endcasecase(rx_temp_data)8'b00000000:led<=10

32、9;b000_0000000;8'b00000001:led<=10'b001_0000001;8'b00000010:led<=10'b001_0000010;8'b00000011:led<=10'b001_0000100;8'b00000100:led<=10'b001_0001000;8'b00000101:led<=10'b001_0010000;8'b00000110:led<=10'b001_0100000;8'b00000111:led&l

33、t;=10'b001_1000000;8'b00001000:led<=10'b010_0000001;8'b00001001:led<=10'b010_0000010;8'b00001010:led<=10'b010_0000100;8'b00001011:led<=10'b010_0001000;8'b00001100:led<=10'b010_0010000;8'b00001101:led<=10'b010_0100000;8'b000011

34、10:led<=10'b010_1000000;8'b00001111:led<=10'b100_0000001;8'b00010000:led<=10'b100_0000010;8'b00010001:led<=10'b100_0000100;8'b00010010:led<=10'b100_0001000;8'b00010011:led<=10'b100_0010000;8'b00010100:led<=10'b100_0100000;8'

35、;b00010101:led<=10'b100_1000000;endcaseled_new<=rx_temp_data;endelseif(num=4'd12)beginnum<=4'd0;/数据接收完毕rx_data_r<=rx_temp_data;endendassignrx_data=rx_data_r;endmoduleVG戚据接收以及编码代码modulekeyna(control,clr,clk,tone);input9:0control;inputclk;inputclr;outputreg20:0tone;always(posed

36、geclkorposedgeclr)if(clr=1'b1)tone<=21'd0;elsebegincase(control9:7)3'b100:begincase(control6:0)7'b1000000：tone<=21'b1_0000_0000_0000_0000_0000;7'b0100000：tone<=21'b0_1000_0000_0000_0000_0000;7'b0010000：tone<=21'b0_0100_0000_0000_0000_0000;7'b000100

37、0：tone<=21'b0_0010_0000_0000_0000_0000;7'b0000100：tone<=21'b0_0001_0000_0000_0000_0000;7'b0000010：tone<=21'b0_0000_1000_0000_0000_0000;7'b0000001：tone<=21'b0_0000_0100_0000_0000_0000;endcaseend3'b010:begincase(control6:0)7'b1000000：tone<=21'b0_0

38、000_0010_0000_0000_0000；7'b0100000:tone<=21'b0_0000_0001_0000_0000_0000;7'b0010000:tone<=21'b0_0000_0000_1000_0000_0000;7'b0001000:tone<=21'b0_0000_0000_0100_0000_0000;7'b0000100:tone<=21'b0_0000_0000_0010_0000_0000;7'b0000010:tone<=21'b0_0000_0

39、000_0001_0000_0000;7'b0000001:tone<=21'b0_0000_0000_0000_1000_0000;endcaseend3'b001:begincase(control6:0)7'b1000000:tone<=21'b0_0000_0000_0000_0100_0000;7'b0100000:tone<=21'b0_0000_0000_0000_0010_0000;7'b0010000:tone<=21'b0_0000_0000_0000_0001_0000;7&#

40、39;b0001000:tone<=21'b0_0000_0000_0000_0000_1000;7'b0000100:tone<=21'b0_0000_0000_0000_0000_0100;7'b0000010:tone<=21'b0_0000_0000_0000_0000_0010;7'b0000001:tone<=21'b0_0000_0000_0000_0000_0001;endcaseenddefault:tone<=21'd0;endcaseendendmoduleVGAtt据输出代码m

41、odulevga(clk,clr,hsync,vsync,rgb_8bits,tone);input20:0tone;inputclk;inputclr;outputwirehsync;outputwirevsync;outputrgb_8bits;reg7:0rgb_8bits;reg10:0cnt_h;reg9:0cnt_v;wire10:0count_h;wire9:0count_v;assigncount_h=cnt_h-150;assigncount_v=cnt_v;always(posedgeclkorposedgeclr)beginif(clr)cnt_h<=11'

42、d0;elseif(cnt_h=11'd1056)cnt_h<=11'd0;elsecnt_h<=cnt_h+1;endalways(posedgeclkorposedgeclr)if(clr)cnt_v<=10'd0;elseif(cnt_v=10'd625)cnt_v<=10'd0;elseif(cnt_h=11'd1056)cnt_v<=cnt_v+1;/*/assignhsync=(cnt_h<=11'd80)?1'b0:1'b1;assignvsync=(cnt_v<=1

43、0'd3)?1'b0:1'b1;wirea1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15,a16,a17,a18,a19,a20,a21;assigna1=(count_h>=100&&count_h<=120&&count_v>=100&&count_v<=350)|(count_h>=100&&count_h<=129&&count_v>350&&count_v<=500)

44、&&(tone0=1'b0)?1'b1:1'b0;assigna2=(count_h>=140&&count_h<=150&&count_v>=100&&count_v<=350)|(count_h>=131&&count_h<=159&&count_v>350&&count_v<=500)&&(tone1=1'b0)?1'b1:1'b0;assigna3=(count_h

45、>=170&&count_h<=189&&count_v>=100&&count_v<=350)|(count_h>=161&&count_h<=189&&count_v>350&&count_v<=500)&&(tone2=1'b0)?1'b1:1'b0;assigna4=(count_h>=191&&count_h<=210&&count_v>=100&

46、;&count_v<=350)|(count_h>=191&&count_h<=219&&count_v>350&&count_v<=500)&&(tone3=1'b0)?1'b1:1'b0;assigna5=(count_h>=230&&count_h<=240&&count_v>=100&&count_v<=350)|(count_h>=221&&count_h<=2

47、49&&count_v>350&&count_v<=500)&&(tone4=1'b0)?1'b1:1'b0;assigna6=(count_h>=260&&count_h<=270&&count_v>=100&&count_v<=350)|(count_h>=251&&count_h<=279&&count_v>350&&count_v<=500)&&

48、(tone5=1'b0)?1'b1:1'b0;assigna7=(count_h>=290&&count_h<=309&&count_v>=100&&count_v<=350)|(count_h>=281&&count_h<=309&&count_v>350&&count_v<=500)&&(tone6=1'b0)?1'b1:1'b0;assigna8=(count_h>=311&a

49、mp;&count_h<=330&&count_v>=100&&count_v<=350)|(count_h>=311&&count_h<=339&&count_v>350&&count_v<=500)&&(tone7=1'b0)?1'b1:1'b0;assigna9=(count_h>=350&&count_h<=360&&count_v>=100&&coun

50、t_v<=350)|(count_h>=341&&count_h<=369&&count_v>350&&count_v<=500)&&(tone8=1'b0)?1'b1:1'b0;assigna10=(count_h>=380&&count_h<=399&&count_v>=100&&count_v<=350)|(count_h>=371&&count_h<=399&&a

51、mp;count_v>350&&count_v<=500)&&(tone9=1'b0)?1'b1:1'b0;assigna11=(count_h>=401&&count_h<=420&&count_v>=100&&count_v<=350)|(count_h>=401&&count_h<=429&&count_v>350&&count_v<=500)&&(tone10=

52、1'b0)?1'b1:1'b0;assigna12=(count_h>=440&&count_h<=450&&count_v>=100&&count_v<=350)|(count_h>=431&&count_h<=459&&count_v>350&&count_v<=500)&&(tone11=1'b0)?1'b1:1'b0;assigna13=(count_h>=470&&

53、amp;count_h<=480&&count_v>=100&&count_v<=350)|(count_h>=461&&count_h<=489&&count_v>350&&count_v<=500)&&(tone12=1'b0)?1'b1:1'b0;assigna14=(count_h>=500&&count_h<=519&&count_v>=100&&count_v<=350)|(count_h>=491&&count_h<=519&&count_v>350&&count_v<=500)&&(tone13=1'b0)?1'b1:1'b0;assigna15=(count_h>=521&&count_h<=540&&count_v>=100&&count_v<=3