数字电路讲义肖第4章ch

1、4.1 编码器编码器第四章第四章 常用组合逻辑功能器件常用组合逻辑功能器件4.2 译码器译码器/数据分配器数据分配器4.3 数据选择器数据选择器4.4 数值比较器数值比较器4.5 算术运算电路算术运算电路上一章小结上一章小结本章小结本章小结习题习题4.1 编码器编码器二进制编码器二进制编码器 (b)(b)用二极管组成用二极管组成图图2.22.2三位二进制编码器三位二进制编码器VCCY0Y1Y2RRR0I1I3I5I7I2I4I6I(a)(a)用与非门组成用与非门组成Y0Y1Y20I2I4I6I1I3I5I7I表 2.1 三位二进制编码器的真值表输入输出0I1I2I3I4I5I6I7IY2Y1Y

2、00111111100010111111001110111110101110111101111110111100111110111011111110111011111110111765427632175310IIIIYIIIIYIIIIY逻辑函数表达式逻辑函数表达式图2.38线3线优先编码器G3G2G10I2I1I3I5I4I6I7IEXY0Y2Y1YSYS优先编码器优先编码器7654276543542176564364210IIIIYIIIIIIIIYIIIIIIIIIIYSIIIYS710SIIISSIIIYEX710710逻辑函数表达式逻辑函数表达式表 2.28 线3 线优先编码器的真值

3、表输入输出0I1I2I3I4I5I6I7I2Y1Y0Y000001001011010011101101111100011111101011111111001111111111Z0Z1Z2Z3G0G3G2G1(2)SYEXYS0Y2Y1Y0I2I1I3I5I4I6I7I7A0A2A1A3A5A4A6A15A8A10A9A11A13A12A14A图图2.4用两片用两片74LS148组成的组成的16线线4线编码器线编码器(1)SYEXYS0Y2Y1Y0I2I1I3I5I4I6I7I级联级联图图2.5二十进制优先编码器二十进制优先编码器（74LS147）9I2I1I3I5I4I6I7I8I3Y0Y2Y

4、1Y自学98398798698598429879869854398542199879865986439864210IIYIIIIIIIIIIIIYIIIIIIIIIIIIIIIIYIIIIIIIIIIIIIIIIIIIY表表2.3 二二十十进进制制优优先先编编码码器器的的真真值值表表输输入入输输出出1I2I3I4I5I6I7I8I9I3Y2Y1Y0Y1111111111111 00110 010111 0111000 01111001 011111010 0111111011 01111111100 0111111111010111111111110逻辑函数表达式逻辑函数表达式自学4.2 译码

5、器译码器/数据分配器数据分配器二进制译码器二进制译码器0123012201210120AAAYAAAYAAAYAAAY0127012601250124AAAYAAAYAAAYAAAY图图2.62.6用与非门组成的用与非门组成的3 3线线8 8线译码器线译码器G0G7G6G5G4G3G2G1GSSA0A1A2S13Y0Y2Y1Y7Y4Y6Y5Y2S3S逻辑函数表达式逻辑函数表达式图图2.7二极管译码器二极管译码器Y7Y6Y5Y4Y3Y2Y1Y0VCCRRRRRRRRA0A1A22A0A1A(+10V)3Y0Y2Y1Y7Y4Y6Y5YS图图2.8译码器数据分配功能示意译码器数据分配功能示意图图表表

6、 2.2.4 4三位二进制译码器的真值表三位二进制译码器的真值表输入输入输出输出A2A1A0Y7Y6Y5Y4Y3Y2Y1Y00000000000100100000010010000001000110000100010000010000101001000001100100000011110000000图图2.9用两片用两片74LS138组成的组成的4线线16线译码器线译码器10Y12Y11Y13Y15Y14Y16Y17Y20Y22Y21Y23Y25Y24Y26Y27Y74LS138(1)A0A1A2S13S2S0123456774LS138(2)A0A1A2S13S2S01234567D0D1D

7、2D31级联级联01232170123216012321501232140123213012321201232110123210AAASSSYAAASSSYAAASSSYAAASSSYAAASSSYAAASSSYAAASSSYAAASSSY0123170123160123150123140123130123120123110123103321, 1DDDDYDDDDYDDDDYDDDDYDDDDYDDDDYDDDDYDDDDYDSSS01232701232601232501232401232301232201232101232032310,DDDDYDDDDYDDDDYDDDDYDDDDYDD

8、DDYDDDDYDDDDYSSDS图图2.10二十进制译码器电路二十进制译码器电路9Y5Y6Y7Y8Y3Y0Y2Y1YA3A2A04YA1二十进制译码器二十进制译码器自学01239012380123701236012350123401233012320123101230AAAAYAAAAYAAAAYAAAAYAAAAYAAAAYAAAAYAAAAYAAAAYAAAAY表 2.5二十进制译码器的真值表输入输出序号A3A2A1A00Y1Y2Y3Y4Y5Y6Y7Y8Y9Y00000011111111110001101111111120010110111111130011111011111140100

9、11110111115010111111011116011011111101117011111111110118100011111111019100111111111101010111111111110111111111111110011111111111101111111111111101111111111伪码11111111111111自学多路选择器（数据选择器）多路选择器（数据选择器）SAADAADAADAADQ1)(1)(1)(1)(1 1013012011010表表 2.6 74153 型双四选一多路选择器功能表型双四选一多路选择器功能表允许1S10000允许2S10000A1001

10、1A10011地址码A00101地址码A00101输出1Q01D01D11D21D3输出2Q02D02D12D22D3SAADAADAADAADQ2)(2)(2)(2)(220130120110104.3 数据选择器数据选择器图图2.11 74153型双四选一多路选择型双四选一多路选择器器（a）逻辑图）逻辑图（b）等效电路）等效电路（C）方框图）方框图1QA0A11D01D32Q1S2D02D32S1Q1D01D11D21D32Q2D02D12D22D31Q2Q1&1&1111111S1D01D11D21D3A1A02S2D02D12D22D3图图2.12双十六选一多路选择器双

11、十六选一多路选择器1QA1A01D0 1D32Q1S2D0 2D32S1QA1A01D0 1D32Q1S2D0 2D32S1QA1A01D0 1D32Q1S2D0 2D32S1QA1A01D0 1D32Q1S2D0 2D32S1QA1A01D0 1D32Q1S2D02D32Sa输出输出 b输出输出A0A1A2A30a1a2a3a4a5a6a7a8a9a10a11a 12a13a14a15a0b1b2b3b4b5b6b7b8b9b10b11b12b13b14b15ba输入输入b输入输入自学表表 2.7 双十六选一多路选择器的输出双十六选一多路选择器的输出地址码地址码A3A2A1A0a 输出输出b

12、 输出输出00000a0b00011a1b00102a2b00113a3b01004a4b01015a5b01106a6b01117a7b10008a8b10019a9b101010a10b101111a11b110012a12b110113a13b111014a14b111115a15b自学表 2.8 8.4.2.1BCD 码的奇偶监督位奇偶监督位十进制数8.4.2.1BCD 码（信息码）奇性偶性0000010100010120010013001110401000150101106011010701110181000019100110奇偶校验器奇偶校验器检验数据码中检验数据码中1的总个数是奇

13、数还的总个数是奇数还是偶数是偶数21PPF表 2.9 异或门真值表P1P2F1 的总个数000110偶数011101奇数图图2.13九位奇偶检验电路九位奇偶检验电路（a）串联型）串联型QOD奇输出奇输出=1=1=1P1 P2 P3P4P8P7P6P5P9=1=1=1=1=1=1=1=1=1=1=1=1=1QOD奇输出奇输出P1P2P3P4P8P7P6P5P9（b）树型）树型987654321PPPPPPPPPQODQODP1P2P3P4P8P7P6P5P9QODP1P2P3P4P8P7P6P5P9QODP1P2P3P4P8P7P6P5P9QODP1P2P3P4P8P7P6P5P9P1P2P9P

14、10P11P18P73P74P8181位QODP1P2P3P4P8P7P6P5P9QODP1P2P3P4P8P7P6P5P9QODP1P2P3P4P8P7P6P5P9P1P2P9P10P11P17P18P19P2525位奇输出奇输出25位奇性检验位奇性检验81位奇性检位奇性检验验奇输出奇输出自学图图2.14奇性奇偶检验的数据传送奇性奇偶检验的数据传送奇监督位产生器奇监督位产生器奇偶检验器奇偶检验器八八位位信信息息码码QODP1P2P3P4P8P7P6P5P9QODP1P2P3P4P8P7P6P5P9接接收收门门奇奇监监督督位位输输出出0表表示示错错误误1八八位位信信息息码码自学表表 2.102

15、.10 比较电路的真值表比较电路的真值表AB(AB) (AB) (A=B) (AB) (AB)(AB)o(AB)I(AB)I&1&1&1&1&1&1&A2B2A1B1A0B0P0P1P2P3图图2.16 74852.16 7485型四位数字比较器逻辑图型四位数字比较器逻辑图)()()(33333333333BABABABBAAP)()()(000001111122222BABAPBABAPBABAP比较图比较图2.15和图和图2.16自学IOBABABABABABA)()()()()(00112233)()()()()()()()()()

16、()()()()()()(001122331122332233330011223300112233BABABABABABABABABABABABABABABABABABABABABAIIO)()()()()()()()()()()()()()()()(001122331122332233330011223300112233BABABABABABABABABABABABABABABABABABABABABAIIO3 , 2 , 1 , 0)(3 , 2 , 1 , 0)(iBABAiBABAiiiiiiii自学表表2.11 7485型型四四位位数数字字比比较较器器功功能能表表比较输入级联输入输出

17、A3,B3A2,B2A1,B1A0,B0(AB)I(AB)OA3B3001A3B2001A3=B3A2B1001A3=B3A2=B2A1B0001A3=B3A2=B2A1=B1A0B0100A3=B3A2=B2A1=B1A0=B0001001A3=B3A2=B2A1=B1A0=B0100100A3=B3A2=B2A1=B1A0=B0010010A3=B3A2=B2A1=B1A0=B01010A3=B3A2=B2A1=B1A0=B0101000A3=B3A2=B2A1=B1A0=B0000101自学B0 B1 B2 B3A0 A1 A2 A3(AB)I(A=B)I(AB)o0 1 0A0 A1

18、A2 A3B0 B1 B2 B3(AB)I(A=B)I(AB)oB0 B1 B2 B3B4 B5 B6 B7A4 A5 A6 A7A0 A1 A2 A3(AB)I(A=B)I(AB)oB0 B1 B2 B3B20B21B22B23A0 A1 A2 A3A20A21A22A23图图2.17 242.17 24位串行比较器位串行比较器IIIVI输出输入自学图图2.18 242.18 24位并行比较器位并行比较器010A0 A1 A2 A3B0 B1 B2 B3A40B4(AB)I(A=B)I(AB)oB0 B1 B2 B3A0 A1 A2 A3输出输入VII(AB)I(A=B)I(AB)oB0 B

19、1 B2 B3A0 A1 A2 A3II(AB)I(A=B)I(AB)oB0 B1 B2 B3A0 A1 A2 A3III(AB)I(A=B)I(AB)oB0 B1 B2 B3A0 A1 A2 A3IV(AB)I(A=B)I(AB)oB0 B1 B2 B3A0 A1 A2 A3V(AB)I(A=B)I(AB)oB0 B1 B2 B3A0 A1 A2 A3B5 B6 B7 B8A5 A6 A7 A8A90B9B10B11B12B13A10A11A12A13A 1 4 0 B14B15B16B17B18A15A16A17A18A 1 9 0 B19B20B21B22B23A20A21A22A23自

20、学表 2.12 半加器的真值表ABS000011101110BABABAS加法电路加法电路4.5 算术运算电路算术运算电路iiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiBAGBAPCPCBACBACBACBACBASGCPCBACBACBACBAC1图图2.19全加器的逻辑图全加器的逻辑图CiCi+1SiAi Bi逻辑符号逻辑符号CiSiAiBi&Ci1=1&1=1PiGi表 2.13 一位全加器的真值表AiBiCiSiCi+10000000110010100110110010101011100111111Ci+1SiCi+1SiCi+1SiA

21、i BiCi+1SiCiC4S3S2S1S0A0 B0A1 B1A2 B2A3 B3图图2.20四位串行加法器四位串行加法器Ai BiCiAi BiCiAi BiCiiiiiGCPC1超前进位加法器超前进位加法器提高工作速度的途径：设法减小进位信号的传递时间提高工作速度的途径：设法减小进位信号的传递时间进位传递公式2222221111110000002120121012212210110110110100BAGBAPBAGBAPBAGBAPGGPGPPCPPPGCPCGGPCPPGCPCGCPC图图2.21超前进位形成电路超前进位形成电路& 11& 11& 11&

22、; 11&P* G*C-1C0C1C2G0P0G1P1G2P2G3P33231230123*0123*GGPGPPGPPPGPPPPP超前进位扩展端超前进位扩展端图图2.22四位二进制超前进位加法电路四位二进制超前进位加法电路P0G0C0S3S2S1S0A0 B0A1 B1A2 B2A3 B3全加器全加器全加器全加器C-1超前进位形成逻辑P1G1C1P2G2C2P3G3C-1P* G*2*1*2*0*1*2*1*0*1*211*2*1*0*1*1*0*17*1*0*1*03*0GGPGPPCPPPCCGGPCPPCCGCPCC*3*2*3*1*2*3*0*1*2*3*0*1*2*3*G

23、GPGPPGPPPGPPPPP图图2.23十六位超前进位加法电路十六位超前进位加法电路P*0G*0C*0S1215S811S47S03A03 B03四位加法器C-1超前进位形成逻辑P*1G*1C*1P*2G*2C*2P*3G*3C-1P* G*四位加法器四位加法器四位加法器A47 B47A811 B811A1215 B1215自学减法电路减法电路全减器全减器0101110101)01010AnBnDn表 2.14 全减器真值表AnBnC*n-1C*nDn0000000111010110111010001101001100011111C*n为为n位向位向n+1位的借位位的借位C*n-1为为n-1

24、位向位向n位的借位位的借位*1nnnnCBAD AnBnC*n-100 01 11 100010111010*1*1*nnnnnnnCBCABAC AnBnC*n-1000111100010011110&=1=1&1AnBn C*n-1DnC*nP-QP-QBOPQBIAnBnC*n-1DnC*n图图2.24全减器逻辑图全减器逻辑图逻辑符号逻辑符号P-QP-QBOPQBIA1B1C*2C*3P-QP-QBOPQBIP-QP-QBOPQBIP-QP-QBOPQBIC*1C*0A0B0D0A2B2D1D3D2A3B3图图2.25四位减法器四位减法器原码原码反码反码补码补码21011

25、00N2010011反N22010100) 1010011(1反补NN补码的补码为原码补码的补码为原码2210110011010111)010100(反补补NN表2.15 三种不同的三位二进制正、负数表示法二进制数十进制数原码反码补码-81000-7111110001001-6111010011010-5110110101011-4110010111100-3101111001101-2101011011110-1100111101111-010001111+00000000000001000100010001200100010001030011001100114010001000100501

26、010101010160110011001107011101110111000111100010010000110+)+9+6+)+1500010011111010+)10000011+96+)+3抛弃补码表示的加法补码表示的加法（AB）补=（A）补（B）补11101110000110+)11111019+6+)311101111111010+)1111000196+)15抛弃对应的二进制补码对应的二进制补码对应的二进制补码对应的二进制补码例例6例例3例例5例例4A0B0A1B1A2B2A3B3C1四位加法器S0S1S2S3C3D0D1D2D3不用A0B0A1B1A2B2A3B31图图2.26

27、四位减法电路四位减法电路补码表示的减法补码表示的减法D=A-B, AB自学表表 2.16 74181 功能表功能表（正逻辑）（正逻辑）功能选择功能选择M1M0 算术运算算术运算S3S2S1S0逻辑运算逻辑运算1nC（无进位）（无进位）0nC（有进位）（有进位）0000AF F=AF=A 加加 10001BAFF=A+BF=(A+B)加加 10010BAF BAFF=(A+B)加加 10011F=0F=减减 1（2 补表示）补表示）F=00100ABF F=A 加加BAF=A 加加BA加加 10101BF F=(A+B)加加BAF=(A+B)加加BA加加 10110BAFF=A 减减 B 减减 1F=A 减减 B0111BAF F=BA减减 1F=BA1000BAFF=A 加加 ABF=A 加加 AB 加加 11001