香山：开源芯片时代的产业级RISC-V处理器 XiangShan Industrial-Competitive RISC-V CPUs in the Era of Open-Source Chips

3839eachwithitsownecosystem.4041*YungangBao,TheFourStepstoAnOpen-SourceChipDesignEcosystem,ACMSIGARCHVisioningWorkshop,June20194243ThreelevelsofOSCE L2:OPENDesign&ImplementationL3:OPENTools&InfrastructureopenTools&InfrastructureEngineeringMicroarch.3openTools&InfrastructureEngineeringMicroarch.3LayoutISASpec.1opensARTLcodesDocsLayoutISASpec.1opensARTLcodesDocs4445V.S.V.S.•Openandsharedecosystem46EverwonderhowyoursmartphoneconnectstoyourBluetoothspeaker,giventheyweremadebydifferentcompanies?Well,Bluetoothisanopenstandard,meaningitsdesignspecifications,suchastherequiredfrequencyanditsdataencodingprotocols,arepubliclyavailable.Softwareandhardwarebasedonopenstandards—Ethernet,Wi-Fi,PDF—havebecomehouseholdnames.NowanopenstandardknownasRISC-V(pronounced“riskfive”)couldchangehowcompaniescreatecomputerchips.---MITTechnologyReview47SHDSHDgroupGlobalRevenueForecastforRISC-VSoCChips48 4950 L1:OPENISA(RISC-V)L2:OPENDesign/ImplementationL3:OPENFramework/Tools51fromacademia.**UpdatedJanuary5,202352/OpenXiangShan/XiangShan21.6915.7314.7215.7314.7211.009.557.018.659.9011.009.557.016.11XT910YQHSiFiveP550XT910YQHSiFiveP550NH(Estimated)ARMCortex-A76SiFiveP650KMH(Estimated)ARMCortex-X1AppleM1•Closecollaborationwithindustrialpartners53•Vector/Hypervisorextensionsupported54•SupportRISC-VVector/Hypervisorextension•SupportRVA23profile•SupportinterconnectionbasedonCHIprotocolAgileDevelopmentModel•Performanceboostinfrontend,backend,load-storeunitandcache•PerformancemodelcalibratedwithRTLAgileDevelopmentModel•Workflow：DSEonperfmodel=>Impl.&finetunningonRTL•Hierarchicalverificationflowspanningsystem/integration/unitlevel+FPGAprototyping•Industrial-gradeverificationprocess•Experiencedphysicaldesignteam•SimultaneousiterationofRTLcodingbasedontimingevaluation*UpdatedinMarch202555FrontendBackendFrontendBackendMemblockMemblock5674SPECint2006per-GHzX4V2N2N2A78A77A76A75AJointTeamA7AJointTeamA732016201720182019202020212022202320242025575859ImpreciseStoreExceSNSvSNSv2,MICRO'23(DukeUniversity)6061XiangShanChips626363/OpenXiangShan/difftest64InstructioncommitInstructioncommitrExternalinterruptsrExternalinterruptsOtherinformationCompareCompareref_step(icnt);}65•Keyidea:informationprobessupportflexibledifferentscenariosVH66New67•OptimizescommunicationoverheadforverificationdatapacketsFigure:workflow68VeriluaVeriluaCocotbPyMTL/PyHGL/ChiselUVM/SV核心技术VPIMLVPI单一语言垂直整合执行模型在线仿真+离线分析在线仿真在线仿真在线仿真验证资产复用跨语言、跨场景否跨语言否YYYYYYYYWALY学习门槛低中中高高NewNewoptionforhardwareverification6969/cyril0124/veriluamain.lua/OpenXiangShan/GEM570XS-GEM5:CalibratedGem5SimulatorSimulator-basedperformancebottleneckanalysiscalibrationSimulator-basedfeaturecalibrationSimulator-basedfeaturereviewimplementationSimulator-basedimplementationevaluationfeaturefeaturereviewperformanceimplementationimplementationfeaturereviewXS-GEM5:CalibratedGem5Simulatorbefore-calibrationafter-calibration-0.2%400.c437.leslie3d454.calculix465.tonto470.lbm500.perlbench505.mcf520.omnetpp519.lbm549.fotonik3d72components;completefunctionalcorrectness•PerformanceevaluationisperformedbeforeensuringCPUfunctionalcorrectness•Automated,low-intrusionmodificationofatrace-drivenXiangShanTrace-drivenCPUfromXiangShanTop-DowndifferencesbetweenGoogleDatacenterWorkloadsandSPECCPU74•SpeedLimitation:Singlesimulationspeedshouldbefastenough.•ParameterLimitation:Simulatorsofferflexibleparametertuning,whileRTLischallenging7576777816FoundingMembersDec.6,20217879TechnicalInnovationCollegesInstitutionsAcademicCollegesInstitutionsCompaniesDesignIterationOpen-SourceCommunityTape-outVerificationEngineeringTeamCompaniesDesignIterationOpen-SourceCommunityTape-outVerificationEngineeringTeamIndustryVerificationIndustryVerificationMemberCompaniesStableIPsDownstreamCompanies7marks/GHz10marks/GHz1.3GHz@28nm2GHz@14nmIteration●Stable8080KunminghuV2A8-corevideocodec2025/9B64-coreserver2025/9C128-coreserver2025/10月D128-coreserver2026/3B8-coreclientSoC2026/3E16-core2026/3F64-coreserver2026/3G4-coreclientSoC2026/6H128-coreserver2026/12IGPGPU2024/productionJGPGPU2024/production(>10k)K4-coreFPGActrl.2025/12L4-coresec.ctrl.2025/12M4-core2025/12N4-corerouterctrl.2026/3XiangShanNanhuChipsSource:XinchenTechnologySource:XinchenTechnology(accelerator)(accelerator)81*GenshinImpact·Cloud,only~1fps,justforfun8283LinuxBooton8-CoreXiangShanKunminghuV2•LanxinComputinghassuccessfullylaunchedLinuxonan8-coreSoCbuiltontheKunminghuV2CPUNanhuV5CPU•2GHz@12nm•TargetARMA76•2025/10deliveryKunminghuV2•3GHz@7nm•2025/4deliveryKunminghuV3•SPEC0622/GHz•3GHz@7nm•2025/12deliveryZhujiangV1ZhujiangV1•CacheCoherency•2025/10deliveryNoC•TargetCMN-700•Chipletsupport•2025/12delivery8585InternalKMHV2BUGInternal956915u累计提交a累计解决a累计关闭u遗留BUG数9569158733703673278384837383432525224325252286•ChipverificationusinganoOpen-sourceverificationOpen-sourceverificationmaterials•Let10,000peopleparticWorkingWorkingplatformDocLearnTesting •https://open-verify.cc/en/ToolsTestingEnterpriseOrgStudentsEnthusiasts87UnityChip:ACroudsourcingPlatformforChipVerific•Supportmulti-languages•Becompatiblewith•Supportmulti-languages•BecompatiblewithUV