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外文资料所译外文资料1作者GBOUWHUIS,JBRAAT,AHUIJSER2书名PRINCIPLESOFOPTICALDISKSYSTEMS3出版时间1991年9月4所译章节SESSION2/CHAPTER9,SESSION2/CHAPTER11原文MICROPROCESSORONEOFTHEKEYINVENTIONSINTHEHISTORYOFELECTRONICS,ANDINFACTONEOFTHEMOSTIMPORTANTINVENTIONSEVERPERIOD,WASTHETRANSISTORASTIMEPROGRESSEDAFTERTHEINVENTIONOFLSIINTEGRATEDCIRCUITS,THETECHNOLOGYIMPROVEDANDCHIPSBECAMESMALLER,FASTERANDCHEAPERTHEFUNCTIONSPERFORMEDBYAPROCESSORWEREIMPLEMENTEDUSINGSEVERALDIFFERENTLOGICCHIPSINTELWASTHEFIRSTCOMPANYTOINCORPORATEALLOFTHESELOGICCOMPONENTSINTOASINGLECHIP,THISWASTHEFIRSTMICROPROCESSORAMICROPROCESSORISACOMPLETECOMPUTATIONENGINETHATISFABRICATEDONASINGLECHIPAMICROPROCESSOREXECUTESACOLLECTIONOFMACHINEINSTRUCTIONSTHATTELLTHEPROCESSORWHATTODOBASEDONTHEINSTRUCTIONS,AMICROPROCESSORDOESTHREEBASICTHINGS1USINGTHEALUARITHMETIC/LOGICUNIT,AMICROPROCESSORCANPERFORMMATHEMATICALOPERATIONSLIKEADDITION,SUBTRACTION,MULTIPLICATIONANDDIVISION2AMICROPROCESSORCANMOVEDATAFROMONEMEMORYLOCATIONTOANOTHER3AMICROPROCESSORCANMAKEDECISIONSANDJUMPTOANEWSETOFINSTRUCTIONSBASEDONTHOSEDECISIONSTHEREMAYBEVERYSOPHISTICATEDTHINGSTHATAMICROPROCESSORDOES,BUTTHOSEAREITSTHREEBASICACTIVITIESMICROPROCESSORHASANADDRESSBUSTHATSENDSANADDRESSTOMEMORY,ADATABUSTHATCANSENDDATATOMEMORYORRECEIVEDATAFROMMEMORY,ANRDREADANDWRWRITELINETHATLETSACLOCKPULSESEQUENCETHEPROCESSORANDARESETLINETHATRESETSTHEPROGRAMCOUNTERTOZEROORWHATEVERANDRESTARTSEXECUTIONANDLETSASSUMETHATBOTHTHEADDRESSANDDATABUSESARE8BITSWIDEHEREHEREARETHECOMPONENTSOFTHISSIMPLEMICROPROCESSOR1REGISTERSA,BANDCARESIMPLYLATCHESMADEOUTOFFLIPFLOPS2THEADDRESSLATCHISJUSTLIKEREGISTERSA,BANDC3THEPROGRAMCOUNTERISALATCHWITHTHEEXTRAABILITYTOINCREMENTBY1WHENTOLDTODOSO,ANDALSOTORESETTOZEROWHENTOLDTODOSO4THEALUCOULDBEASSIMPLEASAN8BITADDER,ORITMIGHTBEABLETOADD,SUBTRACT,MULTIPLYANDDIVIDE8BITVALUESLETSASSUMETHELATTERHERE5THETESTREGISTERISASPECIALLATCHTHATCANHOLDVALUESFROMCOMPARISONSPERFORMEDINTHEALUANALUCANNORMALLYCOMPARETWONUMBERSSENDDETERMINEIFTHEYAREEQUAL,IFONEISGREATERTHANTHEOTHER,ETCTHETESTREGISTERCANALSONORMALLYHOLDACARRYBITFROMTHELASTSTAGEOFTHEADDERITSTORESTHESEVALUESINFLIPFLOPSANDTHENTHEINSTRUCTIONDECODERCANUSETHEVALUESTOMAKEDECISIONS6THEREARESIXBOXESMARKED“3STATE”THESEARETRISTATEBUFFERSATRISTATEBUFFERCANPASSA1,A0ORITCANESSENTIALLYDISCONNECTITSOUTPUTATRISTATEBUFFERALLOWSMULTIPLEOUTPUTSTOCONNECTTOAWIRE,BUTONLYONEOFTHENTOACTUALLYDRIVEA1ORA0ONTOTHELINE7THEINSTRUCTIONREGISTERANDINSTRUCTIONDECODERARERESPONSIBLEFORCONTROLLINGALLOFTHEOTHERCOMPONENTSALTHOUGHTHEYARENOTSHOWNINTHISDIAGRAM,THEREWOULDBECONTROLLINESFROMTHEINSTRUCTIONDECODERTHATWOULD1TELLTHEAREGISTERTOLATCHTHEVALUECURRENTLYONTHEDATABUS2TELLTHEBREGISTERTOLATCHTHEVALUECURRENTLYONTHEDATABUS3TELLTHECREGISTERTOLATCHTHEVALUECURRENTLYONTHEDATABUS4TELLTHEPROGRAMCOUNTERREGISTERTOLATCHTHEVALUECURRENTLYONTHEDATABUS5TELLTHEADDRESSREGISTERTOLATCHTHEVALUECURRENTLYONTHEDATABUS6TELLTHEINSTRUCTIONREGISTERTOLATCHTHEVALUECURRENTLYONTHEDATABUS7TELLTHEPROGRAMCOUNTERTOINCREMENT8TELLTHEPROGRAMCOUNTERTORESETTOZERO9ACTIVATEANYOFTHESIXTRISTATEBUFFERSSIXSEPARATELINES10TELLTHEALUWHATOPERATIONTOPERFORM11TELLTHETESTREGISTERTOLATCHTHEALUSTESTBITS12ACTIVATETHERDLINE13ACTIVATETHEWRLINECOMINGINTOTHEINSTRUCTIONDECODERARETHEBITSFROMTHEBESTREGISTERANDCLOCKLINE,ASWELLASTHEBITSFROMTHEINSTRUCTIONREGISTERRAMANDROMTHEADDRESSANDDATABUSES,ASWELLASTHERDANDWRLINESCONNECTEITHERTORAMORROMGENERALLYBOTHINOURSAMPLEMICROPROCESSOR,WEHAVEANADDRESSBUS8BITSWIDEANDADATABUS8BITSWIDETHATMEANSTHATTHEMICROPROCESSORANADDRESS2N256BYTESOFTHEMEMORYANDITCANREADORWRITE8BITSOFTHEMEMORYATATIMELETSASSUMETHATTHISSIMPLEMICROPROCESSORHAS128BYTESOFROMSTARTINGATADDRESS0AND128BYTESOFRAMSTARTINGATADDRESS128ROMSTANDSFORREADONLYMEMORYAROMCHIPISPROGRAMMEDWITHAPERMANENTCOLLECTIONOFPRESETBYTESTHEADDRESSBUSTELLSTHEROMCHIPWHICHBYTETOGETANDPLACEONTHEDATABUSWHENTHERDLINECHANGESSTATE,THEROMCHIPPRESENTSTHESELECTEDBYTEONTOTHEDATABUSRAMSTANDSFORRANDOMACCESSMEMORYRAMCONTAINSBYTESOFINFORMATION,ANDTHEMICROPROCESSORCANREADORWRITETOTHOSEBYTESDEPENDINGONWHETHERTHERDORWRLINEISSIGNALEDONEPROBLEMWITHTODAYSRAMCHIPSISTHATTHEYFORGETEVERYTHINGONCETHEPOWERGOESOFFTHATISWHYTHECOMPUTERNEEDSROMBYTHEWAY,NEARLYALLCOMPUTERSCONTAINSOMEAMOUNTOFROMITISPOSSIBLETOCREATEASIMPLECOMPUTERTHATCONTAINSNORAMMANYMICROCONTROLLERSDOTHISBYPLACINGAHANDFULOFRAMBYTESONTHEPROCESSORCHIPITSELFBUTGENERALLYIMPOSSIBLETOCREATEONETHATCONTAINSNOROMONAPC,THEROMISCALLEDTHEBIOSBASICINPUT/OUTPUTSYSTEMWHENTHEMICROPROCESSORSTARTS,ITBEGINSEXECUTINGINSTRUCTIONSITFINDSINTHEBIOSTHEBIOSINSTRUCTIONSDOTHINGSLIKETESTTHEHARDWAREINTHEMACHINE,ANDTHENITGOESTOTHEHARDDISKTOFETCHTHEBOOTSECTORTHISBOOTSECTORISANOTHERSMALLPROGRAM,ANDTHEBIOSSTOREITINRAMAFTERREADINGITOFFTHEDISKTHEMICROPROCESSORTHENBEGINSEXECUTINGTHEBOOTSECTORSINSTRUCTIONSFROMRAMTHEBOOTSECTORPROGRAMWILLTELLTHEMICROPROCESSORTOFETCHSOMETHINGELSEFROMTHEHARDDISKINTORAM,WHICHTHEMICROPROCESSORTHENEXECUTES,ANDSOONTHISISHOWTHEMICROPROCESSORLOADSANDEXECUTESENTIREOPERATINGSYSTEMMICROPROCESSORINSTRUCTIONSEVENTHEINCREDIBLYSIMPLEMICROPROCESSORSHOWNHEREWILLHAVEAFAIRLYLARGESETOFINSTRUCTIONSTHATITCANPERFORMTHEC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WARE,ANDDIRECTAGAINSTANDUSETHESOFTWAREOFTARGETSCHARACTERISTICTOCOMBINECONCRETELY,INORDERTODOPERFECTLY译文微处理器晶体管是电子学发展史上的关键发明之一,它实际上也是人类历史上最重要的发明之一。集成技术随着时间的推移而提高,芯片也更小,更快,更便宜。处理器完成的功能最早是由几个不同的逻辑芯片实现的,英特尔公司率先将所有这些部件集成到单个芯片中,这就是最早的微处理器,它是在单芯片上制造的完整的运算引擎。微处理器执行一组机器指令,这些指令告诉微处理器去做什么,根据这些指令,微处理器能够完成如下三项基本任务。1微处理器使用其ALU(算术/逻辑单元)可以完成加、减、乘、除等数学运算。2微处理器可将数据从存储器的一个位置搬移到另一个位置。3微处理器可做出判断,并根据这些判断跳转到一组新的指令。一个微处理器可以做非常复杂的工作,但上述三项是最基本的。微处理器有一套地址总线(向存储器发送地址),一套数据总线(向存储器发送数据或者接收存储器数据),一条读信号线RD和一条写信号线WR(用于通知存储器是从寻址地址读取数据还是写入数据),一条时钟信号线(为处理器安排时序的时钟脉冲)和一条复位信号线(将程序计数器置零和重新开始执行)。这里假定数据总线和地址总线的宽度都是位。构成这个简易处理器的组件如下寄存器A,寄存器B和寄存器C它们是由触发器构成的简易锁存器。地址锁存器和寄存器A,一样。程序计数器一种具备“加一”功能和“置零”功能的锁存器。算术逻辑单元可以简单到只是一个位加法器,也可以是能够完成位加、减、乘、除的单元(此处我们假定为后者)。测试寄存器一种保存ALU比较结果的专用锁存器。通常,ALU能够将两个数进行比较,并判断出二者是否相等或者一个比另一个更大。测试寄存器也可以保存加法运算最后一步的进位。这些数值保存在触发器当中,指令译码器利用这些数值做出判决。“STATE”是三态缓冲器。它可以传送逻辑,逻辑,或者和输出断开。三态缓冲器允许在一条信号线上连接多个输出信号,但只有一个信号输出。指令寄存器和指令译码器负责控制所有其他组件。从指令译码器引出完成如下功能的控制信号线通知寄存器锁定当下出现在数据总线上的数值通知寄存器锁定当下出现在数据总线上的数值。通知寄存器锁定当下出现在数据总线上的数值通知程序计数器锁定当下出现在数据总线上的数值通知地址寄存器锁定当下出现在数据总线上的数值通知指令寄存器锁定当下出现在数据总线上的数值通知程序计数器增加通知程序计数器复位置零激活任何一个三态缓冲器通知ALU需要完成的操作通知测试寄存器锁定ALU的测试位激活RD信号线激活WR信号线指令译码器的数据位不仅来自指令寄存器,而且来自测试寄存器和时钟信号线。只读存储器和随机存取存储器数据总线、地址总线、读写信号线都连接到ROM上或者连接到RAM上(通常两者都有)。在这个微处理器例子中,有一套位地址总线和一套位数据总线。这意味着微处理器可寻址256字节的存储器,一次可以读写位数据。假定该微处理器有128字节(地址从开始)的RAM和128字节(地址从128开始)的RAM。ROM是只读存储器。ROM芯片是用一组永久的预设字节进行编程得到的。地址总线告知ROM芯片要将哪个字节取出并置于数据总线上。当RD信号线改变状态时,ROM芯片将选中的字节输出到数据总线上。ROM是随机存取存储器。ROM中包含着以字节为单位的信息,微处理器能够依据RD/WR信号哪个有效来决定字节的读写。当前RAM芯片的一个问题是掉电后,所有保存在RAM上的内容全部丢失。这就是计算机需要ROM的原因。顺便提一下,几乎所有计算机都有一定数量的ROM(可以建造一种简单的不含RAM的计算机许多微控制器在片内集成了一定数量的RAM但是一般不可能建造出一种不含ROM的计算机)。在PC机中,ROM被称作BIOS基本输入输出系统)。当计算机启动时,它就执行在BIOS中找到的指令。这些BIOS指令完成对机内硬件的测试,然后从硬盘中读取引导扇区。引导扇区也是一个小程序,BIOS将其从硬盘中读出来之后,这个小程序就存储在RAM中。然后,微处理器开始从RAM执行引导扇区的指令。这个程序将告知微处理器从硬盘其他位置读取信息到RAM中,然后微处理器执行相应的指令等。这就是微处理器装载和执行整个操作系统的过程。微处理器指令甚至这里给出的简单得难以置信的微处理器也拥有一套相当大的指令集。指令的集合是以比特组合的方式实现的;每一条指令在装载到指令寄存器的时候,都有不同的涵义。人类不善于记忆比特组合,因此定义了一组短字来代表不同的比特组合。这些短字的集合就称为处理器汇编语言。汇编器可以很容易地将这些短字翻译成与其对应的比特组合,汇编器的输出被放置到存储器中以便微处

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