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咸宁学院本科毕业论文:外文翻译电子与信息工程学院 本科毕业论文(设计)外 文 文 献 翻 译译文题目:single-stage single-switch powerfacter correction ac/dc converter学生姓名: 专 业: 指导教师: 2010年 3 月原文:single-stage single-switch power factor correctionac/dc converterabstracta single-stage single-switch power factor correction ac/dc converter is proposed in which the power factor correction (pfc) inductor is connedted to a tap on the primary winding ofthe dc/dc flyback converter stage; there is direct energy transfer of a part of the input energy tothe output and thedc-bus voltage feedback. the additional discharge path in the pfc inductorand dc-bus voltage feedback effectively suppresses the dc-bus voltage and increases the overallefficiency. experimental results for a 60w converter at a constant switching frequency of 70 khzare obtained to show the performance of the proposed converter. it is shown that the voltageacross the dc-bus capacitor can be held below 405v even though the converter operates in a widerange of input voltages (90v-265vac) and the measured input current harmonics satisfy the iec。1 introductionmany pfc ac/dc converters have been presented inrecent years. pfc techniques can be divided into twocategories: a single-stage approach and a two-stageapproach. the two-stage approach is the most commonlyused approach. conventional two-stage pfc convertersinvolve the use of cascading two power-processing stages,responsible for power factor correction and output voltageregualtion. a pfc converter is adopted at the front-end toforce the line current tracking the line voltage and anotherconventional dc/dc converter is cascaded after the pfcstage to obtain the desired tightly regulated output voltage.this approach can obtain very good performance, such ashigh power factor, and low voltage stress. however, due tothe use of two power-processing stages, conversionefficiency is reduced and an additional pfc stage addscomponents and complexity. consequently the overall costincreases. the two-stage approach has disadvantages oflowpower density, control complexity, and high cost.to reduce the overall size and cost, a number of siglestagepfc converters have been developed in the literature witches so that the pfc switch anditscontroller can be eliminated. thesingle-stage approach is specially attractive in low-cost and low-power applicationsdue to its simple power stage and control circuit. however,it still has several drawbacks such as high current stress inpower switch and high dc-bus voltage stress. its majordrawback is a high voltage stress on the dc-bus capacitor.many single-stage pfc ac/dc converters suffer from highdc-bus voltage stress at light load and high line, whichmakes these converters impractical. a high dc-busvoltage means high component rating, high cost and lowvoltage stress. experimental results for a 60w converter ata constant switching frequency of 70 khz are obtained toshow the performance of the proposed converter. it is hown that the voltage across the dc-bus capacitor can beheld below 404v even though the converter operates in awide range of input voltages (90v-265vac) and themeasured input current harmonics satisfy the iec 61000-3-2class d requirements.2 analysis of proposed converter figure 1 shows the equivalent circuits of the proposedconverter. the secondary winding nb is added in the pfc boost inductor. the first transformer t1 in dc/dc part can be operated either in ccm or dcm depending on the load conditions as in the conventional flyback converter. for simplification, dc/dc part is assumed to operate in ccm for entire line period. the second transformer t2 is operated in dcm. according to the operation of t2, when the dc-bus voltage feedback value v1(=np2vab, np2=n2/np) is higher than the rectified line input voltage vi, the converter operation enters region a. in region a only t1 is operating and db is reverse-biased during the on-time period s. when vi is higher than v1 and lower than v2 the operation converter enters region b. in this region t1 and t2 work like flyback transformers; v2 is determined by vd+(n1-na)vo where n1=n1/ns and na=na/nb.when vi is higher than v2 the converter operation enters region c. in this region t1 works like a flyback transformer and t2 works like a boost inductor. since the voltage vi is vm sin ot in the first quarter of line period, the boundary times tx and ty for three modes are given byfig. 1 equivalent circuit2.1 region a operationin region a the input voltage vi is lower than the dc-bus voltage feedback value vl=(n2/np)vd. only the dc/dc part operates. it delivers power from the dc-bus capacitor cd to the load rl through t1. at to the switch s is turned on. since the dc-bus voltage vd is applied across the magnetising inductance lm1, the magnetising current ilm1 increases linearly from its lowpeak value ima,l as follows:at t1 the switch s is turned off and the output diode d1 is on. since -npvo is applied across the magnetisinginductance lm1, the current decreases linearly from its highpeak value ima,h as follows:the diode current id1 is given byfrom (3) and (4) the voltage gain is determined as follows:since the dc/dc part operates in ccm, the duty cycle d does not change with the load variation. from (6) the turn ration np can be determined bythe duty cycle d can be obtained asthe duty cycle d is also effective in regions b and c. the power p1 delivered by the transformer t1 is determined assince the power p1 delivered by the transformer t1 should be equal to the output power po (=vo2 /rl), the following relation is obtained:consequently the dc-bus capacitor provides the whole power to the load. from (3), (6) and (10), the high and low peak values of ilm1 are determined by2.2 region b operationwhen the voltage vi is higher than v1 and lower than v2, the converter operates in region b. pfc cell operates as dcm flyback converter. at t0 the switch s is turned on. since the dc-bus voltage vd is applied across the magnetising inductance lm1, the magnetising current ilm1 increases linearly from its low peak value imb,las follows:the magnetising current ilm2 increases linearly from zero as follows:sincethe dc-bus capacitor current icd, the current i2, and the switch current is are given by from (15) it can be seen that the magnetising current ilm1 is supplied by the magnetising current ilm2 and the discharging current icd of the dc-bus capacitor cd. from (17) the switch current is is also composed of the two components. the condution loss can be reduced by selecting smaller np1. at t1 the switch s is turned off and the output diodes d1 and d2 are on. since npvo is applied across the magnetising inductance lm1, the current ilm1decreases linearly from its high peak value imb,h asfollows:since the diode d2 is on, _navo is applied across the magnetising inductance lm2 and the current ilm2 decreases linearly from its peak value im,p as follows: the peak value im,p is given byfrom (20)at t2 the current ilm2 arrives at zero and the diode d2 isturned off. the power p1 delivered by the transformer t1 is given bythe power p2 delivered by the transformer t2 is determined bysince the sum of the power p1 delivered by the transformer t1 and the power p2 delivered by the transformer t2 should be equal to the output power po, the following relation isobtained:from (6), (13) and (24), the high and low peak values of ilm1 are determined by2.3 region c operationwhen the voltage vi is higher than v2 the converter operates in region c. the pfc cell operates as a dcm boost converter and the diode d2 is off in this region. at t0 the switch s is turned on, ilm1 increases linearly asfollows:ilm2 increases linearly as in region b. equations (9)(11) are also effective in this region. the magnetising current ilm1 is supplied by the magnetising current ilm2 and the dischargingcurrent icd of the dc-bus capacitor cd. when the current ilm2 is high enough that np2ilm2 exceeds ilm1, the dc-bus capacitor can be in charging mode during the ontime interval of s. this charging mode may occur near the line peak voltage as follows:at t1 the switch s is turned off and the output diodes d1.since _npvo is applied across the magnetising inductance lm1, the current ilm1 decreases linearly from its high peak value imc,h as follows:since the diode db is on, the voltage across the magnetising inductance lm2 is _vd_n1vo+vi and the current ilm2 decreases linearly from its peak value im,p as follows:the peak value im,p is given byfrom (31)sincethe current i1, the dc-bus capacitor current icd, and the diode current id1 are determine as follows:the current id1 is composed of two components which are from lm1 and lm2. therefore, there is direct power transfer from the line input to the load during the switch off-time. as a result the overall efficiency can be improved. at t2, the current ilm2 arrives at zero and the diode db is turned off. the current id1 is npilm1. since the output power should be equal to the sum of the power from lm1 and the power from lm2, the following relation isobtained:from (6), (13) and (24), the high and low peak values of ilm1 are determined by3 concluding remarksa single-stage single-switch power factor correction ac/dcconverter has been proposed. experimental results for a60wconverter at a constant switching frequency of 70 khz have been given to show the performance of the proposed converter. experimental results have shown that the voltageacross the dc-bus capacitor can be held below 404v even though the converter operates in a wide range of inputvoltages (90b265 v). as a result, commercially availableelectrolytic capacitors, can be used. the ccm dc/dcstage, direct energy transfer and the reduced conduction lossin the power switch can increase the efficiency and itsmaximum value is 91.1%. the converter meets en/iec61000-3-2 class d requirements.译文:单级单刀功率因数校正器 ac / dc变换器 摘要单级单刀开关ac / dc功率因数校正器(pfc)是电感连接到初级绕组的直流/直流转换器;输入能量的一部分直接转移成输出能量和反馈给dc总线。另外在pfc电感放电和dc总线电压反馈过程中,有效地抑制了直流母线电压,提高了整体效率,在一个功率60w、恒定开关频率70千赫转换器的实验中的性能结果表明,电压在直流总线下电容可以兼容,即使低于405v,转器工作在带宽输入电压(90-265 vac)的条件下,测量输入电谐频各项指标满足国际电工委员会要求。1简介近年来,许多功率因数校正ac / dc转换器相继问世。 pfc的技术可以分为两个类别:单级方法和双级方法。这两个不同层次的方法是最常使用的方法。传统的双级pfc变换器涉及两个级联在电路中使用,负责功率因数校正和输出额定电压 。pfc转换器是采用在前端迫使线电流跟踪线电压,一种传统的直流/直流转换器串联后的pfc可以获得现阶段所需的稳定的额定输出电压。这种方法可以取得很好的成效,如提高功率因数,降低电压冲击。然而,由于两种电源的工作转换使用效率降低,增加了pfc阶段额外的组件和复杂性,因此整体成本增加。这两个阶段的方法具有低功率强度,控制复杂,成本高的缺点。 为了减少整体规模和成本,在一些相关著作中对很多单级pfc的转换器作了详细阐述。其主要思想是,pfc和dc / dc有共同的pfc开关,它的开关及其控制器可以被闲置。由于单级方法简单特别是在低成本和低功耗地方得到了应用。然而,它仍然有几个缺点 比如在电源开关和高直流母线电压冲击下有较高的电流脉动。其主要缺点是对直流总线电容有高电压损伤。许多pfc和c / dc转换器受到低负载和高直流限制,高直流总线高电压组合方法具有高成本和低效率的特点。横跨直流总线电容的电压随着输入电压和负载的变化而变化,特别是当在不连续工作的传导模式(dcm)和直流/直流中的部分 pfc是连续传导模式(ccm)。dcm pfc和 ccm的直流/直流组合可生成一个高达1000v的直流母线电压它可以像对在高线和低荷载线路上普遍应用 。然而,在dcm或者ccm两部分的结合操作模式中没有直流母线电压应力的问题。由于dcm的升压转换器有其内在的pfc特性, pfc部分更适合在dcm中操作 。如果pfc部分和dc/dc部分都在dcm中操作,则直流总线电容的电压是独立的负载。然而,与ccm操作模式相比较,高开关电流需要高电流额定开关并且会降低效率。因此,在低功耗应用中dcm pfc和ccm dc/ dc的结合被认为是理想的组合。为了抑制高直流母线电压应力,一个变频调速被很好的使用起来,但是它也存在一些问题,类似于高频率和电感元件及输入滤波器的设计上有问题。pfc的附加绕组电感能有效地抑制直流母线电压并且提供直接能源转换。然而,当开关打开,无论是升压电感电流和磁化电流都会流过开关。也就是说,开关电流冲击是pfc的一部分,它是组成直流/直流的部分,它增加传导损耗。提出了单级单开关功率因数校正ac / dc转换器,因为第二绕组中加入pfc升压电感,输入功率是直接转化为输出功率。此外,在dc/dc级绕组的初级阶段通过连接上的pfc电感扼流圈一直到首端,有一部分的输入能量直接转化成输出能量。并且,当开关为on时,在直流/直流变压器转化时有一些升压电感的磁化会使电感充电,它可以减少传导损失。一般来说,这些直接的能量转移会提高整体效率和抑制直流总线电压。一个60w的转换器的实验中,恒定开关频率为70千赫换器的性能结果表明,电压在直流总线电容可以兼容,即使低于405v,转换器工作在宽输入电压范围(90b265vac)的条件下,测量输入电谐频各项指标满足国际电工委员会要求。2转换器的分析建议图1显示了转换器的等效电路图。二次绕组中添加nb ,是pfc 的升压电感。一次侧变压器t1在dc / dc部分无论是ccm或dcm,可以根据负载在常规条件下反馈给转换器。为了简化,直流/直流部分用于ccm总线路的操作中。变压器t2的在dcm中。根据t2的运作,有三个操作,如图3所示,当直流总线v1的电压反馈值 (=np2vd, np2=n2/np)超过输入电压的整流线的电压,该转换器就会在区域a运行。在a区只有t1是正在运行,db是在一段时间s上反向偏置。vi高于v1和低于v2的时候,此时转换操作进入b区。在这个区域,t1和t2工作起来就像一个回扫转换器; v2是由vd+(n1-na)vo决定。其中n1=n1/ns 和na=na/nb。当viv2时该转换器操作进入c区。在这个区域,t1就像一个回扫变压器在工作并且t2就像一个升压电感。由于vi电压是正弦曲线最大值的四分之一,是介于tx和ty的,如下所示 : 图1转换器的等效电路图 2.1 a区操作在区域a,输入电压vi低于直流总线v1的电压反馈值,vl=(n2/np)vd.,只有直流/直流部分运作。它提供的直流电源通过t1使总线电容从cd的负荷传给rl。在t0时刻开关s是打开的。由于直流母线电压vd适用于整个磁化电感lm1中,磁化电流ilm1从最低的ima,l的峰值线性增加如下:磁化电感l,从最在t1时刻开关s是关闭的,输出二极管d1处于工作状态。由于npvo是适用于整个高的ima,h的峰值线性减少如下:二极管电流id1是:在(3)及(4)中电压v0 如下: 由于直流/直流部分在ccm中运作,环流d不会改变负载的变化。从(6)看出np可确定为:环流d的表达式为:环流d 在b区和c区也
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