晶圆制造.ppt

2019/11/17,1,Chapter 4 Wafer Manufacturing and Epitaxy Growing,2019/11/17,2,Crystal Structures,Amorphous No repeated structure at all Polycrystalline Some repeated structures Single crystal One repeated structure,2019/11/17,3,Amorphous Structure,2019/11/17,4,Polycrystalline Structure,Grain,Grain Boundary,2019/11/17,5,Single Crystal Structure,2019/11/17,6,Why Silicon?,Abundant, cheap Silicon dioxide is very stable, strong dielectric, and it is easy to grow in thermal process. Large band gap, wide operation temperature range.,2019/11/17,7,Source: http:/www.shef.ac.uk/chemistry/web-elements/nofr-key/Si.html,2019/11/17,8,Unit Cell of Single Crystal Silicon,2019/11/17,9,Crystal Orientations: ,x,y,z, plane,2019/11/17,10,Crystal Orientations: ,x,y,z, plane, plane,2019/11/17,11,Crystal Orientations: ,x,y,z, plane,2019/11/17,12, Orientation Plane,Atom,Basic lattice cell,2019/11/17,13, Orientation Plane,Silicon atom,Basic lattice cell,2019/11/17,14,Illustration of the Point Defects,Silicon Atom,Impurity on substitutional site,Frenkel Defect,Vacancy(空位) or Schottky Defect,Impurity in Interstitial Site,Silicon Interstitial間隙,2019/11/17,15,Dislocation Defects,2019/11/17,16,From Sand to Wafer,Quartz sand: silicon dioxide Sand to metallic grade silicon (MGS) React MGS powder with HCl to form TCS Purify TCS by vaporization and condensation React TCS to H2 to form polysilicon (EGS) Melt EGS and pull single crystal ingot,2019/11/17,17,From Sand to Wafer (cont.),Cut end, polish side, and make notch or flat Saw ingot into wafers Edge rounding, lap, wet etch, and CMP Laser scribe Epitaxy deposition,2019/11/17,18,晶圓形成之步驟 From Sand to Silicon,MGS (poly-silicon) with 98% purity,(1)首先由石英砂提煉成冶金級多晶矽,2019/11/17,19,Silicon Purification I,Si + HCl TCS(vapor),Silicon Powder,Hydrochloride,Filters,Condenser,Purifier,Pure TCS (liquid) with 99.9999999%,Reactor, 300 C,2019/11/17,20,Polysilicon Deposition, EGS,EGS (Electronic-grade Silicon) is also poly-silicon,2019/11/17,21,Silicon Purification II,Liquid TCS,H2,Carrier gas bubbles,H2 and TCS,Process Chamber,TCS+H2EGS+HCl,EGS,2019/11/17,22,Electronic Grade Silicon,Source: ,2019/11/17,23,Crystal Pulling,Make a single-crystal silicon ingot Czochralski (CZ) method Floating Zone (FZ) method,2019/11/17,24,Crystal Pulling: CZ method,Graphite Crucible,Single Crystal silicon Ingot,Single Crystal Silicon Seed,Quartz Crucible,Heating Coils,1415 C,Molten Silicon,2019/11/17,25,CZ Crystal Pullers,Mitsubish Materials Silicon Source: ,2019/11/17,26,CZ Crystal Pulling,Source: ,2019/11/17,27,Floating Zone Method,Heating Coils,Poly Si Rod,Single Crystal Silicon,Seed Crystal,Heating Coils Movement,Molten Silicon,2019/11/17,28,Comparison of the Two Methods,CZ method is more popular Cheaper Larger wafer size (300 mm in production) Reusable materials Floating Zone Pure silicon crystal (no crucible) More expensive, smaller wafer size (150 mm) Mainly for power devices.,2019/11/17,29,Ingot Polishing, Flat, or Notch,Flat, 150 mm and smaller,Notch, 200 mm and larger,2019/11/17,30,Wafer Sawing,Orientation Notch,Crystal Ingot,Saw Blade,Diamond Coating,Coolant,Ingot Movement,2019/11/17,31,可编辑,2019/11/17,32,Parameters of Silicon Wafer,2019/11/17,33,Wafer Edge Rounding (邊緣圓滑化),Wafer,Wafer movement,Wafer Before Edge Rounding,Wafer After Edge Rounding,2019/11/17,34,Wafer Lapping (粗磨拋光),Rough polished conventional, abrasive, slurry-lapping To remove majority of surface damage To create a flat surface,2019/11/17,35,Wet Etch,Remove defects from wafer surface 4:1:3 mixture of HNO3 (79 wt% in H2O), HF (49 wt% in H2O), and pure CH3COOH. Chemical reaction: 3 Si + 4 HNO3 + 18 HF 3 H2SiF6 + 4 NO + 8 H2O,2019/11/17,36,Chemical Mechanical Polishing (CMP),Slurry,Polishing Pad,Pressure,Wafer Holder,Wafer,2019/11/17,37,200 mm Wafer Thickness and Surface Roughness Changes,76 mm,914 mm,After Wafer Sawing,After Edge Rounding,76 mm,914 mm,12.5 mm,814 mm,2.5 mm,750 mm,725 mm,Virtually Defect Free,After Lapping,After Etch,After CMP,2019/11/17,38,Epitaxy Grow (磊晶成長),Definition Purposes Epitaxy Reactors Epitaxy Process,2019/11/17,39,Epitaxy: Definition,Greek origin epi: upon taxy: orderly, arranged Epitaxial layer is a single crystal layer on a single crystal substrate.,2019/11/17,40,Epitaxy: Purpose,Barrier layer for bipolar transistor Reduce collector resistance while keep high breakdown voltage. Only available with epitaxy layer. Improve device performance for CMOS and DRAM because much lower oxygen, carbon concentration than the wafer crystal.,2019/11/17,41,Epitaxy Application, Bipolar Transistor,n-Epi,p,n,+,n,+,P-substrate,Electron flow,n,+,Buried Layer,p+,p+,SiO2,AlCuSi,Base,Collector,Emitter,2019/11/17,42,Epitaxy Application: CMOS,P-Wafer,N-Well,P-Well,STI,n+,n+,USG,p+,p+,Metal 1, AlCu,BPSG,W,P-type Epitaxy Silicon,2019/11/17,43,Single Crystal Silicon Epitaxial Layer,Use Chemical Vapor Deposition (CVD) Choose gas phase epitaxy Can be doped using dopant gas source,2019/11/17,44,Silicon Source Gases,Silane SiH4 Dichlorosilane DCS SiH2Cl2 Trichlorosilane TCS SiHCl3 Tetrachlorosilane SiCl4,2019/11/17,45,Dopant Source Gases,Diborane B2H6 Phosphine PH3 Arsine AsH3,2019/11/17,46,DCS Epitaxy Grow, Arsenic Doping,Heat (1100,C),SiH2Cl2,Si + 2HCl,DCS Epi Hydrochloride,2019/11/17,47,Schematic of DCS Epi Grow and Arsenic Doping Process,SiH2Cl2,Si,AsH3,As,AsH3,H,HCl,H2,2019/11/17,48,Epitaxial Silicon Growth Rate Trends,Growth Rate, micron/min,1000/T(K),Temperature (C),0.7,0.8,0.9,1.0,1.1,0.01,0.02,0.05,0.1,0.2,0.5,1.0,1300,1200,1100,1000,900,800,700,SiH4,SiH2Cl2,SiHCl3,Surface reaction limited,Mass transport limited,2019/11/17,49,Barrel Reactor,Radiation Heating Coils,Wafers,2019/11/17,50,Vertical Reactor,Heating Coils,Wafers,Reactants,Reactants and byproducts,2019/11/17,51,Horizontal Reactor,Heating Coils,Wafers,Reactants,Reactants and byproducts,2019/11/17,52,Epitaxy Process, Batch System,Hydrogen purge, temperature ramp up HCl clean Epitaxial layer grow Hydrogen purge, temperature cool down Nitrogen purge Open Chamber, wafer unloading, reloading,2019/11/17,53,Single Wafer Reactor,Hydrogen ambient Capable for multiple chambers on a mainframe Large wafer size (to 300 mm) Better uniformity control,2019/11/17,54,Single Wafer Reactor,Heating Lamps,Heat Radiation,Wafer,Quartz Window,Reactants,Reactants & byproducts,Quartz Lift Fingers,Susceptor,2019/11/17,55,Epitaxy Process, Single Wafer System,Hydrogen purge, clean, temperature ramp up Epitaxial layer grow Hydrogen purge, heating power off Wafer unloading, reloading In-situ HCl clean,2019/11/17,56,Why Hydrogen Purge,Most systems use nitrogen as purge gas Nitrogen is a very stable abundant At 1000 C, N2 can react with silicon SiN on wafer surface affects epi deposition H2 is used for epitaxy chamber purge Clean wafer surface by hydrides formation,2019/11/17,57,Properties of Hydrogen,2019/11/17,58,Defects in Epitaxy Layer,Disl