毕业论文-基于电池供电的DVS嵌入式系统的低功耗设计与实现.docx

基于电池供电的DVS嵌入式系统的低功耗设计与实现作 者 姓 名：指 导 教 师：单 位 名 称：电子信息工程研究所专 业 名 称：电子信息工程东 北 大 学2011年6月The Design and Implementation of Low Power Consumption DVS Embedded System Based on Battery SupplyBy Bingyang LeeSupervisor: Ding ShanNortheastern UniversityJune 2011 东北大学毕业设计（论文） Graduation Design（Thesis）Mission Agreement毕业设计（论文）任务书毕业设计（论文）题目：基于电池供电的DVS嵌入式系统的低功耗设计与实现设计(论文)的基本内容：(1) 本文主要研究动态电压调节算法以及算法的实现；(2) 利用现有数据，建立锂电池的数学模型；(3) 通过调节处理器的工作时间、电压和电流等参数，使DVS嵌入式系统达到功耗被降低的目的；(4) 将所提出的算法应用在W90P710的开发板上。毕业设计（论文）专题部分：题目：设计或论文专题的基本内容：学生接受毕业设计（论文）题目日期第 周指导教师签字：年 月 日-I-东北大学毕业设计（论文） 摘要基于电池供电的DVS嵌入式系统的低功耗设计与实现摘要现代社会中，便携式系统(如：手机和个人媒体播放器)正在演变成综合性，多媒体和通信系统。新的应用程序，如游戏、数字电视、高速Internet已经成为终端用户产品中的一项普通功能。然而，复杂的功能需要功能强大的处理器，如智能手机中已集成了模拟基带、数字基带、图像处理器和CPU 等多个分处理器，但这些分处理器并不是任何时刻都是满负载运转的，它们在很多时候都处于闲置状态。因此，对于依靠电池供电的便携式设备，如何根据系统的工作状态调整各个处理器的功耗水平从而节省电能便成了一个普遍关注的问题。随着处理器的集成度、复杂度的增长，以及性能的不断提高，其功耗也节节攀升。近年来，处理器单位面积的功耗己呈指数级增长。功耗的迅速增长已经成为制约处理器进一步发展的一个主要因素。而大多数的移动嵌入式系统，由于其应用环境的特殊性，不得不采用电池供电。相比于有线电源，电池的容量有限，因此移动嵌入式系统对功耗具有更加严格的要求。但相对于处理器技术的快速发展，电池技术发展严重滞后，因此如何降低嵌入式系统本身的功耗，合理延长现有电池供电时间已成为研究者关注的主要热点。嵌入式系统是一个软硬件混合体，其中硬件的运行直接导致能量的消耗。而硬件的行为都是通过软件进行控制的，因此硬件层之上的软件也对电能的消耗起着举足轻重的作用。通过软件对硬件行为进行控制，可有效降低系统功耗。因此涌现了一批硬件节能降耗手段，并提供相应的软件接口，尤其是以DVS技术为代表的处理器节能技术，为嵌入式软件提供了控制硬件功耗的有效机制。本文主要以DVS技术为基础，在以电池驱动的移动嵌入式系统中，从系统软件层面研究节能计算，以达到有效利用硬件节能降耗技术进行系统节能优化。特别是在保障系统实时性的同时降低系统能耗，从而获得电池放电期内性能的最大化。关键词：动态电压调节（DVS）；电池；低功耗设计；能量消耗-II-东北大学毕业设计（论文） AbstractThe Design and Implementation of Low Power Consumption DVS Embedded System Based on Battery SupplyAbstractIn modern society, portable system (such as mobile phones and personal media players) is evolving into a comprehensive multimedia and communication system. New applications, such as gaming, digital TV, high-speed Internet, have become common functions of users products end. However, the complicated functions need powerful processors, for example, smart phones have integrated the analog baseband, digital baseband, image processors, CPU and so on many points processors, but these points processors are not in the situations of full load operation at any moment, they are idle in many cases. Accordingly, to battery powered portable devices, adjusting each processors power consumption level to save electricity has become a common concern, according to system working condition.As processors growing levels of integration, complexity and performance, their power consumption also climbs sharply. In recent years, the processors unit area power consumption has increase exponentially. The rapid growth of power consumption has become a main factor of restricting further development of processors. And most of the mobile embedded systems, due to its peculiarity of application environment, have to use the batteries. Compared to cable powered systems, the capacity of battery is limited, so mobile embedded systems need more strict requirements. But compared to the rapid development of microprocessor technology, development of battery technology lags seriously, so how to reduce the power consumption of embedded system and reasonably extend existing batteries lifetime has become researchers main focus. Embedded system is a mix of hardware and software, among them hardwares running directly leads to the energy consumption. And the hardwares behavior is all controlled by software, so the software above the hardware layer plays a pivotal role in the consumption of electrical energy. Using the software to control the hardwares behavior, can effectively reduce system power consumption. So a group of means of hardware saving energy emerges and the corresponding software interfaces are provided, especially Dynamic Voltage Scaling (DVS) technology of processors, which provides the effective mechanism in controlling hardware power consumption through embedded software.This paper mainly bases on DVS technology, in battery powered mobile embedded systems. Research energy saving from the system software level, in order to achieve effectively using hardware energy saving technology to conduct optimization of system energy saving. Especially in guaranteed real-time character of the system to achieve reducing energy consumption, let battery get maximum performance during lifetime.Keywords ：Dynamic Voltage Scaling (DVS); Battery; low-power design; energy consumption-III-东北大学毕业设计（论文） ContentContent毕业设计（论文）任务书I摘要IIAbstractIIIChapter 1 Introduction11.1 Background11.2 Motivation21.3 Main Contribution of This Paper41.4 Summary5Chapter 2 Preliminaries72.1 System Configuration72.2 Analyse Battery Model72.2.1 Battery Discharge Behavior72.2.2 Physical Models72.2.3 Empirical Models82.2.4 Mixed Models82.3 Cost Function for Battery Model92.4 Cost Function Properties112.5 Problem Description122.6 Summary13Chapter 3 Heuristics Algorithm on DVS Systems153.1 Introduction of Heuristics15 3.1.1 Example153.2 Lagrange Multiplier Method used in Our Algorithm153.2.1 Introduction of Lagrange Multiplier Method153.2.2 Simple Greedy Heuristic173.3 Static Operation-Scheduling Algorithms173.4 Battery-Aware Voltage Scheduling18-IV-3.4.1 Voltage Scheduling in Uniprocessor Systems193.4.2 Scheduling Periodic Operations213.4.3 Voltage Scheduling in Multiprocessor Systems243.5 Summary25Chapter 4 Experiment and Analysis274.1 The Computer Simulation274.2 Aperiodic Operations on Uniprocessor systems324.3 Periodic Operations on Uniprocessor Systems334.4 Aperiodic Operations on Multiprocessor Systems344.5 Experiments Running on the W90P710 Evaluation Board354.6 Summary38Chapter 5 Conclusion and Prospect39References41Acknowledgement43-V-东北大学毕业设计（论文） Chapter 1 IntroductionChapter 1 Introduction1.1 Background“Energy is eternal delight.”As growing levels of integration, complexity and performance of processors, their power consumption also climbs sharply. In recent years, the power consumption in unit area of processors has increase exponentially. The rapid growth of power consumption has become a main factor of restricting processors further development. And most of the mobile embedded systems, due to its peculiarity of application environment, have to use batteries. Compared to cable powered systems, the capacity of battery is limited, so mobile embedded systems need more strict requirements. But compared to the rapid development of microprocessor technology, development of battery technology lags seriously, so how to reduce the power consumption of embedded system and reasonably extend existing batteries lifetime has become researchers main focus. Embedded system is a mix of hardware and software, among them, the behavior of hardware directly leads to the energy consumption, however the behavior of hardware is all controlled by software, so the software above the hardware layer plays a pivotal role in the consumption of electrical energy. Using the software to control the hardwares behavior, can effectively reduce system power consumption. So a group of means of hardware saving energy emerges and the corresponding software interfaces are provided, especially the processors Dynamic Voltage Scaling (DVS) technology, which provides the effective mechanism in controlling hardware power consumption through embedded software.The storage and conversion of energy continues to be important to society. Batteries, which interconvert chemical and electrical energy, are widely used in industry and for consumer applications (e.g., appliances and laptop computers). At the same time, environmental concerns are reshaping many industries. The ecological hazard of batteries, through their operation and disposal, is a primary consideration for battery manufacturers. In addition, stricter emission standards on automobiles are spurring interest in batteries for electric-vehicle applications. The energy and power requirements for vehicle propulsion are rigorous. Consequently, research on rechargeable battery systems is receiving renewed attention. Lithium batteries are attractive for energy storage because of their high theoretical energy densities. Furthermore, they are less toxic than nickel cadmium or lead acid cells, and their disposal poses fewer environmental problems. Thus the lithium batteries are ideal power source for portal embedded system.Operation scheduling for DVS processors has been studied extensively in recent years. The algorithms can be broadly classified into static (or off-line) scheduling algorithms where the operation parameters (arrival times, deadline times, execution times) are known a priori, and dynamic (or on-line) scheduling algorithms where all the operation parameters are not known until execution time. Both classes of algorithms assume that the processor is connected to an infinite source of energy. Strategies that have been developed to reduce the energy consumption of such models do not work well for limited energy sources like batteries. Furthermore, batteries exhibit nonlinear discharge behavior that needs to be exploited. Specifically, incorporating battery properties, such as recovery effect and non-linearity, Rakhmatov and Vrudhula developed a high-level analytical battery model 6, 7 with only two configuration parameters for each battery instance. Accuracy of their model was confirmed by the low-level electrochemical simulation Dualfoil within approximately 5 % error according to their report 5. Rakhmatov and Vrudhula specified various important properties of their mathematically formulated cost function 2, and several efficient static battery-aware voltage scheduling algorithms. Chowdhury and Chakrabarti identified several insightful battery properties and extended the work of Rakhmatov, Vrudhula, and Chakrabartis 2, 3, 13. They proposed battery-aware voltage scheduling algorithms not only for periodic operations on uniprocessor platform but also for both aperiodic and periodic operations on both uni- and multi-processor platforms.Their improvement relies on heuristics derived from battery characteristics, such as the steepest profile and non-increasing ordering in the early stage of scheduling. In this paper, we investigate the implications caused by battery properties, which are identified in the aforementioned previous work 2, 3. As the result of the proper investigation of those properties, we propose new static voltage scheduling algorithms for the battery-powered embedded systems, based on greedy heuristics suggested by several battery properties and Lagrange multipliers. We target uniprocessor systems. Our method shows better results in the aperiodic operation sets of time varying load used in the periodic operation sets on uniprocessor systems. For periodic operations, we need a special care, not necessarily considered in energy minimization. At the same time, the optimal profiles are not always the same among different hyperperiods.1.2 MotivationFig.1.1 represents four profiles of two identical operations (in the highest voltage setting, deadline 6 min) on a battery-powered uniprocessor system, in which processor speed and power change continuously. All profiles are simulated by the VC+ 6.0 to show the result profiles. To all the data, we just get the round number. Fig.1.1.(a) shows the increase current profile. Since the idle time increases the nominal residual charge in batteries, the later we measure the nominal battery capacity, the higher value of residual charges we obtain. The consumed capacity is measured by the objective function B (see Chapter 2 in detail). Intuitively, the higher B stands for the smaller residual charge available in batteries at observation time B. Once B reaches some threshold (denoted as in this paper), the batteries become exhausted; the batteries are inactive and no longer recoverable without external power supply. The objective function at time 6 min (6 ) is 1545.73 mA min and it decreases to 1103.06 mA min at time 12 min (12 ). Each of two objective functions is the worst in the four cases.For battery-unaware scheduling, it is well-known that only a single processor speed is sufficient to obtain the optimal prole 14. The time between the end of operation execution and deadline is called slack time. If we distribute the slack time equally among two identical operations, we obtain level current prole (Fig.1.3.2, cf. 12), which is an optimal prole in terms of the amount of energy dissipated from batteries. As we will see later on, this prole is optimal in case of ideal battery.The decreasing current prole results in better battery performance compared to increasing current prole. Fig.1.1.(c) is an optimal prole minimizing the objective function 12. The battery charges 6, 12 are reduced compared to Fig1.1.(b).Fig.1.1.(d) is an optimal prole minimizing 6. This decreasing current is obtained by swapping the two operations in the increase current prole in Fig.1.1.(a). Those two proles consume exactly the same amount of energy, but the residual available charges differ (34.2 % improvement with respect to 12). This implies the importance of the operation order (i.e., the history of charge) in the battery-aware voltage scheduling. The gradient of this operation load is steeper than in the gradual decrease current prole (Fig.1.1.(c), and this results in the worse effect on 12 . Namely, the steepest non-increasing load current prole is not always optimal. Hence, heuristics for choosing the steepest non-increasing load current prole 3 is not always the best choice.This example becomes an intraoperation voltage scheduling problem 15, if we regard two identical operations as one piece of operation and have opportunity to change the speed when a half of the operation is nished. In the battery-aware voltage scheduling, even when each operation consumes power uniformly, there is still room to optimize the total available capacity in the battery by switching voltages during the operation execution. The difference of 6 between Fig.1.1.(b) and Fig.1.1.(d) shows not negligible improvement (6.1%).Energy minimization is not exactly equivalent to battery optimization. In summary, when considering the battery-aware voltage scheduling, we need to pay attention to the recovery Figure 1.1.(a) Increasing current Figure 1.1. (b) Level current Figure 1.1. (c) Gradual decrease current Figure 1.1. (d) Non-increase currentFigure.1.1. Motivating exampleeffect and the history of charge, and we should not rely too much on the steepest non-increasing prole heuristics to obtain an efcient prole.The importance of the research on the better battery utilization is also reinforced by the fact that it is somewhat independent of the energy optimization of the other parts of the systems. However, if energy, which remained in a battery after battery failure, is used in the system it is exactly equal to the increase of the available energy for performing system.1.3 Main Contribution of This PaperWe have proposed static voltage scheduling algorithms for battery-powered DVS systems based on the studied battery characteristics and our analysis. The proposed algorithms are extensions to the work of Chowdhury and Chakrabarti, and these algorithms are designed by using greedy heuristics. Periodic and aperiodic voltage scheduling algorithms on uni- and multi-processor platforms, respectively, outperformed those in the comparative work 6, 7.The organization of the remainder of the dissertation is as follows:Chapter 2 introduces some basic knowledge about DVS system, such as battery model, cost function, the problem we face and so on.Chapter 3 covers the related work in heuristics, battery-aware voltage scaling, Lagrange Multiplier Method and how the heuristics is used in our system.Chapter 4 presents computer simulation aperiodic and periodic operations on uniprocessor systems and experiments running on the W90P710 evaluation board.Chapter 5 shows the prospect of low power consumption.1.4 SummaryThe principles for good design of battery-aware voltage scheduling algorithms for both aperiodic and periodic operation sets on dynamic voltage scaling (DVS) systems are presented. Our proposed algorithms are based on greedy heuristics suggested by several battery characteristics and Lagrange multipliers method. To construct the proposed algorithms, we use the battery characteristics in the early stage of scheduling properly. As a consequence, the proposed algorithms show superior results on synthetic examples of periodic and aperiodic operations in the operation sets which are excerpted from the comparative work, on uni- and multi-processor platforms, respectively. - 47 -东北大学毕业设计（论文） Chapter 2 PreliminariesChapter 2 Preliminaries2.1 System ConfigurationWe assume DVS-enabled uni- and multi-processors. For the sake of simplicity, the DC-DC conversion efciency is assumed to be 100%. The ratio of the initial operation duration and the new operation duration *after scaling the operation: voltage Vdd down by factor s (i.e.,Vdd/s) is: */ =s(1+2(s-1)Vth/(Vdd-Vth) (2.1)with Vth a threshold voltage. The battery current Ibatt scales by s-3 , i.e.Iba