pld应用程序举例

PLD段码显示library ieee;use ieee.std_logic_1164.all;entity duanma isport(fff:out bit_vector(1 to 5);aaa:out bit_vector(1 to 5);end;architecture kk of duanma isbegin fff(1 to 5)=11111;aaa(1 to 5)=11111;end;PLD三个数加法编程library ieee;use ieee.std_logic_1164.all;entity jw isport(in1,in2:in integer range 0 to 15;a,b:out std_logic_vector(1 to 7);end;architecture gg of jw issignal he:integer range 0 to 45;beginhe=in1+in2;with he selecta=1111110 when 0|10|20|30|40, 0110000 when 1|11|21|31|41, 1101101 when 2|12|22|32|42, 1111001 when 3|13|23|33|43, 0110011 when 4|14|24|34|44, 1011011 when 5|15|25|35|45, 1011111 when 6|16|26|36, 1110000 when 7|17|27|37, 1111111 when 8|18|28|38, 1111011 when 9|19|29|39, 0000000 when others;with he selectb=0000000 when 0=he and he=9,else 0110000 when 10=he and he=19,else 1101101 when 20=he and he=29,else 1111001 when 30=he and he=39,else 0110011 when 40=he and he=39,else 0000000 when others;end;PLD八个按键两个灯library ieee;use ieee.std_logic_1164.all;entity guozi3 isport(in1,in2:in std_logic_vector(1 to 4);a,b:out std_logic_vector(1 to 8);end;architecture gg of guozi3 isbeginwith in1 select0110000 when 0001,1101101 when 0010,1111001 when 0011,0110011 when 0100,1011011 when 0101,1011111 when 0110,1110000 when 0111,1111111 when 1000,1111011 when 1001,0000000 when others;with in2 selectb=0110000when 0001,1101101 when 0010,1111001 when 0011,0110011 when 0100,1011011 when 0101,1011111 when 0110,1110000 when 0111,1111111 when 1000,1111011 when 1001,0000000 when others;end;PLD顺序语句编程(0加到9)library ieee;use ieee.std_logic_1164.all;entity jinchen isport(in1:in std_logic;a:out std_logic_vector(1 to 7); end;architecture gg of jinchen issignal ss:integer range 0 to 9;beginprocess beginwait until in1=1;ss=ss+1;if ss=10 then ss=0;end if;end process;with ss selecta=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 1011111 when 6, 1110000 when 7, 1111111 when 8, 1111011 when 9, 0000000 when others;end;PLD矢量 10个控制2个数码管library ieee;use ieee.std_logic_1164.all;entitykongzhi2 isport (a:out bit_vector(1 to 7);b:in bit_vector(1 to 10);end;architecture ff of kongzhi2 isbegina=1111110 whenb=1000000000else 0110000 when b=0100000000else 1101101 whenb=0010000000else 1111001 whenb=1001000000else 0110011 whenb=1000100000else 1011011 whenb=1000010000else 1011111 whenb=1000001000else 1110000 whenb=1000000100else 1111111 whenb=1000000010else 1110011 whenb=1000000001else 0000000;end;PLD晶振50M控制数码管library ieee;use ieee.std_logic_1164.all;entity jinzheng isport(in50m:in std_logic;a:out std_logic_vector(1 to 7); end;architecture gg of jinzheng issignal in1:std_logic; signal ss:integer range 0 to 9;signal count:integer range 0 to 25000000;beginprocess beginwait until in50m=1;count=count+1;if count=25000000 thencount=0;in1=not in1;end if;end process;processbeginwait until in1=1;ss=ss+1;if ss=10 then ss=0;end if;end process;with ss selecta=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 1011111 when 6, 1110000 when 7, 1111111 when 8, 1111011 when 9, 0000000 when others;end;PLD晶振50M自动跳变程序（0到59）library ieee;use ieee.std_logic_1164.all;entity jiadxx isport(in50m:in std_logic;a,b:out std_logic_vector(1 to 7);end;architecture gg of jiadxx issignal in1:std_logic; signal t,g:integer range 0 to 9;signal count:integer range 0 to 59 25000000;beginprocess beginwait until in50m=1;count=count+1;if count=25000000 thencount=0;in1=not in1;end if;end process;processbeginwait until in1=1;g=g+1;if g=9 then if g=5 then 改变变量 g=0; t=t+1;if t=5 then t=0; end if; end if;end process;with g selecta=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 1011111 when 6, 1110000 when 7, 1111111 when 8, 1111011 when 9, 0000000 when others;with t selectb=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 1011111 when 6, 1110000 when 7, 1111111 when 8, 1111011 when 9, 0000000 when others; end;PLD（1-8数码管显示）第六个显示0library ieee;use ieee.std_logic_1164.all;entity jiadxx isport(a:out std_logic_vector(1 to 7); b:out std_logic_vector(1 to 3);end;architecture kk of jiadxx isbegina=1111110; -显示的数“0”b=010; -显示的位“第6位”end;PLD动态间隔1秒闪烁library ieee;use ieee.std_logic_1164.all;entity jiadxx isport(in50m:in std_logic; b:out std_logic_vector(1 to 3); a:out std_logic_vector(1 to 7);end;architecture gg of jiadxx issignal count:integer range 0 to 25000000;signal count_one:integer range 0 to 1;signal one_hz:std_logic;begin processbegin wait until in50m=1;count=count+1;if count=25000000 thencount=0;one_hz=not one_hz;end if; end process;processbeginwait until one_hz=1;count_one=count_one+1;if count_one=0 thenb=000;elseb=001;end if;end process;a=1111110; end;PLD动态显示0 1library ieee;use ieee.std_logic_1164.all;entity dz1121 isport(in50m:in std_logic; a:out std_logic_vector(1 to 7); b:out std_logic_vector(1 to 3);end;architecture gg of ningyi issignal in1:std_logic;signal count_c:integer range 0 to 3;signal count:integer range 0 to 2500;beginprocessbeginwait until in50m=1;count=count+1;if count=2500 thencount=0;in1=not in1;end if;end process;processbegin wait until in1=1;count_c=count_c+1; if count_c=1 then count_c=0; end if;end process;with count_c selecta=1111110when 0, 0110000when 1， 0000000when others; with count_c selectb=000 when 0, 001 when 1, 111 when others;end;PLD数码管显示07library ieee;use ieee.std_logic_1164.all;entity xian0-7 isport(in50m:in std_logic; a:out std_logic_vector(1 to 7); b:out std_logic_vector(1 to 3);end;architecture gg of xian0-7 issignal in1:std_logic;signal count_c:integer range 0 to 7;signal count:integer range 0 to 2500;beginprocessbeginwait until in50m=1;count=count+1;if count=2500 thencount=0;in1=not in1;end if;end process;processbegin wait until in1=1;count_cb=000; ab=001; ab=010; ab=011; ab=100; ab=101; ab=110; ab=111; a=1110000;if count_c=7 then count_c=0;end if;end case;end process;end;PLD时钟显示library ieee;use ieee.std_logic_1164.all;entity shizon isport(in50m: std_logic; a:out std_logic_vector(1 to 7);-段码 b:out std_logic_vector(1 to 3);-位码end;architecture ff of shizon issignal count:integer range 0 to 250;-整数定义signal count_s:integer range 0 to 25000;-半秒定义signal g1,g2,s1,s2,b1,b2:std_logic_vector(1 to 7);-变量范围signal one_hz:std_logic;-定义1赫兹信号signal one_s:std_logic; signal x:integer range 0 to 7;-signal gg1,gg2,ss1,ss2,bb1,bb2:integer range 0 to 9; beginprocessbeginwait until in50m=1;count=count+1;if count=250 thencount=0;one_hz=not one_hz;end if;end process;processbeginwait until in50m=1;count_s=count_s+1;if count_s=25000 then count_s=0;one_s=not one_s;end if;end process; processbeginwait until one_hz=1;xb=000; ab=001; ab=010; ab=011; ab=100; ab=101; ab=110; ab=111; a=b2; x=0; end case;end process;processbeginwait until one_s=1;gg1=gg1+1;if gg1=9 thengg1=0;gg2=gg2+1;if gg2=5 thengg2=0;ss1=ss1+1;if ss1=9 thenss1=0;ss2=ss2+1; if ss2=5 thenss2=0;bb1=bb1+1;if bb1=9 then bb1=0; bb2=bb2+1;end if;if bb1=3 and bb2=2 thenbb1=0;bb2=0; end if;end if;end if;end if;end if;end process;with gg1 selectg1=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 1011111 when 6, 1110000 when 7, 1111111 when 8, 1111011 when 9, 0000000 when others;with gg2 selectg2=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 0000000 when others;with ss1 selects1=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 1011111 when 6, 1110000 when 7, 1111111 when 8, 1111011 when 9, 0000000 when others;with ss2 selects2=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 0000000 when others;with bb1 selectb1=1111110 when 0, 0110000 when 1, 1101101 when 2, 1111001 when 3, 0110011 when 4, 1011011 when 5, 1011111 when 6, 1110000 when 7, 1111111 when 8, 1111011 when 9, 0000000 when others;with bb2 selectb2=1111110 when 0, 0110000 when 1, 1101101 when 2, 0000000 when others;end;PLD单个音符编程 低2音library ieee;use ieee.std_logic_1164.all;entity ypyy isport(in50m:in std_logic; a:out std_logic);end;architecture gg of ypyy issignal in1:std_logic;signal count:integer range 0 to 25000000;beginprocessbeginwait until in50m=1;count=count+1;if count=85034 thencount=0;in1=not in1;end if;end process;a=in1;END;PLD双音符编程library ieee;use ieee.std_logic_1164.all;entity ypyy isport(in50m:in std_logic; a:out std_logic);end;architecture gg of ypyy issignal in1:std_logic;signal in2:std_logic;signal count:integer range 0 to 25000000;signal count_1:integer range 0 to 25000000;signal ys1s:integer range 0 to 50000000;signal jia1:integer range 0 to 1;beginprocessbeginwait until in50m=1;count=count+1;if count=85034 thencount=0;in1=not in1;end if;end process;processbeginwait until in50m=1;count_1=count_1+1;if count_1=63775 thencount_1=0;in2=not in2;end if;end process;processbegin wait until in50m=1;ys1s=ys1s+1;if ys1s=50000000 thenys1s=0;jia1=jia1+1;end if;if jia1=0 thena=in1;elsea=in2;end if;end process;end;PLD 1-7音符编程（if语句）library ieee;use ieee.std_logic_1164.all;entity ypyy isport(in50m:in std_logic; a:out std_logic);end;architecture gg of ypyy issignal in1:std_logic;signal in2:std_logic;signal in3:std_logic;signal in4:std_logic;signal in5:std_logic;signal in6:std_logic;signal in7:std_logic;signal count:integer range 0 to 25000000;signal count_1:integer range 0 to 25000000;signal count_2:integer range 0 to 25000000;signal count_3:integer range 0 to 25000000;signal count_4:integer range 0 to 25000000;signal count_5:integer range 0 to 25000000;signal count_6:integer range 0 to 25000000;signal ys1s:integer range 0 to 50000000;signal jia1:integer range 0 to