SMT测试（DOC43页）

SMT 高級工程師教案6SMT測試ATE 工程師應注意及準備事項：1.當拿到R/D CAD FILES 時，請在A-TEST導入時分析該被測試之TEST ABILITY2.在B-TEST 導入ATE測試時，應注意版本變更之零件，規格；並分析下列資料：名 稱數 量A. PCB CAD FILES (NEW VER) 1B. BOM 1C. ARTWORK 1D. CIRCUIT 1E. BEAR BOARD 1-2F. FUNCTION M/B 2-33.B-TEST後提出TEST ABILITY報告.A. 列出A-TEST & B-TEST之異差B. 列出那些零件須加測試點及注意事項C. 列出治具要求之注意事項D. 列出LAYOUT TEST PAD 及測試針之規格及注意事項E. 其它R/D設計須附合治具程式控制之要求ATE 工程師應注意及準備事項：1. R/D在LAYOUT時之節點至少要有一測試點(TEST PAD)2. 線路途的每一測試點(TEST PAD)，間距至少75 MIL以上3. 手插零件不需加測試點，但如果是CONNECTOR很密之零件視需要加測試點.4. CHIP除了空腳外，其餘各腳均需加測試點.5. 如果是單面之被測試時，測試點要均勻分佈於測試板.6. 如果是雙面之被測試時，測試點儘量LAYOUT在焊錫面.7. 測試點附近之零件高度應小於0.255IN (視產品而定)8. 測試點周圍0.018IN內不可有測試或零件9. PCB 邊緣0.125 IN內不可有測試點10.測試點到另一測試點不可小於0.083IN.125.125.125PCB DEIGES.1250.08272.1mm(82.7mil)MIN IMUN DESIRABLE TEST PAD POSITIONONG.035”(0.83MM)11.所有導通孔及氣孔必須請PCB廠做MASK以防測試時漏氣12.定位孔之定位針之尺寸誤差在+-.002IN13.定位孔直徑大於0.012IN14.定位孔之內壁不可吃錫15.治具之定位孔要用CNC鑽孔*測試零件CHIP,CONNECTOR為設計重點 *16.測試點不可被被綠漆蓋住(測試前用放大鏡檢查)17.板邊至測試點約0.125IN 不可有測試點.PC BOARDDATUM POINTTOL.002(.5mm)TEST PADTOL.002(.5mm)(.5mm)TOL.002TOOL INFHOLE 18.測試點直徑不小於0.35/0.50 in(35mil)，(目前約30mil)Solder pad(.09mm).035SOLDER RESISTPROBE TIP 19.導通孔之中心間距要150 mil 以上 20.各測試點必須吃錫，但邊緣不可被綠漆MASK 21.如考量功能測試時，要在CONNECTOR最進處加測試點 22.VCC點至少5點，GND點至少10點 以上為治具部份 23.對IC或CHIP之控制位址線(如RESET，ENABLE)不可直接接到VCC或GROUND上4.7KNE OR CL 24.測試盪器須先除頻或加JUMPER控制10pf VCC 25.對POWER- ON RESET在設計，要有隔離之設計4.7KRESET0.1UFVCCVCC414.7KOUT23OSCRESET 26.對振盪器如有控制ENABLE.DISABLE之產品測試會更穩，否則須加除頻電路或善用JUMP亦是一 個好方法 27.對IC或CHIP之OPTION空腳要LAYOUT測試點 28.BGA零件背面之PCB不可LAYOUT零件 元件值ICT 短路 開路-IC Boundary Socan-IC PatternICT IC 元件功能自動調整ATE 組裝板功能測試測試設備的功能及區隔 IC 保護二極體 靜態測試動態測試 -ICT：In-Circuit Tester-ATE：Automatic Test Equipment -MDA：Manufactureing Defect Analyzer 測試步驟完 成動 態靜 態產 品n 自動調整n 組裝板功能測試- IC Boundary Scan- IC Patternn IC保護二極體n IC元件功能n 元件值n 短路 開路製造不良分佈高中低空板不良元件反插元件不良功能不良漏件/錯件短路/開路測試成本不良百分比高中低空板不良元件反插元件不良功能不良漏件/錯件短路/開路製造不良分佈及測試成本n OKANONn TR-518n TESCON50K 美金以上n IC保護二極體n 元件值n 短路 開路50K 美金以上n TR-518Fn 自動調整n 組裝板功能n HPn TERADYNE-Boundart Scan-Pattern100K 美金以上n GenRadn IC元件能價格產品測試功能測試設備的市場測試治具n In-Line測試治具n 壓合式測試治具n 真空測試治具n 雙面測試治具n 單面測試治具n 加裝”導板”(Guiding Plate)n 正確選擇測試點n 正確選擇測試針頭n 高品質的測試針治具製作的考慮因素SMT 製造不良問題未來趨勢開路短路漏件/錯件功能不良元件不良元件反插高中低低IC PatternIC保護二極體元件值短路組裝板功能SMT中開路高產品測試未來趨勢AOI EQUIPMENT(AUTO OPTICAL INSPECTION) Performance standards in SMmanpowerinspection Drive to reducemonitoring and Focus on processSchedule demandsQuality and Lncreased cost,Electrical in inspectionProcessshipmentassembly orSystem Manufacturing keep risi ScreenprintingPick andplaceReflowElectricaltestSingle-side SMT assembly process and finer pitch packag Lncreasing board dens access harder to attailmake in-circuit fixture Requirement to inspeccontrolRequirement forFast，high-defect-coverage inspectiontestable electricallydefect classes not5500-Series AOI systems from Teradyne provide process monitoring at any process stepSMT board assemblyLntegration/BoardElectricalThru-Pick/ScreenWavePackagingTestFunctionalTestProcessloadholeReflowPlacePrintPre-wave inspection 5515B system Bottm-side solder joint quality Component insertionPost-reflow inspection 5529,5539 systems Component placement Solder joint quality,including J-leads and lifted leadsSingle-side SMT assembly process Component orientation Component presence and alignment 5529 systemPost placement inspection The typical post-reflow SMT process Defect spectrum AOI and ICT are often employed together as Complementary tools ICTAOI Misoriented device(cap,TombstonedLifte leadsUnwetted pins Device progranmming (flashMissing devicesdevicesMissing bypass capsSkewed / misplacedLow solder ROM)Misoriented ICsBillboarded devicesDevices (still connected) diode)Device defects (e.g.cracked,ICWrong devicesShortsConnector pinspinsOpen power or parallel Basic device functionBGA and other hidden pins +Dose not require a fixture Built boards+Easily used on partiallyPossibly board function+Tests component function,and+Direct soldering-process+Can test hidden features+Applies board powerfeedbackAOI and ICT are often emplpyed together as*不須測試治具*基本零件之功能裝置之零件*BGA零件及其它穩藏腳位*電氣功能測試(有LIBRARY)*製程不良之問題*錯件ICT*缺件*墓碑效應*零件翹腳*短路*LAYOUT設計不良*零件偏移*bypass電容*零件外觀異常*錫少&錫多AOI測試之問題：*不須上電及測試針*靜態各種外觀材料AOI Complementary tools *須製作治具及加電源 *能夠測試基板內部及穩藏之問題*能測試零件之功能特性容易修改*試產機種或機種少量變更時 *迅速且即時的反應製程問題The 5539-Series five camera head desugn*Structured light reveals the contours of the objectLight intensityMeasuring averagelnspectionSolder jointGoodComponent body under inspection Vertical cameraLn the system：In the window area if theComera reads low light Top lightingSolder joint is good 5500-Series system architecture2-4 pipelinedframegrabbers*Dual 68040CPUs,serial& parallel I/OEthernetVGAHigh accuracy X-Y table (0.001”accuracy over 18” x 20” board area)3/4 HP DC motors(29 in./s max.table speed)WarpStrobeLaser*(0.6”,0.7” or 1.0” FOV)1 or 5 high-speed camerasLED structured lighting dome*Board under inspectionBoard stops*Patented technologyConveyors (SMEMA interface) Window types detection with subpizellizationLocates the bright spot within the window(peakSearch intensity across the windowMeasures the averagePresence /Absence Average Presence /Absence VarianceMeasures the average intensity across the window 100% Variance 0% Variance Looks for a continuous brigh strip across theBridge Window,either vertically or horizontally The defect detection capability requiredBoardQuad flat pack(QFP)or smallOutline IC SOICPassives(0603,0402)J-lead device Depends on the device packaging employed BoardComprehensive visual or AOI solder jointInspection requires viewing from an angle Partial coveragedefect Full defect1.J-lead device coverage 2.Lifted lead on a QFPThe 5539 D+AOI (automated optical inspection) Systems from Teradyne5539 D+theory of operationLmage of a circuit board Complex image to process Hard to extract the key dataWindow approach Structured lighting highlights defects Apply simple criteria at critical points Automatically simplifies thr analysis Fast reliablerequiredInspection expamples using different combinationsof window types and lightingLighting from aboveSearch windowComponent locationLighting behind the cameraBridge windowsSolder short inspection(圖二)Side lighting.(“Snake eyes”) Solder joint inspectionPresence windows measuring variance(圖一)Lighting behind the cameraPresence windowComponent presence inspection An example of using structured light to inspect for(圖三)about the solder joints Difficult to make a judgement Used for defecting solder bridgesTop lighting Solder joint defects defected(圖一)(圖二) Low variance in the window Bad jointsSide lighting High variance in the window Good jointsSide lighting defects on fine-pitch QFP Warp compensation Board warpage causes the image to move in the field of view of an angled camers The built-in warp measurement system measures the warp and automatically compensates for it during inspectionWarpage measurement technigue*Board warpage by looking at2.the cameras measure thethe position of the lineacross the board surfaceshines a bright line1.angled strobed laser warpagethe measurement of the boardstrobed on as required to freezeboard surface with the linecamera/lighting head over the3.the XY table moves the Programming an AOI system1.CAD output for pick and place2.Creat program usingpackage style,orientation)systems(X,Y,designator,CDES (PC windows 3.1)and program stabilityverify defect coverage4.Performance CurvesComponents)100% missingreflowed board (i.e.Unpopulated,printed, Performance Curves are a key tool for guaranteeingprogram stabili