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Unit10ComputerProgramDesign,Lesson24Memory电子技术专业英语教程冯新宇主编电子工业出版社,2019/11/25,电子技术专业英语教程,2,Lesson24Memory,BackgroundsTexttourLanguageinuseVocabularyStructureReading/writingtechniques,2019/11/25,电子技术专业英语教程,3,TerminologyRAM随机存储器DRAM动态随机存储器DDR(DoubleDataRate)双倍数据数率prefetching预取指令,预取数doubletransitionclocking双倍传输时钟DIMM双直列内存模块;双线内存模块operatingsystem操作系统peakbandwidth峰值带宽,Backgrounds,2019/11/25,电子技术专业英语教程,4,Texttour,Outline-IntroductionDDR1DDR2DDR3,2019/11/25,电子技术专业英语教程,5,Introduction,Processorsusesystemmemorytotemporarilystoretheoperatingsystem,mission-criticalapplications,andthedatatheyuseandmanipulate.Therefore,theperformanceoftheapplicationsandreliabilityofthedataareintrinsicallytiedtothespeedandbandwidthofthesystemmemory.Overtheyears,thesefactorshavedriventheevolutionofsystemmemoryfromasynchronousDRAMtechnologies,suchasFastPageMode(FPM)memoryandExtendedDataOutput(EDO)memory,tohigh-bandwidthsynchronousDRAM(SDRAM)technologies.Yet,systemmemorybandwidthhasnotkeptpacewithimprovementsinprocessorperformance,thuscreatinga“performancegap”.Processorperformance,whichisoftenequatedtothenumberoftransistorsinachip,doubleseverycoupleofyears.Ontheotherhand,memorybandwidthdoublesroughlyeverythreeyears.Therefore,ifprocessorandmemoryperformancecontinuetoincreaseattheserates,theperformancegapbetweenthemwillwiden.,2019/11/25,电子技术专业英语教程,6,Introduction,Whyistheprocessor-memoryperformancegapimportant?Theprocessorisforcedtoidlewhileitwaitsfordatafromsystemmemory.Thus,theperformancegappreventsmanyapplicationsfromeffectivelyusingthefullcomputingpowerofmodernprocessors.Inanattempttonarrowtheperformancegap,theindustryvigorouslypursuesthedevelopmentofnewmemorytechnologies.HPworkswithJointElectronicDeviceEngineeringCouncil(JEDEC)memoryvendorsandchipsetdevelopersduringmemorytechnologydevelopmenttoensurethatnewmemoryproductsfulfillcustomerneedsinregardstoreliability,cost,andbackwardcompatibility.,2019/11/25,电子技术专业英语教程,7,DDR1,TodevelopthefirstgenerationofDDRSDRAM(DDR-1),designersmadeenhancementstotheSDRAMcoretoincreasethedatarate.Theseenhancementsincludeprefetching,doubletransitionclocking,strobe-baseddatabus,andSSTL1_2lowvoltagesignaling.At400MHz,DDRincreasesmemorybandwidthto3.2GB/s,thisis400percentmorethanoriginalSDRAM.,2019/11/25,电子技术专业英语教程,8,DDR1,InSDRAM,onebitperclockcycleistransferredfromthememorycellarraytotheinput/output(I/O)bufferordataqueue(DQ).TheI/Obufferreleasesonebittothebusperpinandclockcycle(ontherisingedgeoftheclocksignal).Todoublethedatarate,DDRSDRAMusesatechniquecalledprefetchingtotransfertwobitsfromthememorycellarraytotheI/Obufferintwoseparatepipelines.ThentheI/Obufferreleasesthebitsintheorderofthequeueonthesameoutputline.Thisisknownas2n-prefetcharchitecturebecausethetwodatabitsarefetchedfromthememorycellarraybeforetheyarereleasedtothebusinatimemultiplexedmanner.,2019/11/25,电子技术专业英语教程,9,DDR1,StandardDRAMtransfersonedatabittothebusontherisingedgeofthebusclocksignal,whileDDR-1usesboththerisingandfallingedgesoftheclocktotriggerthedatatransfertothebus.Thistechnique,knownasdoubletransitionclocking,deliverstwicethebandwidthofSDRAMwithoutincreasingtheclockfrequency.DDR-1hastheoreticalpeakdatatransferratesof1.6and2.1GB/satclockfrequenciesof100MHzand133MHz,respectively.,2019/11/25,电子技术专业英语教程,10,AnotherdifferencebetweenSDRAMandDDR-1isthesignalingtechnology.Insteadofusinga3.3Voperatingvoltage,DDR-1usesa2.5VsignalingspecificationknownasStubSeries-TerminatedLogic_2(SSTL_2).Thislow-voltagesignalingresultsinlowerpowerconsumptionandimprovedheatdissipation.AppearanceinFigure24-1.,Figure24-1DDR1MEMORY,2019/11/25,电子技术专业英语教程,11,DDR2,DDR-2SDRAMisthesecondgenerationofDDRSDRAM.Itoffersdataratesofupto6.4GB/s,lowerpowerconsumption,andimprovementsinpackaging.At400MHzand800Mb/s,DDR-2increasesmemorybandwidthto6.4GB/s,whichis800percentmorethanoriginalSDRAM.DDR-2SDRAMachievesthishigherlevelofperformanceandlowerpowerconsumptionthroughfasterclocks,1.8Voperationandsignaling,andsimplificationofthecommandset.The240-pinconnectoronDDR-2isneededtoaccommodatedifferentialstrobessignals.AppearanceinFigure24-2.,2019/11/25,电子技术专业英语教程,12,Figure24-2DDR2MEMORY,2019/11/25,电子技术专业英语教程,13,DDR3,DDR-3,thethird-generationofDDRSDRAMtechnology,willmakefurtherimprovementsinbandwidthandpowerconsumption.ManufacturersofDDR-3willinitiallyuse90nmfabricationtechnologyandmovetoward70nmasproductionvolumesincrease.DDR-3willoperateatclockratesfrom400MHzto800MHzwiththeoreticalpeakbandwidthsrangingfrom6.40GB/sto12.8GB/s.DDR-3isexpectedtoreducepowerconsumptionbyupto30%comparedtoaDDR-2DIMMoperatingatthesamespeed.DDR-3DIMMsareexpectedtousethesame240-pinconnectorasDDR2DIMMs,butthekeynotchwillbeinadifferentposition.,2019/11/25,电子技术专业英语教程,14,SummaryofDDRSDRAMtechnologies,2019/11/25,电子技术专业英语教程,15,VocabularyreliabilityenhancementconventionStructureReading/writingtechniques,Languageinuse,2019/11/25,电子技术专业英语教程,16,Vocabulary,2019/11/25,电子技术专业英语教程,17,reliabilityindictionary,analysisofstructurereliability结构可靠度分析IntroductiontoReliabilityTechnology可靠性技术导论mathematicaltheoryofreliability可靠性数学理论reliabilityofcomputersystem计算机系统可靠性reliabilityofelectricalapparatus电器可靠性,2019/11/25,电子技术专业英语教程,18,reliabilityintext,Therefore,theperformanceoftheapplicationsandreliabilityofthedataareintrinsicallytiedtothespeedandbandwidthofthesystemmemory.因此,应用程序的性能和数据的可靠性本质上依赖于系统内存的速度和带宽。,2019/11/25,电子技术专业英语教程,19,enhancementindictionary,enhancementoffisheryresources水产资源增殖enhancementfactorofmasstransfer传质增强因子EnhancementoftheFinancialInfrastructure改善金融基础设施。enhancement/depletionMOSintegratedcircuit增强型与耗尽型金属-氧化物-半导体集成电路intensifyingbyaugmentationandenhancement.通过增加和改进而强化的。,2019/11/25,电子技术专业英语教程,20,enhancementintext,TodevelopthefirstgenerationofDDRSDRAM(DDR-1),designersmadeenhancementstotheSDRAMcoretoincreasethedatarate.为了开发DDRSDRAM的第一代(DDR-1),设计人员对SDRAM核采取了增强措施以增加数据传输率。,2019/11/25,电子技术专业英语教程,21,conventionindictionary,conventiononconsularrelations领事关系公约conventionondiplo

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