带输出饱和电感的零电压开关三电平直流变换器.ppt

,PreparedBy:JimmyLiu（刘学超）DirectedBy:Prof.ZhangBO（张波教授）SCUT-ASTECMASTERPROGRAM,AZero-Voltage-SwitchingPWMThree-LevelDC/DCConverterUsingOutputSaturableInductors带输出饱和电感的零电压开关三电平直流变换器,INTRODUCTION,THENOVELZVS-TLDC/DCCONVERTER,CONTROLMETHODOFTLDC/DCCONVERTER,DESIGNMETHOD(2)LeadingswitchesVT1andVT4canrealizeZVSinwideloadrange,laggingswitchesVT2andVT3canachieveZVSinfullload;(3)Thevoltagestressofswitchesisonlyhalfofinputvoltage;,Advantage:,Disadvantage:,(1)Inmin-load,laggingswitchesishardtoachieveZVSbecausetheresonantinductorissosmall;(2)Therewillbecircularcurrentintheprimaryduringresonantstate,whichwilllossenergy;(3)Secondarydutycycleloss.,Fig1-2TheconventionalZVSTLconverter,INTRODUCTION,(1)OvercomethedrawbacksthatcannotoperateZVSinwiderange,bothleadingandlaggingswitchescanachieveZVSwideloadrange;(2)Voltagestressofswitchesishalftotheinputvoltage.,Advantage:,Disadvantage:,(1)Therestillhavecircularcurrentinzerostate,whichwillinfluencetheconverterefficiency;(2)Duetotheauxiliarynetisadded,especially,thiswillresultmorecircularcurrent,thusincreasetheconductionlossandreduceefficiency;(3)ComparedwithconventionalZVS-TLconverter,thetopologyismuchmorecomplexbecauseoftheauxiliarynet.,Fig1-3ZVSTLconverterusingauxiliarynet,INTRODUCTION,Advantage:,(1)AchieveouterswitchesVT1andVT4ZVSandinnerswitchesVT2andVT3ZCS(2)Eliminatecircularcurrent,reduceconductionloss;(3)Achievehalfinputvoltagestressinpowerswitches.,Disadvantage:,Fig1-4ZVZCSTLDC/DCconverter(1),Auxiliaryswitchandclampcapacitoronthesecondarysidewillresettheprimarycurrenttozeroduringresonanceoperationmode,(1)Duetoauxiliaryswitchesadded,itismorecomplicatedincircuitandcontrol;AssameasZVSTL,itstillhasvoltagespikeandringingacrossoutputdiode,INTRODUCTION,Fig1-6ZVZCSTLDC/DCconverter(3),Fig1-5ZVZCSTLDC/DCconverter(2),BothofthesetopologiesintroducetheblockingcapacitorCbtoreducetheprimarycurrenttozeroinresonantstate,andthusmakelaggingswitchesZCSswitching,InFig1-5,inordertopreventprimarycurrentreversingandmaintainitatzeroduringresonantperiod,asaturableinductorLsisadded.InFig1-6,VD2andVD3areusedtoavoidprimarycurrentreversing.,INTRODUCTION,WiththeinnovationofTLconverter,moreTLtopologiescombiningsoftswitchingwithTLDC/DCconverterwillbeproposed.ThispaperwillfocusonthestudyofanovelZVS-TLconverterbyproposingoutputsaturableinductorsandfreewheelingdiode,andanalyzetheTLconvertercontrolmethodwithsmallsignalanalysis.Finallythe250Wprototypewillbesetuptoproveitsperformance,whichincludestheexperimentalresults.,Summary,THENOVELZVS-TLDC/DCCONVERTER,THENOVELZVS-TLDC/DCCONVERTER,Fig2-1PrinciplewaveformsoftheconventionalZVS-TLconverter,ThreeDetrimentalEffectsofConventionalZVS-TLConverter,ZVSRange,SecondaryDutyCycleLoss,VoltageSpikeonOutputDiodes,THENOVELZVS-TLDC/DCCONVERTER,ZVSRange,InordertoachievetrueZVSoperationforswitches,theconvertershouldhavethestoredenergyintheresonantinductancetochargeanddischargetheparasiticcapacitanceassoonasoneofthetwoswitchesisturnedoff.Theparasiticcapacitanceofthetransformeralsohastobeconsideredinthisprocess.FortrueZVSoperation,thestoredenergyEininductancehastosatisfytheinequality:,(p=lead,lag),Asforleadingswitches,VT1andVT4,ZVScanbeachievedeasilyinwideoutputpowerrangebecausethereisenoughmagneticenergytoparticipateinresonance.Theinductancethattakepartinresonanceincludesresonantinductorandreflectedvalueofoutputinductor,whichishighenough.Atthesametime,theprimarycurrentisalsohighenoughtorealizeZVSduringthisperiod.Soitiseasytosatisfytheinequalityduringleadingswitching.,THENOVELZVS-TLDC/DCCONVERTER,ZVSRange,Unfortunately,whentheZVSconditionforlaggingswitchesVT2andVT3hastobeachievedinlowoutputpowerrange,hastobemaximuminordertomeettheaboveinequality,becausebothoftheoutputdiodeVDR1andVDR2areconductedduringthisresonantperiod.ThemagneticinductorLmandoutputinductorwillbeoutoftheseriesresonance.Thereisonlyresonantinductortoattendtheresonant.ItisdifficultforlaggingswitchestorealizeZVSinwideoutputpowerrange,whichisoneofthedrawbacksonthisconventionalZVS-TLconverter.,THENOVELZVS-TLDC/DCCONVERTER,SecondaryDutyCycleLoss,Dutycycleloss:thedutycycleonthesecondaryislessthandutycycleontheprimary,thatis85%；OutputRippleVoltage：2%Uo,DESIGNMETHODeffectivecorearea.,Fig4-1CorelosscurveofTDKPC40,Itwillbeseenthatminimumtotallossoccurnear120mT.Forthisdesign,wechooseBm=120mT.,HighfrequencytransformerofThree-Levelconverter,DESIGNMETHODCH2-Vds50V/),a)b),DESIGNMETHODCH2-Vgs10V/),a)b),DESIGNMETHODCH1-50v/)b)Thesecondaryvoltagewaveformwithoutputsaturableinductors(Io=5A;CH1-50v/),DESIGNMETHODCH1-50v/)b)Thesecondaryvoltagespreadwaveformwithoutputsaturableinductors(Io=5A;CH1-50v/),DESIGNMETHODCH1-50v/)b)Theprimaryvoltagewaveformwithoutputsaturableinductors(Io=5A;CH1-50v/),DESIGNMETHODCH1-50v/),Otherexperimentalresults,DESIGNMETHODCH1-50V/),DESIGNMETHODCH1-2.5A/),DESIGNMETHODCH1-1V/),DESIGNMETHODatthesametime,secondarydutycyclelossisabletodecrease,whichimprovetheefficiencyofthisconverter.Moreimportantly,theadvantageoftheproposedconverteristhatthelaggingswitchescanachieveZVSinwideoutputrangecomparedwithconventionalZVS-TLDC/DCconverter.,CONCLUSION,Inthestudyofthisproject,therearestillmanythingsthatneedfurtherstudyinfuture:Howtored