边界扫描测试原理与应用.ppt

BoundaryScanOverview邊界掃描測試測試原理與應用,IntelligentBoundaryScanSolutions,BScanBasics,BoundaryScanTest測試之定義,所謂邊界(Boundary):係指IC腳端與內部(功能邏輯閘)晶片間之接點。換言之進行掃描測試IC腳端與晶片間之接點邊界，係所謂之邊界掃描測試。1990年經由IEEE1149.1加以規格化之BST測試，俗稱為邊界掃描測試(BoundaryScanTest),12/1/2019,BScanBasics,No.3,MoreDetailson,IEEE-1149.1=digitalinterconnectiontestIEEE-1149.4=mixed-signalandanaloginterconnectiontestIEEE-1149.5=systemleveltestIEEE-1149.6=Differential&ACcouplednetworksIEEE-1532=In-System-Programming,12/1/2019,BScanBasics,No.4,HistoryoftheStandard,1985JETAG(JointEuropeanTestActionGroup)1986JTAG(EuropeandNorthAmerica)1988P1149JTAGv2(proposal)1990IEEEStd1149.1-19901993IEEEStd1149.1a-19931994IEEEStd1149.1b-1994(BSDL)2001IEEEStd1149.1-2001,TermssynonymswithIEEEStd1149.1BoundaryScan/BSCAN/BSTJTAG(JointTestActionGroup),BScanBasics,BoundaryScanTest測試之必要性,BScanBasics,BoundaryScanTest測試之原理(二),若PCB印刷基板採用BScan測試相容元件時，最多僅需5條(通常為4條)之專用線，即可測試:1.TestDataIn(TDI)2.TestDataOut(TDO)3.TestModeSelect(TMS)4.TestClock(TCK)5.TestReset(TRST)=可以省略不用*註=通常用六個Clock，當作一個Reset,BScanBasics,BoundaryScanTest測試之原理(三),所謂測試存取埠:TAP(TestAccessPort)=係指為進行測試邏輯電路之指令，測試數據或測試結果等數據加入輸入/輸出之串列介面，上述4條信號線，經由外界之電腦主機加以控制，以便執行BScan測試。,BScanBasics,BoundaryScanTest測試之功能,元件之誤插接及臨近元件的短路測試外界電路與元件間之輸入/輸出信號監視元件間之互接測試(InterconnectingTest)可測試BGA元件之開路與短路作測試Non-BGAIC腳的開路測試可在板上燒錄資料(ISP)Flash/EEPROM(ISP)PLD/FPGADevices內部邏輯電路之功能測試,12/1/2019,BScanBasics,No.9,TestbusSignals,TMS=TestModeSelectTCK=TestClockTDI=TestDataInTDO=TestDataOut,IEEE-1149.1,BscanCell,測試存取埠TAP=TestAccessPort,12/1/2019,BScanBasics,No.10,StandardDevice,CoreLogic,Pin,IEEE-1149.1,12/1/2019,BScanBasics,No.11,BScanDevice,TestModeSelect(TMS),TestDataIn(TDI),TestClock(TCK),.someextra“intelligence”isneededforTestAccess,BScanCell,Pin,IEEE-1149.1,12/1/2019,BScanBasics,No.12,TestAccessPort(TAP)測試存取埠,TAPController,InstructionsRegister,TDO,TMS,TDI,TCK,BypassRegister,IDcodeRegister,opt.,BScanRegister,31,0,n,0,0,0,n,MUX,DataRegister,IEEE-1149.1,12/1/2019,BScanBasics,No.13,IEEE-1532,In-SystemProgramming,Programmingdevices(volatileornon-volatile)離散元件mountedonaPCBthroughIEEE-1149.1compliantTAP=PLD/FPGADevicesProgrammabledevicescomplianttoIEEE-1532haveasystemmodeandatestmode:Systemmode:differentiates4systemmodalstates:Unprogrammed(在未寫入資料前)ISCAccessed(ISCDatafile寫入)ISCComplete(ISCDatafile完成)Operational(驗證)Testmode:conformtoIEEE-1149.1,12/1/2019,BScanBasics,No.14,Conclusion,IEEE1532canbeusedforprogrammingofasingledeviceonadeviceprogrammerasingledevicein-systemmultipledevicesconcurrentlyin-systemStandardconformdevicesofdifferenttypesfromdifferentvendorscanbeprogrammedconcurrentlyProgrammingalgorithmanddataareseparated,IEEE-1532=In-System-Programming,IntegrationwithFlyingProbeTester(BScan+FPT),BScanBasics,WhatFPTCanTEST?,類比元件的值ResistorCapacitorInductorTransistor臨近元件的短路測試Non-BGAIC腳的開路測試上電後電壓/電流測試,特性無治具ICT測試簡易型AOI功能速度稍慢可涵蓋所有被動零件測試短路測試為選擇性考量,BScanBasics,WhatBoundaryScanCanTest,數位邏輯IC零件:（包含BGA）的開短路測試BoundaryScanICID檢查DRAM讀寫測試Flash,EEPROM讀寫測試及資料在板燒錄(OnBoardprogramming),特性：測試速度快（可在一分鐘之內測完一片主機版）主要針對有提供BoundaryScanIC的量測主要針對開短路的製程問題做測試可分為做治具及不做治具的方法，治具成本遠比ICT治具類便宜。(因測試點變少),BoundaryScanLayoutinformation邊界掃描測試相容線路設計需知,IntelligentBoundaryScanSolutions,BScanBasics,BoundaryScanTest測試之原理,若PCB印刷基板採用BScan測試相容元件時，最多僅需5條(通常為4條)之專用線，即可測試:1.TestDataIn(TDI)2.TestDataOut(TDO)3.TestModeSelect(TMS)4.TestClock(TCK)5.TestReset(TRST)=可以省略不用*註=通常用六個Clock，當作一個Reset,BScanBasics,I/OInterface，10PIN100mil公的連接器,板子上整個連接到BoundaryScan的介面連接器,BScanBasics,TDI,TDO,串接方式為TMS,TCK,TRST並聯，TDI,TDO串聯,BScanBasics,BoundaryScancontroller的連接器上的TDI，接到串接上第一個BSIC的TDI，第一個BSIC的TDO接第二個IC的TDI，以此類推；最後一個IC的TDO則接連接器上的TDO。,TDI,TDO串接方式注意,BScanBasics,非同logiclevel的boundaryscanchip不可放置在同一個