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Structure and function of the MCS-51 series Structure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same. 8051 daily representatives- 51 serial one-chip computers . An one-chip computer system is made up of several following parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 , 8032, 80C ,etc. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. ( 6) Five cut off cutting off the control system of the source . ( 7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. ( 8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertas now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 8s accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is depositted, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded. There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH , 0000H of location , in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses ) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice. 8051 one-chip computer have four 8 walk abreast I/O port, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register ), one exports the driver and a introduction buffer . Make data can latch when outputting, data can buffer when making introduction , but four function of passway these self-same. Expand among the system of memory outside having slice, four port these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in timesharing The circuit of 8051 one-chip computers and four I/O ports is very ingenious in design. Familiar with I/O port logical circuit, not only help to use ports correctly and rationally, and will inspire to designing the peripheral logical circuit of one-chip computer to some extent. Load ability and interface of port have certain requirement, because output grade, P0 of mouth and P1 end output, P3 of mouth grade different at structure, so, the load ability and interface of its door demand to have nothing in common with each other. P0 mouth is different from other mouths, its output grade draws the resistance supremly. When using it as the mouth in common use to use, output grade is it leak circuit to turn on, is it is it urge NMOS draw the resistance on taking to be outer with it while inputting to go out to fail. When being used as introduction, should write 1 to a latch first. Every one with P0 mouth can drive 8 Model LS TTL load to export. P1 mouth is an accurate two-way mouth too, used as I/O in common use. Different from P0 mouth output of circuit its, draw load resistance link with power on inside have. In fact, the resistance is that two effects are in charge of FET and together: One FET is in charge of load, its resistance is regular. Another one can is it lead to work with close at two state, make its President resistance value change approximate 0 or group value heavy two situation very. When it is 0 that the resistance is approximate , can draw the pin to the high level fast ; When resistance value is very large, P1 mouth, in order to hinder the introduction state high. Output as P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw the resistance on neednt answer and thenning. Here when the port is used as introduction, must write into 1 to the corresponding latch first too, make FET end. Relatively about 20,000 ohms because of the load resistance in scene and because 40,000 ohms, will not exert an influence on the data that are input. The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it similar to mouth partly to urge, but mouth large a conversion controls some than P1. P3 mouth one multi-functional port, mouth getting many than P1 it have and 3 door and 4 buffer. Two part these, make her besides accurate two-way function with P1 mouth just, can also use the second function of every pin, and door 3 function one switch in fact, it determines to be to output data of latch to output second signal of function. Act as W =At 1 oclock, output Q end signal; Act as Q =At 1 oclock, can output W line signal . At the time of programming, it is that the first function is still the second function but neednt have software that set up P3 mouth in advance . It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location (the location or the byte ) to visit to P3 mouth /at not lasting lining, there are inside hardware latch Qs =1.The operation principle of P3 mouth is similar to P1 mouth. Output grade , P3 of mouth , P1 of P1 , connect with inside have load resistance of drawing , every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way . Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outerly . Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first . As to 80C51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting P1P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially , make the one-chip computer begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally,as because procedure operate it make mistakes or operate there arent mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective , should sustain 24 shake cycle (namely 2 machine cycles ) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal: Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST ) hand over to Schmitts trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal insidly. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running,should first check it can restore to the throne not succeeding. Checking and can pop ones head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change. 51 系列单片机的功能和结构 结构和功 能的监控监 -51 系列之一 -计算机芯片监控监 -51 名是一幅一个电脑晶片 ,英特尔公司生产系列 . 这家公司推出 8 级一个计算机芯片监控监 -51 系列之后 ,于 1980 年 8引入一个计算机芯片监控监 ,于 1976 年 48系列 .。它属于这一类型很多行一个芯片的电脑芯片都如 8051、 8031、 8751、 80c51bh,80c31bh等 ,其基本组成、性能和基本教学制度 ,都是一样的 . 8051 每日代表 -51 系列之一-电脑晶片 有一个芯片的计算机系统是由以下几个方面 : (1)18 微处理器(CPU). (2)在切片数据存储羊 (128B/256B),使用可以不读书不数据写如因经营不中 ,最后结果要和数据显示等 . (3)存储器存储程序 /可擦写可编程只读存储器(4KB/8KB),用于保存程序和数据 ,初步形成片 . 但并不存储器 /可擦写可编程只读存储器在一些人的电脑芯片 ,如 8031、 8032、 80c 等 . ( 4)经营的 84并肩一 /四 OP0P3 接口 ,每口可以用作介绍 ,也可以用作输出 . (5)两个定时 /柜台 ,每个计时器 /柜台可设立和计算的方法 ,用来计算的外部事件 ,可以建立成一个时间的方式也可以和根据计算结果或时间实现控制的计算 (六 )五切断切断源头上控 制系统 . (七 )各一序 I/O 口 UART(异步接收世界 /发送 (UART),它是实现一个计算机芯片和一个计算机芯片和通讯系列电脑上使用 . (8)强、时钟振荡器电路生产、水晶石英细调需要外部电容 . 为使振动频率目前最 . 每上述地区内的数据是通过加入单片机 . 其中 ,CPU 的核心是一个电脑芯片 ,它是计算机和指挥控制中心等部分组成 ,运算器和控制等 . 运算器的可携带 8 人计算 a 经营单位的经营逻辑 ,其中 ,1temporarilies 存储装置 8、暂时贮存器 2、 8的行政协调会累积装置、 B、注册登记程序国有 PSW 等 . 累积计 200人 ,行政协调委员会结束对进入检查 . 暂时运作往往是来自一店经营者 ,这是经营下去 ,使计暂时经营成果和行政协调会 . 此外 ,行政协调会经常被视为转运站 ,在 8051 年的数据传输 . 一般微处理器一样 ,是繁忙登记 . 帮助大家 ,表示了赞同的命令 . 控制程序包括柜台命令详解 ,振荡器电路和时间等 . 程序相当于 16. 这是一个字节地址位的程序 ,其实 ,内容是未来 IA 将进行 PC. 修改的内容 ,它可以改变方向 ,进行程序 . 在 8051 电路动摇一个电脑芯片、石英晶体外 ,只需要相当频繁调整电容 ,其范围是 12mhz 的频率1.2mhz. 这 一脉冲信号 ,作为 8051 年工作的基本节拍 ,即单位时间内的最低 . 8051 年是计算机一样 ,在和谐的工作基本控制打 ,就像打了一个乐团 ,按照发挥 ,指挥 . 有存储器 (程序存储器 ,只能读 ),8051 年在羊片 (存储数据 ,是可以写出 )二读 ,他们每个独立存储空间处理 ,处理方式是一样的 ,一般的电脑记忆 . 8051 年和 8751 年拨款程序存储程序存贮器 4kb,从 0000h 地址 ,用于保存程序和方式不变 . 数据 8051-87518031128b记忆存储数据 ,00fh假地址 ,用于存放操作结果中 ,暂时储存数据和资料等无人。在这种羊 128b,有 32 个单位字节可以出任就业登记 ,这是与一般不同的微处理器、 8051 切片和就业登记成立一个级别相同的地点安排 . 这是很不相同的记忆监控监 -51 系列之一 -计算机芯片 ,除了一般电脑的方式处置 . 一般电脑先向空间、存储器和 RAM,可安排在不同的空间范围内解决这一意愿 ,即存储器的地址和 RAM,地址分配不同的空间形成 . 同时来访的记忆 ,相应的存储器 ,只有一个地址 ,可以存储 ,也可以撞击 ,并以同样的访问 . 这种记忆结构称为普林斯顿结构 . 8051 记忆分为程序存储空间和数据存储空间的物理结构 ,有四个存储空间 :我们的程 序储存在一个数据存储空间之外的数据存储和一个程序存储空间、外一、结构形式的这种程序装置和数据存储与形式的数据存储 ,称为哈佛结构 . 但用用户的角度 ,讨论 8051 年的记忆空间分为三类 :(1)在时代安排 Ffffh 座 ,0000h 地点、从容外片 (地址用十六 ). (二 )处理数据存储空间之外 64kb 之一 ,被安排从地址 0000hFfffh64kb(地址 16),地点太 . 三 )处理数据存储空间 256b(地址 8 使用 ). 上述三个存储空间地址重叠 ,鉴别设计 ,象征不同的数据传输的语言系统 8051:CPU访问片 ,以存储器 ,阻止访问命令 Ra用途外用一张旅游片。 8051 年 1-48 芯片计算机与我走 /澳港 ,要求 P0、 P1、 P2 和 P3. 每个港口 8准确双向口 ,共占 32 别针 . 每一个我 /O 线可作为引进和输出独立 . 每个港口有门闩 (即登记特殊功能 )、驾驶人、出口实行缓冲 . 可当门闩使 outputting 数据 ,数据可以缓冲时推出 ,但这些四个功能自我同一 . 在扩大对外开放具有时代记忆系统 ,这四个港口可准确双向口一 /O 共同使用。在扩大对外开放具有时代记忆系统 ,高 8P2 口地址见客 . P0 口是一个双向车采用 8 送数据低 地址 /出口Timesharing 在 8051年的巡回一个计算机芯片和四个一 /O港口很巧妙的设计 . 熟悉我 /港澳逻辑电路 ,不仅有利于正确、合理地使用港口、激励周边逻辑电路设计的一个计算机芯片有所提高 . 负载能力和接口港口有一定的要求 ,因为产量等 ,

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