毕业设计（论文）-基于C51兼容微处理器单片机的PWM控制器设计-外文翻译.doc

基于C51兼容微处理器单片机的PWM控制器设计 外文翻译英文原文Design of PWM Controller in a MCS-51 Compatible MCUAuthor . Yue-Li Hu, Wei Wang Microelectronic Research & Development Center Campus P.O.B.221, 149 Yanchang Rd, Shanghai 200072, China IntroductionPWM technology is a kind of voltage regulation method by controlling the switch frequency of DC power with fixed voltage to modify the two-end voltage of load. This technology can be used for a variety of applications including motor control, temperature control and pressure control and so on. In the motor control system shown as Fig. 1, through adjusting the duty cycle of power switch, the speed of motor can be controlled. As shown in Fig. 2, under the control of PWM signal, the average of voltage that controls the speed of motor changes with Duty-cycle ( D = t1/T in this Figure ), thus the motor speed can be increased when motor power turn on, decreased when power turn off.Fig.1: The Relationship between Voltage of Armature and Fig.2 Architecture of PWM Module Therefore, the motor speed can be controlled with regularly adjusting the time of turn-on and turn-off. There are three methods could achieve the adjustment of duty cycle: (1) Adjust frequency with fixed pulse-width. (2) Adjust both frequency and pulse-width. (3) Adjust pulse-width with fixed frequency. Generally, there are four methods to generate the PWM signals as the following: (1) Generated by the device composed of separate logic components. This method is the original method which now has been discarded. (2) Generated by software. This method need CPU to continuously operate instructions to control I/O pins for generating PWM output signals, so that CPU can not do anything other. Therefore, the method also has been discarded gradually. (3) Generated by ASIC. The ASIC makes a decrease of CPU burden and steady work generally has several functions such as over-current protection, dead-time adjustment and so on. Then the method has been widely used in many kinds of occasion now. (4) Generated by PWM function module of MCU. Through embedding PWM function module in MCU and initializing the function, PWM pins of MCU can also automatically generate PWM out signals without CPU controlling only when need to change duty-cycle. It is the method that will be implemented in this paper.In this paper, we propose a PWM module embedded in a 8051 microcontroller. The PWM module can support PWM pulse signals by initializing the control register and duty-cycle register with three methods just mentioned above to adjust the duty cycle and several operation modes to add flexibility for user. The following section explains the architecture of the PWM module and the architectures of basic functional blocks. Section3 describes two operation modes. Experimental and simulation results verifying proper system operation are also shown in that section. Depending on mode of operation, the PWM module creates one or more pulse-width modulated signals, whose duty ratios can be independently adjusted.Implementation of PWM module in MCUOverview of the PWM moduleA block diagram of PWM module is shown in Fig.3. It is clearly from the diagram that the whole module is composed of two sections: PWM signal generator and dead-time generator with channel select logic. The PWM function can be started by the user through implementing some instructions for initializing the PWM module. In particular, the following power and motion control applications are supported: DC Motor Uninterruptablel Power Supply (UPS)The PWM module also has the following features: Two PWM signal outputs with complementary or independent operation Hardware dead-time generators for complementary mode Duty cycle updates are configurable to be immediated or synchronized to the PWMFig.3 Architecture of PWM ModuleDetails of the architecturePMW generatorThe architecture of the 2-output PWM generator shown in Fig.4 is based on a 16-bit resolution counter which creates a pulse-width modulated signal. The system is synthesized by a system clock signal whose frequency can be divided by 4 times or 12 times through setting the value of T3M for PWM0 or T4M for PWM1 in the special register PWMCON as shown in Fig.4. To PWM0 generator, the clock to 16-bit counter will be pre-divided by 4 times by default when T3M is set to zero. And the clock will be divided by 12 times when T3M is set to 1. This is also true for PWM1. The other bits in PWMCON are explained in detail in Table 1. Fig .4 Bit Mapping of PWMCONTable 1: The Bit Definition in PWMCONChannel-select logicThe follow Fig. 5 shows the channel-select logic which is useful in Complementary Mode. From this diagram, it is clear to know that signal CP and CPWM control the source of PWMH and PWML. And the details about the two control signals will be discussed in the section 3, and the architecture of dead-time generator will also be discussed in section 5 for the continuity of Complementary Mode.Fig. 5 Diagram of Channel-select LogicOperation Mode and Simulation ResultsThe design has two operation modes: Independent Mode and Complimentary Mode. By setting the corresponding bit CPWM in register PWMCON shown in Fig.6 user can select one of the two operation modes. When CPWM is set to zero, PWM module will work in Independent Mode, whereas, PWM module will work in Complimentary Mode. In the following of this section, the two operation mode will be explained respectively in detail and the simulation results of the PWM module from the Synoposys VCS EDA platform which verify the design will also be shown.Independent PWM Output ModeAn Independent PWM Output mode is useful for driving loads such as the one shown in Figure 6. A particular PWM output is in the Independent Output mode when the corresponding CP bit in the PWMCON register is set to zero.In this case, two-channel PWM outputs are independent of each other. The signal on pin PWM0/PWMH is from PWM0 generator, and the signal on pin PWM1/PWML is from PWM0 generator. The separate case is achieved by the channel-select logic shown in Fig. 6. The PWM I/O pins are set to independent mode by default upon advice reset. The dead-time generator is disabled in the Independent mode. The simulation result is shown in Figure 6 as the following Fig.6 Tr4 and tr3 are run bits to PWM0 and PWM1, respectively. Actually, from this diagram, Pin P15/ P14 of MCU is used for PWMH/ PWML or normal I/O ,alternatively.Fig6 the Waveform of PWM Outputs in Independent ModeComplementary PWM Output ModeThe Complementary Output mode is used to drive inverter loads similar to the one shown in Figure 7. This inverter topology is typical for DC applications. In Complementary Output Mode, the pair of PWM outputs cannot be active simultaneously. The PWM channel and output pin pair are internally configured through channel-select logic as shown in Figure7. A dead-time may be optionally inserted during device switching where both outputs are inactive for a short period.Fig 7 : Typical Load for Complementary PWM OutputsThe Complementary mode is selected for PWM I/O pin pair by setting the appropriate CPWM bit in PWMCON. In this case, PSEL is in effect. PWMH and PWML will come from PWM0 generator when PSEL is set to zero, when the signals from PWM1 generator is useless, whereas PWMH and PWML will come from PWM1 generator when PSEL is set to 1, when the signals from PWM0 generator is useless. In the process of producing the PWM outputs in Complementary Mode, the dead-time will be inserted to be discussed in the following section.Dead-time Control Dead-time generation is automatically enabled when PWM I/O pin pair is operating in the Complementary Output mode. Because the power output devices cannot switch instantaneously, some amount of time must be provided between the turn-off event of one PWM output in a complementary pair and the turn-on event of the other transistor. The 2-output PWM module has one programmable dead-time with 8-bit register.The complementary output pair for the PWM module has an 8-bit down counter that is used to produce the dead-time insertion. As shown in Figure 8, the dead time unit has a rising and falling edge detector connected to PWM signal from one of PWM generator. The dead times is loaded into the timer on the detected PWM edge event. Depending on whether the edge is rising or falling, one of the transitions on the complementary outputs is delayed until the timer counts down to zero. A timing diagram indicating the dead time insertion for the pair of PWM outputs is shown in Figure 8a.Fig 8a Dead-time Unit Block DiagramFig. 8b the Waveforms of PWM Outputs in Complementary ModeConclusionsIn this paper, we have designed PWM module based on an 8-bit MCU compatible with 8051 family. The design can generate 2-channel programmable periodic PWM signals with two operation mode, Independent Mode and Complementary Mode in which dead-time will be inserted. The simulation results on the EDA platform have proven its correctness and usefulness.汉语翻译基于C51兼容微处理器单片机的PWM控制器设计作者：Yue-Li Hu, Wei Wa 单片机研究与开发中心 Campus P.O.B.221, 149 Yanchang Rd, Shanghai 200072, China导 言PWM技术，是一种电压调节方法，通过控制具有固定电压的直流电源的开关频率来调整两端负荷电压。这种技术能用于各种应用包括电机、温度、和压力的控制，等等。在电机系统中的应用，如图1所示，通过调整电源开关的占空比，来控制电机的速度，如图2所示，平均电压通过改变占空比来控制电机的速度（在图中D=t1/T）,这样当电机的电源打开时，它的速度加快，相反，当电源关闭时，速度下降。图1 PWM控制框图 图2 电压的电枢和占空比之间的关系所以，通过定期地调整时间的开通和关断来控制电机的转速：这儿有三种方法可以完成占空比的调整（1）通过脉宽来调整频率；（2）通过同时调整频率和脉宽；（3）通过频率来调整脉宽。一般情况下，有四中方法可以产生PWM信号，正如以下：（1）由独立逻辑元件组成的装置产生，这种是原始的方法，现在已被淘汰；（2）通过软件产生，这种方法需要CPU持续操作代码来控制I/O口，以致于CPU不能做其他任何事。所以，这种方法也渐渐被淘汰；（3）通过ASIC产生，ASIC减少了CPU的负担，并获得了稳定的工作，一般有几个功能，如电流保护、死区时间调整等等；然而这种方法现在已被广泛用于许多场合；（4）通过单片机的PWM功能模块产生，只有当需要改变占空比的时候CPU失控，这样就不能产生PWM信号，否则通过在单片机里嵌入PWM功能模块，并使这功能初始化，单片机的PWM口也能自动产生PWM信号。这种方法将在文章中讲述。 在本文中，我们建议在8051单片机里嵌入一个PWM模块。该PWM模块，通过初始化控制寄存器和寄存器的占空比，可以支持PWM脉冲信号，用刚才提到的上述三种方法调整占空比和几个操作模式，以增加用户弹性。以下这部分解释PWM模块和基本功能模块的结构。第三部分描述两种操作模式。这部分还讲述了实验和仿真的结果验证了合适的系统操作。通过操作模式，PWM模块产生一个或更多的脉宽模块信号，它们的比率可以自主调整。在单片机上执行PWM模块PWM模块的概述PWM模块如图3所示，从图中，可以很清楚得看到整个模块有两部分组成：PWM信号产生器和带有频道选择逻辑的死区时间产生器。用户可以通过执行一些代码使PWM模块初始化，从而启动其功能。在特殊情况下，支持以下电源和运动控制应用：1.直流电机2.持续电源供应PWM模块也有以下特征：1.两个PWM输出信号以互补或独立的方式运行2.带有互补模式的硬件死区电动机3.占空比更新设置应立刻或与PWM同步 图3 PWM模块的结构结构的详细组成PWM电动机 二输出PWM电动机的结构如图2.1所示，该结构是基于能产生脉宽调制信号上的16位计数器。该系统由四分频或十二分频的系统时钟信号合成，时钟信号的频率可通过对在特殊寄存器PWMCON中的PWM0电机的T3M或PWM1电机的T4M的值进行设置而调整，如图4所示：对于PWM0电机，当T3M设置为零时，16位计数器时钟将被默认预分为四分频，当T3M设置为1时，始终将被十二分频；PWM同样有这种功能。在PWMCON中的其它位的定义，详见表1图4 PWMCON的位的位置表1：PWMCON的位的定义通道选择逻辑 通道选择逻辑在互补模式中很有用，如图5所示。从表中可以清楚得看出，信号的CP和CPWM控制PWM1和PWML的来源，这两个控制信号的详细情况将在第三部分讲述，死区时间电机的结构也将在一下部分的连续性互补模式中讲述。图5 通道选择逻辑表运行模式和仿真结果这种设计有两种运行模式