经典PC案例文件 3G超大 电子学习资料 电子设计资料补充 资料库 芯片资料2 74系列芯片总汇 74HC193

TL F 5011 MM54HC192 MM74HC192 Synchronous Decade Up Down Counters MM54HC193 MM74HC193 Synchronous Binary Up Down Counters January 1988 MM54HC192 MM74HC192 Synchronous Decade Up Down Counters MM54HC193 MM74HC193 Synchronous Binary Up Down Counters General Description These high speed synchronous counters utilize advanced silicon gate CMOS technology to achieve the high noise im munity and low power consumption of CMOS technology along with the speeds of low power Schottky TTL The MM54HC192 MM74HC192 is a decade counter and the MM54HC193 MM74HC193 is a binary counter Both coun ters have two separate clock inputs an UP COUNT input and a DOWN COUNT input All outputs of the flip flops are simultaneously triggered on the low to high transition of ei ther clock while the other input is held high The direction of counting is determined by which input is clocked These counters may be preset by entering the desired data on the DATA A DATA B DATA C and DATA D inputs When the LOAD input is taken low the data is loaded inde pendently of either clock input This feature allows the count ers to be used as divide by n counters by modifying the count length with the preset inputs In addition both counters can also be cleared This is ac complished by inputting a high on the CLEAR input All 4 internal stages are set to a low level independently of either COUNT input Both a BORROW and CARRY output are provided to en able cascading of both up and down counting functions The BORROW output produces a negative going pulse when the counter underflows and the CARRY outputs a pulse when the counter overflows The counters can be cascaded by connecting the CARRY and BORROW outputs of one de vice to the COUNT UP and COUNT DOWN inputs respec tively of the next device All inputs are protected from damage due to static dis charge by diodes to VCCand ground Features YTypical propagation delay Count up to Q 28 ns YTypical operating frequency 27 MHz YWide power supply range 2 6V YLow quiescent supply current 80 mA maximum 74HC Series YLow input current 1 mA maximum Y4 mA output drive Connection Diagram Dual In Line Package TL F 5011 1 Order Number MM54HC192 193 or MM74HC192 193 Truth Table Count ClearLoadFunction UpDown uHLHCount Up HuLHCount Down XXHXClear XXLLLoad Hehigh level Lelow level uetransition from low to high Xedon t care C1995 National Semiconductor Corporation RRD B30M115 Printed in U S A Absolute Maximum Ratings Notes 1 ceramic J package b12 mW C from 100 C to 125 C Note 4 For a power supply of 5Vg10 the worst case output voltages VOH and VOL occur for HC at 4 5V Thus the 4 5V values should be used when designing with this supply Worst case VIHand VILoccur at VCCe5 5V and 4 5V respectively The VIHvalue at 5 5V is 3 85V The worst case leakage current IIN ICC and IOZ occur for CMOS at the higher voltage and so the 6 0V values should be used VILlimits are currently tested at 20 of VCC The above VILspecification 30 of VCC will be implemented no later than Q1 CY 89 2 AC Electrical CharacteristicsTAe25 C VCCe5 0V tretfe6 ns CLe15 pF unless otherwise specified SymbolParameterConditionsTyp Guaranteed Units Limit fMAXMaximum Clock Frequency Count Up2720MHz Count Down3124MHz tPLHMaximum Propagation Delay1726ns Low to High Count Up to Carry tPHLMaximum Propagation Delay1824ns High to Low tPLHMaximum Propagation Delay1624ns Low to HighCount Down to tPHLMaximum Propagation Delay Borrow 1524ns High to Low tPLHMaximum Propagation Delay2840ns Low to High Count Up Or tPHLMaximum Propagation Delay Down to Q 3652ns High to Low tPLHMaximum Propagation Delay3042ns Low to High Data or Load to Q tPHLMaximum Propagation Delay4055ns High to Low tPHLMaximum Propagation Delay Clear to Q 3547ns High to Low Clear HC1924052ns HC1932026ns tWMinimum Pulse Width Load HC1924052ns HC1931020ns Count Up Down1522ns tSDMinimum Setup time Data to Load 1020ns tHDMinimum Hold Time b3 0ns tREMMinimum Removal Time Clear Inactive 10ns to Clock AC Electrical CharacteristicsVCCe2 0V to 6 0V CLe50 pF tretfe6 ns TAe25 C 74HC54HC SymbolParameterConditionsVCC TAeb40 to 85 CTAeb55 to 125 C Units TypGuaranteed Limits 2 0V532 52MHz Count Up4 5V25181412MHz fMAXMaximum Clock Frequency 6 0V29201613MHz 2 0V5432MHz Count Down4 5V27201611MHz 6 0V31231812MHz tPLHMaximum Propagation Delay2 0V30140175210ns Low to High4 5V13283542ns Count Up 6 0V11243036ns tPHLMaximum Propagation Delay to Carry 2 0V39130163195ns High to Low4 5V16263339ns 6 0V14222833ns 3 AC Electrical Characteristics Continued VCCe2 0V to 6 0V CLe50 pF tretfe6 ns TAe25 C 74HC54HC SymbolParameterConditionsVCC TAeb40 to 85 C TAeb55 to 125 CUnits TypGuaranteed Limits tPLH tPHLMaximum Propagation DelayCount Down2 0V39130163195ns to Borrow4 5V16263339ns 6 0V14222833ns tTLH tTHLMaximum Output Rise2 0V307595110ns and Fall Time4 5V8151922ns 6 0V7131619ns tPLHMaximum Propagation Delay2 0V77215269323ns Low to High4 5V35435465ns Count Up Or6 0V30374655ns tPHLMaximum Propagation Delay Down to Q 2 0V95275344413ns High to Low4 5V45556983ns 6 0V38475971ns tPLHMaximum Propagation Delay2 0V85230288345ns Low to High4 5V37465869ns Data or6 0V30394959ns tPHLMaximum Propagation Delay Load to Q 2 0V102290363435ns High to Low4 5V47587387ns 6 0V39496174ns tPHLMaximum Propagation Delay2 0V85265331398ns High to LowClear to Q4 5V42536680ns 6 0V38455668ns Clear2 0V119260325390ns or HC192 4 5V42526578ns Load6 0V38455668ns 2 0V31100125150ns Load HC193 4 5V10202530ns tWMinimum Pulse Width 6 0V9172126ns 2 0V43110138165ns Count Up Down 4 5V17222833ns 6 0V15192429ns 2 0V70130163195ns Clear HC193 4 5V21263339ns 6 0V19222833ns 2 0V30100125150ns tSDMinimum Setup Time Data 4 5V10202530ns To 6 0V9172225ns Load 2 0Vb30000ns tHDMinimum Hold Time4 5V b3 000ns 6 0V b3 000ns tREMMinimum Removal TimeClear Inactive2 0Vb20101010ns to Clock4 5V b3 101010ns 6 0V b2 101010ns Maximum Count Up or Down 2 0V500500500ns tr tf Input Rise when counting down count up input must be high 7 MM54HC192 MM74HC192 Synchronous Decade Up Down Counters MM54HC193 MM74HC193 Synchronous Binary Up Down Counters Physical Dimensionsinches millimeters Order Number MM54HC192J MM54HC193J MM74HC192J or MM74HC193J NS Package J16A Order Number MM74HC192N or MM74HC193N NS Package N16E LIFE SUPPORT POLICY NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Lifesupportdevicesorsystemsaredevicesor2 A critical component is any component of a life systems which a are intended for surgical implantsupport device or system whose failure to perform can into the body or b support or sustain life and whosebe reasonably expected to cause the failure of the life failure to perform when properly used in accordancesupport device or system or to affect its safety or with instructions for use provided in the labeling caneffectiveness be reasonably expected to result in a s