文献翻译——使用8051单片机验证和测试单粒子效应的加固工艺_第1页
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第1页外文文献资料ValidationandTestingofDesignHardeningforSingleEventEffectsUsingthe8051MicrocontrollerAbstractWiththedearthofdedicatedradiationhardenedfoundries,newandnoveltechniquesarebeingdevelopedforhardeningdesignsusingnon-dedicatedfoundryservices.Inthispaper,wewilldiscusstheimplicationsofvalidatingthesemethodsforthesingleeventeffects(SEE)inthespaceenvironment.Topicsincludethetypesofteststhatarerequiredandthedesigncoverage(i.e.,designlibraries:dotheyneedvalidatingforeachapplication?).Finally,an8051MicrocontrollercorefromNASAInstituteofAdvancedMicroelectronics(IAE)CMOSUltraLowPowerRadiationTolerant(CULPRiT)designisevaluatedforSEEmitigativetechniquesagainsttwocommercial8051devices.IndexTermsSingleEventEffects,Hardened-By-Design,microcontroller,radiationeffects.I.INTRODUCTIONNASAconstantlystrivestoprovidethebestcaptureofsciencewhileoperatinginaspaceradiationenvironmentusingaminimumofresources1,2.Witharelativelylimitedselectionofradiation-hardenedmicroelectronicdevicesthatareoftentwoormoregenerationsofperformancebehindcommercialstate-ofthe-arttechnologies,NASAsperformanceofthistaskisquitechallenging.Onemethodofalleviatingthisisbytheuseofcommercialfoundryalternativeswithnoorminimallyinvasivedesigntechniquesforhardening.Thisisoftencalledhardened-by-design(HBD).Buildingcustom-typeHBDdevicesusingdesignlibrariesandautomateddesigntoolsmayprovideNASAthesolutionitneedstomeetstringentscienceperformance第2页specificationsinatimely,cost-effective,andreliablemanner.However,onequestionstillexists:traditionalradiation-hardeneddeviceshavelotand/orwaferradiationqualificationtestsperformed;whattypesoftestsarerequiredforHBDvalidation?II.TESTINGHBDDEVICESCONSIDERATIONSTestmethodologiesintheUnitedStatesexisttoqualifyindividualdevicesthroughstandardsandorganizationssuchasASTM,JEDEC,andMIL-STD-883.Typically,TID(Co-60)andSEE(heavyionand/orproton)arerequiredfordevicevalidation.SowhatisuniquetoHBDdevices?Asopposedtoa“regular”commercial-off-the-shelf(COTS)deviceorapplicationspecificintegratedcircuit(ASIC)wherenohardeninghasbeenperformed,oneneedstodeterminehowvalidatedisthedesignlibraryasopposedtodeterminingthedevicehardness.Thatis,byusingtestchips,canwe“qualify”afuturedeviceusingthesamelibrary?ConsiderifVendorAhasdesignedanewHBDlibraryportabletofoundriesBandC.Atestchipisdesigned,tested,anddeemedacceptable.NinemonthslateraNASAflightprojectentersthemixbydesigninganewdeviceusingVendorAslibrary.Doesthisdevicerequirecompleteradiationqualificationtesting?Toanswerthis,otherquestionsmustbeasked.Howcompletewasthetestchip?Wastheresufficientstatisticalcoverageofalllibraryelementstovalidateeachcell?IfthenewNASAdesignusesapartiallyorinsufficientlycharacterizedportionofthedesignlibrary,fulltestingmightberequired.Ofcourse,ifpartoftheHBDwasrelyingoninherentradiationhardnessofaprocess,someofthetests(likeSELintheearlierexample)maybewaived.Otherconsiderationsincludespeedofoperationandoperatingvoltage.Forexample,ifthetestchipwastestedstaticallyforSEEatapowersupplyvoltageof3.3V,isthedataapplicabletoa100MHzoperatingfrequencyat2.5V?Dynamicconsiderations(i.e.,nonstaticoperation)includethepropagatedeffectsofSingleEventTransients(SETs).Thesecanbeagreaterconcernathigherfrequencies.Thepointoftheconsiderationsisthatthedesignlibrarymustbeknown,第3页thecoverageusedduringtestingisknown,thetestapplicationmustbethoroughlyunderstoodandthecharacteristicsofthefoundrymustbeknown.Ifalltheseareapplicableorhavebeenvalidatedbythetestchip,thennotestingmaybenecessary.AtaskwithinNASAsElectronicPartsandPackaging(NEPP)Programwasperformedtoexplorethesetypesofconsiderations.III.HBDTECHNOLOGYEVALUATIONUSINGTHE8051MICROCONTROLLERWiththeirincreasingcapabilitiesandlowerpowerconsumption,microcontrollersareincreasinglybeingusedinNASAandDODsystemdesigns.ThereareexistingNASAandDoDprogramsthataredoingtechnologydevelopmenttoprovideHBD.Microcontrollersareonesuchvehiclethatisbeinginvestigatedtoquantifytheradiationhardnessimprovement.Examplesoftheseprogramsarethe8051microcontrollerbeingdevelopedbyMissionResearchCorporation(MRC)andtheIAE(thefocusofthisstudy).AstheseHBDtechnologiesbecomeavailable,validationofthetechnology,inthenaturalspaceradiationenvironment,forNASAsuseinspaceflightsystemsisrequired.The8051microcontrollerisanindustrystandardarchitecturethathasbroadacceptance,wide-rangingapplicationsanddevelopmenttoolsavailable.Therearenumerouscommercialvendorsthatsupplythiscontrollerorhaveitintegratedintosometypeofsystem-on-a-chipstructure.BothMRCandIAEchosethisdevicetodemonstratetwodistinctlydifferenttechnologiesforhardening.TheMRCexampleofthisistousetemporallatchesthatrequirespecifictimingtoensurethatsingleeventeffectsareminimized.TheIAEtechnologyusesultralowpower,andlayoutandarchitectureHBDdesignrulestoachievetheirresults.ThesearefundamentallydifferentthantheapproachbyAeroflex-UnitedTechnologiesMicroelectronicsCenter(UTMC),thecommercialvendorofaradiationhardened8051,thatbuilttheir8051Microcontrollerusingradiationhardenedprocesses.Thisbroadrangeoftechnologywithinonedevicestructuremakesthe8051anidealvehicleforperformingthistechnologyevaluation.TheobjectiveofthisworkisthetechnologyevaluationoftheCULPRiTprocess3fromIAE.Theprocesshasbeenbaselinedagainsttwootherprocesses,thestandard8051commercialdevicefromIntelandaversionusing第4页state-of-the-artprocessingfromDallasSemiconductor.Byperformingthisside-by-sidecomparison,thecostbenefit,performance,andreliabilitytradestudycanbedone.Intheperformanceofthetechnologyevaluation,thistaskdevelopedhardwareandsoftwarefortestingmicrocontrollers.Athoroughprocesswasdonetooptimizethetestprocesstoobtainascompleteanevaluationaspossible.Thisincludedtakingadvantageoftheavailablehardwareandwritingsoftwarethatexercisedthemicrocontrollersuchthatallsubstructuresoftheprocessorwereevaluated.Thisprocessisalsoleadingtoamorecompleteunderstandingofhowtotestcomplexstructures,suchasmicrocontrollers,andhowtomoreefficientlytestthesestructuresinthefuture.IV.TESTDEVICESThreedeviceswereusedinthistestevaluation.ThefirstistheNASACULPRiTdevice,whichistheprimarydevicetobeevaluated.Theothertwodevicesaretwoversionsofacommercial8051,manufacturedbyIntelandDallasSemiconductor,respectively.TheInteldevicesaretheROMless,CMOSversionoftheclassic8052MCS-51microcontroller.Theyareratedforoperationat+5V,overatemperaturerangeof0to70Candataclockspeedsof3.5MHzto24MHz.TheyaremanufacturedinIntelsP629.0CHMOSIII-Eprocess.TheDallasSemiconductordevicesaresimilarinthattheyareROMless8052microcontrollers,buttheyareenhancedinvariousways.Theyareratedforoperationfrom4.25to5.5Voltsover0to70Catclockspeedsupto25MHz.Theyhaveasecondfullserialportbuiltin,sevenadditionalinterrupts,awatchdogtimer,apowerfailreset,dualdatapointersandvariablespeedperipheralaccess.Inaddition,thecoreisredesignedsothatthemachinecycleisshortenedformostinstructions,resultinginaneffectiveprocessingabilitythatisroughly2.5timesgreater(faster)thanthestandard8052device.Noneofthesefeatures,otherthanthoseinherentinthedeviceoperation,wereutilizedinordertomaximizethesimilaritybetweentheDallasandInteltestcodes.TheCULPRiTtechnologydeviceisaversionoftheMSC-51family第5页compatibleC8051HDLcorelicensedfromtheUltraLowPower(ULP)processfoundry.TheCULPRiTtechnologyC8051deviceisdesignedtooperateatasupplyvoltageof500mVandincludesanon-chipinput/outputsignallevel-shiftinginterfacewithconventionalhighervoltageparts.TheCULPRiTC8051devicerequirestwoseparatesupplyvoltages;the500mVandthedesiredinterfacevoltage.TheCULPRiTC8051isROMlessandisintendedtobeinstructionsetcompatiblewiththeMSC-51family.V.TESTHARDWAREThe8051DeviceUnderTest(DUT)wastestedasacomponentofafunctionalcomputerasillustratedinFigure1.AsidefromDUTitself,theothercomponentsoftheDUTcomputerwereremovedfromtheimmediateareaoftheirradiationbeam.Asmallcard(oneperDUTpackagetype)withauniquehard-wiredidentifierbytecontainedtheDUT,itscrystal,andbypasscapacitors(andvoltagelevelshiftersfortheCULPRiTDUTs).ThisDUTBoardwasconnectedtotheMainBoardbyashort60-conductorribboncable.TheMainBoardhadallothercomponentsrequiredtocompletetheDUTComputer,includingsomewhichnominallyarenotnecessaryinsomedesigns(suchasexternalRAM,externalROMandaddresslatch).TheDUTComputerandtheTestControlComputerwereconnectedviaa第6页serialcableandcommunicationswereestablishedbetweenthetwobytheController(thatrunscustomdesignedserialinterfacesoftware).ThisControllersoftwareallowedforcommandingoftheDUT,downloadingDUTCodetotheDUT,andreal-timeerrorcollectionfromtheDUTduringandpostirradiation.A1HzsignalsourceprovidedanexternalwatchdogtimingsignaltotheDUT,whosewatchdogoutputwasmonitoredviaanoscilloscope.Thepowersupplywasmonitoredtoprovideindicationoflatchup.VI.TESTSOFTWAREThe8051testsoftwareconceptisstraightforward.ItwasdesignedtobeamodularseriesofsmalltestprogramseachexercisingaspecificpartoftheDUT(Figure2).Sinceeachtestwasstandalone,theywereloadedindependentlyofeachotherforexecutionontheDUT.Thisensuredthatonlythedesiredportionofthe8051DUTwasexercisedduringthetestandhelpedpinpointlocationoferrorsthatoccurduringtesting.AlltestprogramsresidedonthecontrollerPCuntilloadedviatheserialinterfacetotheDUTcomputer.Inthisway,individualtestscouldhavebeenmodifiedatanytimewithoutthenecessityofburningPROMs.Additionaltestscouldhavealsobeendevelopedandaddedwithoutimpactingtheoveralltestdesign.Theonlypermanentcode,whichwasresidentontheDUT,wasthebootcodeandserialcodeloaderroutinesthatestablishedcommunicationsbetweenthecontrollerPCandtheDUT.第7页Alltestprogramsimplemented:AnexternalUniversalAsynchronousReceiveandTransmitdevice(UART)fortransmissionoferrorinformationandcommunicationtocontrollercomputer.Anexternalreal-timeclockfordataerrortag.Awatchdogroutinedesignedtoprovidevisualverificationof8051healthandrestarttestcodeifnecessary.Afoul-uproutinetoresetprogramcounterifitwandersoutofcodespace.Anexternaltelemetrydatastoragememorytoprovidebackupofdataintheeventofaninterruptionindatatransmission.Thebriefdescriptionofeachofthesoftwaretestsusedisgivenbelow.Itshouldbenotedthatforeachtest,thereturnedtelemetry(includingtimetag)wassenttoboththetestcontrollerandthetelemetrymemory,givingthehighestreliabilitythatalldataiscaptured.InterruptThistestused4of6availableinterruptvectors(Serial,External,Timer0Overflow,andTimer1Overflow)totriggerroutinesthatsequentiallymodifiedavalueintheaccumulatorwhichwasperiodicallycomparedtoaknownvalue.Unexpectedvaluesweretransmittedwithregisterinformation.第8页LogicThistestperformedaseriesoflogicandmathcomputationsandprovidedthreetypesoferroridentifications:1)addition/subtraction,2)logicand3)multiplication/division.Allmiscomparesofcomputationsandexpectedresultsweretransmittedwithotherrelevantregisterinformation.MemoryThistestloadedinternaldatamemoryatlocationsD:0x20throughD:0xff(orD:0x20throughD:0x080fortheCULPRiTDUT),indirectly,withan0x55pattern.Compareswereperformedcontinuouslyandmiscompareswerecorrectedwhileerrorinformationandregistervaluesweretransmitted.ProgramCounter-Theprogramcounterwasusedtocontinuouslyfetchconstantsatvariousoffsetsinthecode.Constantswerecomparedwithknownvaluesandmiscomparesweretransmittedalongwithrelevantregisterinformation.RegistersThistestloadedeachoffour(0,1,2,3)banksofgeneral-purposeregisterswitheither0xAA(forbanks0and2)or0x55(forbanks1and3).ThepatternwasalternatedinordertotesttheProgramStatusWord(PSW)specialfunctionregister,whichcontrolsgeneral-purposeregisterbankselection.General-purposeregisterbankswerethencomparedwiththeirexpectedvalues.Allmiscompareswerecorrectedanderrorinformationwastransmitted.SpecialFunctionRegisters(SFR)Thistestusedlearnedstaticvaluesof12out21availableSFRsandthenconstantlycomparedthelearnedvaluewiththecurrentone.Miscompareswerereloadedwithlearnedvalueanderrorinformationwastransmitted.StackThistestperformedarithmeticbypushingandpoppingoperandsonthestack.Unexpectedresultswereattributedtoerrorsonthestackortothestackpointeritselfandweretransmittedwithrelevantregisterinformation.VII.TESTMETHODOLOGYTheDUTComputerbootedbyexecutingtheinstructioncodelocatedataddress0x0000.Initially,thedeviceatthislocationwasanEPROMpreviouslyloadedwithBoot/SerialLoadercode.ThiscodeinitializedtheDUTComputerandinterfacethroughaserialconnectiontothecontrollingcomputer,theTestController.TheDUTComputerdownloadedTestCodeand第9页putitintoProgramCodeRAM(locatedontheMainBoardoftheDUTComputer).Itthenactivatedacircuitwhichsimultaneouslyperformedtwofunctions:heldtheDUTresetlineactiveforsometime(10ms);and,remappedtheTestCoderesidingintheProgramCodeRAMtolocateittoaddress0x0000(theEPROMwillnolongerbeaccessibleintheDUTComputersmemoryspace).Uponawakingfromthereset,theDUTcomputeragainbootedbyexecutingtheinstructioncodeataddress0x0000,exceptthistimethatcodewasnotbetheBoot/SerialLoadercodebuttheTestCode.TheTestControlComputeralwaysretainedtheabilitytoforcethereset/remapfunction,regardlessoftheDUTComputersfunctionality.Thus,ifthetestranwithoutaSingleEventFunctionalInterrupt(SEFI)eithertheDUTComputeritselfortheTestControllercouldhaveterminatedthetestandallowedthepost-testfunctionstobeexecuted.IfaSEFIoccurred,theTestControllerforcedarebootintoBoot/SerialLoadercodeandthenexecutedthepost-testfunctions.DuringanytestoftheDUT,theDUTexercisedaportionofitsfunctionality(e.g.,RegisteroperationsorInternalRAMcheck,orTimeroperations)atthehighestutilizationpossible,whilemakingaminimalperiodicreporttotheTestControlComputertoconveythattheDUTComputerwasstillfunctional.Ifthisreportceased,theTestControllerknewthataSEFIhadoccurred.Thisperiodicdatawascalledtelemetry.IftheDUTencounteredanerrorthatwasnotinterruptingthefunctionality(e.g.,adataregistermiscompare)itsentamorelengthyreportthroughtheserialportdescribingthaterror,andcontinuedwiththetest.VIII.DISCUSSIONA.SingleEventLatchupThemainargumentforwhylatchupisnotanissuefortheCULPRiTdevicesisthattheoperatingvoltageof0.5voltsshouldbebelowtheholdingvoltagerequiredforlatchuptooccur.Inadditiontothis,thecelllibraryusedalsoincorporatestheheavydualguard-barringscheme4.ThisschemehasbeendemonstratedmultipletimestobeveryeffectiveinrenderingCMOScircuitscompletelyimmunetoSELuptotestlimitsof120MeV-cm2/mg.Thisistrueincircuitsoperatingat5,3.3,and2.5Volts,aswellasthe0.5第10页VoltCULPRiTcircuits.Inonecase,a5VoltcircuitfabricatedonnoncircuitswafersevenexhibitedsuchSELimmunity.B.SingleEventUpsetTheprimarystructureofthestorageunitusedintheCULPRiTdevicesistheSingleEventResistantTopology(SERT)5.GiventheSERTcelltopologyandasingleupsetnodeassumption,itisexpectedthattheSERTcellwillbecompletelyimmunetoSEUsoccurringinternaltothememorycellitself.Obviouslythereareotherthingsgoingon.TheCULPRiT8051resultsreportedherearequitesimilartosomeresultsobtainedwithaCULPRiTCCSDSlosslesscompressionchip(USES)6.TheCULPRiTUSESwassynthesizedusingexactlythesametoolsandlibraryastheCULPRiT8051.WiththeCULPRiTUSES,theSEUcrosssectiondata7wastakenasafunctionoffrequencyattwoLETvalues,37.6and58.5MeV-cm2/mg.Inbothcasesthedatafitwelltoalinearmodelwherecrosssectionisproportionaltoclock.IntheLET37.6case,thezerofrequencyinterceptoccurredessentiallyatthezerocrosssectionpoint,indicatingthatvirtuallyalloftheseSEUsarecapturedSETsfromthecombinationallogic.TheLET58.5dataindicatedthattheSET(frequencydependent)componentissittingontopofadc-biascomponentpresumablyasecondupsetmechanismisoccurringinternaltotheSERTcellsonlyatasecond,higherLETthreshold.TheSETmitigationschemeusedintheCULPRiTdevicesisbasedontheSERTcellsfaulttolerantinputpropertywhenredundantinputdataisprovidedtoseparatestoragenodes.Theideaisthattheredundantinputdataisprovidedthroughatotalduplicationofcombinationallogic(referredtoas“dualraildesign”)suchthatasimpleSETononerailcannotproduceanupset.Therefore,someotherupsetmechanismmustbehappening.ItispossiblethatasingleparticlestrikeisplacinganSETonbothhalvesofthelogicstreams,allowinganSETtoproduceanupset.CarewastakentoseparatethedualsensitivenodesintheSERTcelllayoutsbuttheautomatedplace-and-routeofthecombinatoriallogicpathsmayhaveplaceddualsensitivenodescloseenough.Atthispoint,thetheoryfortheCULPRiTSEUresponseisthatataboutanLETof20,theenergydepositionissufficientlywideenough(andinthe第11页rightlocations)toproduceanSETinbothhalvesofthecombinatoriallogicstreams.IncreasingLETallowsformoreregionstobesensitivetothiseffect,yieldingalargercrosssection.Further,thesecondSEUmechanismthatstartsatanLETofabout40-60hastodowithwhenthechargecollectiondisturbancecloudgetslargeenoughtoeffectivelyupsetmultiplesoftheredundantstoragenodeswithintheSERTcellitself.Inthis0.35mlibrary,thenodeseparationisseveralmicrons.However,sinceittakeslesschargetoupsetanodeoperatingat0.5Volts,withtransistorshavingeffectivethresholdsaround70mV,thisislikelytheeffectbeingobserved.Alsothefactthattheper-bitmemoryupsetcrosssectionfortheCULPRiTdevicesandthecommercialtechnologiesareapproximatelyequal,asshowninFigure9,indicatesthatthecellitselfhasbecomesensitivetoupset.IX.SUMMARYAdetailedcomparisonoftheSEEsensitivityofaHBDtechnology(CULPRiT)utilizingthe8051microcontrollerasatestvehiclehasbeencompleted.ThispaperdiscussesthetestmethodologyusedandpresentsacomparisonofthecommercialversusCULPRiTtechnologiesbasedonthedatataken.TheCULPRiTdevicesconsistentlyshowsignificantlyhigherthresholdLETsandanimmunity第12页tolatchup.InallbutthememorytestatthehighestLETs,thecrosssectioncurvesforallupseteventsisonetotwoordersofmagnitudelowerthanthecommercialdevices.Additionally,theoryispresented,basedontheCULPRiTtechnology,thatexplaintheseresults.ThispaperalsodemonstratesthetestmethodologyforquantifyingthelevelofhardnessdesignedintoaHBDtechnology.ByusingtheHBDtechnologyinareal-worlddevicestructure(i.e.,notjustatestchip),andcomparingresultstoequivalentcommercialdevices,onecanhaveconfidenceinthelevelofhardnessthatwouldbeavailablefromthatHBDtechnologyinanycircuitapplication.ACKNOWLEDGEMENTSTheauthorsofthispaperwouldliketoacknowledgethesponsorsofthiswork.ThesearetheNASAElectronicPartsandPackagingProgram(NEPP),NASAFlightPrograms,andtheDefenseThreatReductionAgency(DTRA).中文翻译稿第13页使用8051单片机验证和测试单粒子效应的加固工艺摘要随着代工业务(抗辐射加固设计的芯片制造加工厂专门从事的一项业务)的减少,使用非专用代工业务的新技术逐步发展起来。在这篇论文中,我们将在空间环境中讨论单粒子效应(SEE)的验证方法。课题包括需要测试的类型和设计覆盖面(即他们是否需要验证设计库的每个应用程序)

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