外文文献翻译原文-AT89C2051微控制器的指令

AT89C2051MicrocontrollerInstructions1.1FeaturesCompatiblewithMCS-51Products2KbytesofReprogrammableFlashMemoryEndurance:1,000Write/EraseCycles2.7Vto6VOperatingRangeFullyStaticOperation:0Hzto24MHzTwo-LevelProgramMemoryLock128x8-BitInternalRAM15ProgrammableI/OLinesTwo16-BitTimer/CountersSixInterruptSourcesProgrammableSerialUARTChannelDirectLEDDriveOutputsOn-ChipAnalogComparatorLowPowerIdleandPowerDownModes1.2DescriptionTheAT89C2051isalow-voltage,high-performanceCMOS8-bitmicrocomputerwith2KbytesofFlashprogrammableanderasablereadonlymemory(PEROM).ThedeviceismanufacturedusingAtmelshighdensitynonvolatilememorytechnologyandiscompatiblewiththeindustrystandardMCS-51instructionsetandpinout.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theAtmelAT89C2051isapowerfulmicrocomputerwhichprovidesahighlyflexibleandcosteffectivesolutiontomanyembeddedcontrolapplications.TheAT89C2051providesthefollowingstandardfeatures:2KbytesofFlash,128bytesofRAM,15I/Olines,two16-bittimer/counters,afivevectortwo-levelinterruptarchitecture,afullduplexserialport,aprecisionanalogcomparator,on-chiposcillatorandclockcircuitry.Inaddition,theAT89C2051isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialportandinterruptsystemtocontinuefunctioning.ThePowerDownModesavestheRAMcontentsbutfreezestheoscillatordisablingallotherchipfunctionsuntilthenexthardwarereset.1.3PinConfiguration1.4PinDescriptionVCCSupplyvoltage.GNDGround.Port1Port1isan8-bitbidirectionalI/Oport.PortpinsP1.2toP1.7provideinternalpullups.P1.0andP1.1requireexternalpullups.P1.0andP1.1alsoserveasthepositiveinput(AIN0)andthenegativeinput(AIN1),respectively,oftheon-chipprecisionanalogcomparator.ThePort1outputbufferscansink20mAandcandriveLEDdisplaysdirectly.When1sarewrittentoPort1pins,theycanbeusedasinputs.WhenpinsP1.2toP1.7areusedasinputsandareexternallypulledlow,theywillsourcecurrent(IIL)becauseoftheinternalpullups.Port1alsoreceivescodedataduringFlashprogrammingandprogramverification.Port3Port3pinsP3.0toP3.5,P3.7aresevenbidirectionalI/Opinswithinternalpullups.P3.6ishard-wiredasaninputtotheoutputoftheon-chipcomparatorandisnotaccessibleasageneralpurposeI/Opin.ThePort3outputbufferscansink20mA.When1sarewrittentoPort3pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseofthepullups.PortPinAlternateFunctionsP3.0RXD(serialinputport)P3.1TXD(serialoutputport)P3.2INT0(externalinterrupt0)P3.3INT1(externalinterrupt1)P3.4T0(timer0externalinput)P3.5T1(timer1externalinput)Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89C2051aslistedbelow:1.5OscillatorCharacteristicsXTAL1andXTAL2aretheinputandoutput,respectively,ofaninvertingamplifierwhichcanbeconfiguredforuseasanon-chiposcillator,asshowninFigure1.Eitheraquartzcrystalorceramicresonatormaybeused.Todrivethedevicefromanexternalclocksource,XTAL2shouldbeleftunconnectedwhileXTAL1isdrivenasshowninFigure2.Therearenorequirementsonthedutycycleoftheexternalclocksignal,sincetheinputtotheinternalclockingcircuitryisthroughadivideby-twoflip-flop,butminimumandmaximumvoltagehighandlowtimespecificationsmustbeobserved.1.6SpecialFunctionRegistersAmapoftheon-chipmemoryareacalledtheSpecialFunctionRegister(SFR)spaceisshowninthetablebelow.Notethatnotalloftheaddressesareoccupied,andunoccupiedaddressesmaynotbeimplementedonthechip.Readaccesses.totheseaddresseswillingeneralreturnrandomdata,andwriteaccesseswillhaveanindeterminateeffect.Usersoftwareshouldnotwrite1stotheseunlistedlocations,sincetheymaybeusedinfutureproductstoinvokenewfeatures.Inthatcase,theresetorinactivevaluesofthenewbitswillalwaysbe0.1.7RestrictionsonCertainInstructionsTheAT89C2051andisaneconomicalandcost-effectivememberofAtmelsgrowingfamilyofmicrocontrollers.Itcontains2Kbytesofflashprogrammemory.ItisfullycompatiblewiththeMCS-51architecture,andcanbeprogrammedusingtheMCS-51instructionset.However,thereareafewconsiderationsonemustkeepinmindwhenutilizingcertaininstructionstoprogramthisdevice.Alltheinstructionsrelatedtojumpingorbranchingshouldberestrictedsuchthatthedestinationaddressfallswithinthephysicalprogrammemoryspaceofthedevice,whichis2KfortheAT89C2051.Thisshouldbetheresponsibilityofthesoftwareprogrammer.Forexample,LJMP7E0HwouldbeavalidinstructionfortheAT89C2051(with2Kofmemory),whereasLJMP900Hwouldnot.1.Branchinginstructions:LCALL,LJMP,ACALL,AJMP,SJMP,JMPA+DPTRTheseunconditionalbranchinginstructionswillexecutecorrectlyaslongastheprogrammerkeepsinmindthatthedestinationbranchingaddressmustfallwithinthephysicalboundariesoftheprogrammemorysize(locations00Hto7FFHforthe89C2051).Violatingthephysicalspacelimitsmaycauseunknownprogrambehavior.CJNE.,DJNZ.,JB,JNB,JC,JNC,JBC,JZ,JNZWiththeseconditionalbranchinginstructionsthesameruleaboveapplies.Again,violatingthememoryboundariesmaycauseerraticexecution.Forapplicationsinvolvinginterruptsthenormalinterruptserviceroutineaddresslocationsofthe80C51familyarchitecturehavebeenpreserved.2.MOVX-relatedinstructions,DataMemory:TheAT89C2051contains128bytesofinternaldatamemory.Thus,intheAT89C2051thestackdepthislimitedto128bytes,theamountofavailableRAM.ExternalDATAmemoryaccessisnotsupportedinthisdevice,norisexternalPROGRAMmemoryexecution.Therefore,noMOVX.instructionsshouldbeincludedintheprogram.Atypical80C51assemblerwillstillassembleinstructions,eveniftheyarewritteninviolationoftherestrictionsmentionedabove.Itistheresponsibilityofthecontrollerusertoknowthephysicalfeaturesandlimitationsofthedevicebeingusedandadjusttheinstructionsusedcorrespondingly.1.8ProgramMemoryLockBitsOnthechiparetwolockbitswhichcanbeleftunprogrammed(U)orcanbeprogrammed(P)toobtaintheadditionalfeatureslistedinthetablebelow:LockBitProtectionModes(1)ProgramLockBitsLB1LB2ProtectionType1UUNoprogramlockfeatures.2PUFurtherprogrammingoftheFlashisdisabled.3PPSameasmode2,alsoverifyisdisabled.Note:1.TheLockBitscanonlybeerasedwiththeChipEraseoperation1.9IdleModeInidlemode,theCPUputsitselftosleepwhilealltheon-chipperipheralsremainactive.Themodeisinvokedbysoftware.Thecontentoftheon-chipRAMandallthespecialfunctionsregistersremainunchangedduringthismode.Theidlemodecanbeterminatedbyanyenabledinterruptorbyahardwarereset.P1.0andP1.1shouldbesetto0ifnoexternalpullupsareused,orsetto1ifexternalpullupsareused.Itshouldbenotedthatwhenidleisterminatedbyahardwarereset,thedevicenormallyresumesprogramexecution,fromwhereitleftoff,uptotwomachinecyclesbeforetheinternalresetalgorithmtakescontrol.On-chiphardwareinhibitsaccesstointernalRAMinthisevent,butaccesstotheportpinsisnotinhibited.ToeliminatethepossibilityofanunexpectedwritetoaportpinwhenIdleisterminatedbyreset,theinstructionfollowingtheonethatinvokesIdleshouldnotbeonethatwritestoaportpinortoexternalmemory.1.10PowerDownModeInthepowerdownmodetheoscillatorisstopped,andtheinstructionthatinvokespowerdownisthelastinstructionexecuted.Theon-chipRAMandSpecialFunctionRegistersretaintheirvaluesuntilthepowerdownmodeisterminated.Theonlyexitfrompowerdownisahardwarereset.ResetredefinestheSFRsbutdoesnotchangetheon-chipRAM.TheresetshouldnotbeactivatedbeforeVCCisrestoredtoitsnormaloperatinglevelandmustbeheldactivelongenoughtoallowtheoscillatortorestartandstabilize.P1.0andP1.1shouldbesetto0ifnoexternalpullupsareused,orsetto1ifexternalpullupsareused.1.11ProgrammingTheFlashTheAT89C2051isshippedwiththe2Kbytesofon-chipPEROMcodememoryarrayintheerasedstate(i.e.,contents=FFH)andreadytobeprogrammed.Thecodememoryarrayisprogrammedonebyteatatime.Oncethearrayisprogrammed,tore-programanynon-blankbyte,theentirememoryarrayneedstobeerasedelectrically.InternalAddressCounter:TheAT89C2051containsaninternalPEROMaddresscounterwhichisalwaysresetto000HontherisingedgeofRSTandisadvancedbyapplyingapositivegoingpulsetopinXTAL1.ProgrammingAlgorithm:ToprogramtheAT89C2051,thefollowingsequenceisrecommended.1.Power-upsequence:ApplypowerbetweenVCCandGNDpinsSetRSTandXTAL1toGNDWithallotherpinsfloating,waitforgreaterthan10milliseconds2.SetpinRSTtoHSetpinP3.2toH3.ApplytheappropriatecombinationofHorLlogiclevelstopinsP3.3,P3.4,P3.5,P3.7toselectoneoftheprogrammingoperationsshowninthePEROMProgrammingModestable.ToProgramandVerifytheArray:4.ApplydataforCodebyteatlocation000HtoP1.0toP1.7.5.RaiseRSTto12Vtoenableprogramming.6.PulseP3.2oncetoprogramabyteinthePEROMarrayorthelockbits.Thebyte-writecycleisself-timedandtypicallytakes1.2ms.7.Toverifytheprogrammeddata,lowerRSTfrom12VtologicHlevelandsetpinsP3.3toP3.7totheappropiatelevels.OutputdatacanbereadattheportP1pins.8.Toprogramabyteatthenextaddresslocation,pulseXTAL1pinoncetoadvancetheinternaladdresscounter.ApplynewdatatotheportP1pins.9.Repeatsteps5through8,changingdataandadvancingtheaddresscounterfortheentire2Kbytesarrayoruntiltheendoftheobjectfileisreached.10.Power-offsequence:setXTAL1toLsetRSTtoLFloatallotherI/OpinsTurnVccpoweroffDataPolling:TheAT89C2051featuresDataPollingtoindicatetheendofawritecycle.Duringawritecycle,anattemptedreadofthelastbytewrittenwillresultinthecomplementofthewrittendataonP1.7.Oncethewritecyclehasbeencompleted,truedataisvalidonalloutputs,andthenextcyclemaybegin.DataPollingmaybeginanytimeafterawritecyclehasbeeninitiated.Ready/Busy:TheProgressofbyteprogrammingcanalsobemonitoredbytheRDY/BSYoutputsignal.PinP3.1ispulledlowafterP3.2goesHighduringprogrammingtoindicateBUSY.P3.1ispulledHighagainwhenprogrammingisdonetoindicateREADY.ProgramVerify:IflockbitsLB1andLB2havenotbeenprogrammedcodedatacanbereadbackviathedatalinesforverification:1.Resettheinternaladdresscounterto000HbybringingRSTfromLtoH.2.ApplytheappropriatecontrolsignalsforReadCodedataandreadtheoutputdataattheportP1pins.3.PulsepinXTAL1oncetoadvancetheinternaladdresscounter.4.ReadthenextcodedatabyteattheportP1pins.5.Repeatsteps3and4untiltheentirearrayisread.Thelockbitscannotbeverifieddirectly.Verificationofthelockbitsisachievedbyobservingthattheirfeaturesareenabled.ChipErase:TheentirePEROMarray(2Kbytes)andthetwoLockBitsareerasedelectricallybyusingthepropercombinationofcontrolsignalsandbyholdingP3.2lowfor10ms.Thecodearrayiswrittenwithall1sintheChipEraseoperationandmustbeexecutedbeforeanynon-blankmemorybytecanbere-programmed.ReadingtheSignatureBytes:Thesignaturebytesarereadbythesameprocedureasanormalverificationoflocations000H,001H,and002H,exceptthatP3.5andP3.7mustbepulledtoalogiclow.Thevaluesreturnedareasfollows.(000H)=1EHindicatesmanufacturedbyAtmel(001H)=21Hindicates89C2051ProgrammingInterfaceEverycodebyteintheFlasharraycanbewrittenandtheentirearraycanbeerasedbyusingtheappropriatecombinationofcontrolsignals.Thewriteoperationcycleisself-timedandonceinitiated,willautomaticallytimeitselftocompletion.AllmajorprogrammingvendorsofferworldwidesupportfortheAtmelmicrocontrollerseries.Pleasecontactyourlocalprogrammingvendorfortheappropriatesoftwarerevision.UltrasonicrangingsystemdesignPublicationtitle:SensorReview.Bradford:1993.Vol.ABSTRACT：Ultrasonicrangingtechnologyhaswideusingworthinmanyfields，suchastheindustriallocale，vehiclenavigationandsonarengineeringNowithasbeenusedinlevelmeasurement，self-guidedautonomousvehicles,fieldworkrobotsautomotivenavigation，airandunderwatertargetdetection，identification，locationandsoonSothereisanimportantpracticingmeaningtolearntherangingtheoryandwaysdeeply.Toimprovetheprecisionoftheultrasonicrangingsysteminhand，satisfytherequestoftheengineeringpersonnelfortherangingprecision，theboundandtheusage，aportableultrasonicrangingsystembasedonthesinglechipprocessorwasdevelopedKeywords：Ultrasoundr，RangingSystem，SingleChipProcessor1.IntroductiveWiththedevelopmentofscienceandtechnology,theimprovementofpeoplesstandardofliving,speedingupthedevelopmentandconstructionofthecity.urbandrainagesystemhavegreatlydevelopedtheirsituationisconstantlyimproving.However,duetohistoricalreasonsmanyunpredictablefactorsinthesynthesisofhertime,thecitydrainagesystem.Inparticulardrainagesystemoftenlagsbehindurbanconstruction.Therefore,thereareoftengoodbuildingexcavationhasbeenbuildingfacilitiestoupgradethedrainagesystemphenomenon.Itbroughttothecitysewage,fortisveryimportanttopeopleslives.MobilerobotsdesignedtoclearthedrainageculvertandtheautomaticcontrolsystemFreesewageculvertclearguaranteerobot,therobotisdesignedtocleartheculvertsewagetothecore.ControlSystemisthecorecomponentofthedevelopmentofultrasonicrangefinder.Therefore,itisveryimportanttodesignagoodultrasonicrangefinder.2.Aprincipleofultrasonicdistancemeasurement2.1TheprincipleofpiezoelectricultrasonicgeneratorPiezoelectricultrasonicgeneratoristheuseofpiezoelectriccrystalresonatorstowork.Ultrasonicgenerator,theinternalstructureasshown,ithastwopiezoelectricchipandaresonanceplate.Whenitstwopluspulsesignal,thefrequencyequaltotheintrinsicpiezoelectricoscillationfrequencychip,thechipwillhappenpiezoelectricresonance,andpromotethedevelopmentofplatevibrationresonance,ultrasoundisgenerated.Conversely,ifthetwoarenotinter-electrodevoltage,whentheboardreceivedultrasonicresonance,itwillbeforvibrationsuppressionofpiezoelectricchip,themechanicalenergyisconvertedtoelectricalsignals,thenitbecomestheultrasonicreceiver.Thetraditionalwaytodeterminethemomentoftheechosarrivalisbasedonthresholdingthereceivedsignalwithafixedreference.Thethresholdischosenwellabovethenoiselevel,whereasthemomentofarrivalofanechoisdefinedasthefirstmomenttheechosignalsurpassesthatthreshold.Theintensityofanechoreflectingfromanobjectstronglydependsontheobjectsnature,sizeanddistancefromthesensor.Further,thetimeintervalfromtheechosstartingpointtothemomentwhenitsurpassesthethresholdchangeswiththeintensityoftheecho.Asaconsequence,aconsiderableerrormayoccurEventwoechoeswithdifferentintensitiesarrivingexactlyatthesametimewillsurpassthethresholdatdifferentmoments.Thestrongeronewillsurpassthethresholdearlierthantheweaker,soitwillbeconsideredasbelongingtoanearerobject.2.2TheprincipleofultrasonicdistancemeasurementUltrasonictransmitterinadirectiontolaunchultrasound,inthemomenttolaunchthebeginningoftimeatthesametime,thespreadofultrasoundintheair,obstaclesonhiswaytoreturnimmediately,theultrasonicreflectedwavereceivedbythereceiverimmediatelystoptheclock.Ultrasoundintheairasthepropagationvelocityof340m/s,accordingtothetimerrecordsthetimet,wecancalculatethedistancebetweenthelaunchdistancebarrier(s),thatis:s=340t/23.UltrasonicRangingSystemfortheSecondCircuitDesignSystemischaracterizedbysingle-chipmicrocomputertocontroltheuseofultrasonictransmitterandultrasonicreceiversincethelaunchfromtimetotime,single-chipselectionof8751,economic-to-use,andthechiphas4KofROM,tofacilitateprogramming.CircuitschematicdiagramshowninFigure2.Figure1circuitprinciplediagram3.140kHzultrasonicpulsegeneratedwiththelaunchRangingsystemusingtheultrasonicsensorofpiezoelectricceramicsensorsUCM40,itsoperatingvoltageofthepulsesignalis40kHz,whichbythesingle-chipimplementationofthefollowingprocedurestogenerate.puzel:mov14h,#12h;ultrasonicfiringcontinued200mshere:cplp1.0;output40kHzsquarewaveRanginginfrontofsingle-chipterminationcircuitP1.0inputport,singlechipimplementationoftheaboveprocedure,theP1.0portina40kHzpulseoutputsignal,afteramplificationtransistorT,thedrivetolaunchthefirstultrasonicUCM40T,issued40kHzultrasonicpulse,andthecontinuedlaunchof200ms.Rangingtherightandtheleftsideofthecircuit,respectively,theninputportP1.1andP1.2,theworkingprincipleandcircuitinfrontofthesamelocation.3.2ReceptionandprocessingofultrasonicUsedtoreceivethefirstlaunchofthefirstpairUCM40R,theultrasonicpulsemodulationsignalintoanalternatingvoltage,theop-ampamplificationIC1AandafterpolarizationIC1BtoIC2.IC2islockedloopwithaudiodecoderchipLM567,internalvoltage-controlledoscillatorcenterfrequencyoff0=1/1.1R8C3,capacitorC4determinetheirtargetbandwidth.R8-conditioninginthelaunchofthecarrierfrequencyontheLM567inputsignalisgreaterthan25mV,theoutputfromthehighjump8feetintoalow-level,asinterruptrequestsignalstothesingle-chipprocessing.Ranginginfrontofsingle-chipterminationcircuitoutputportINT0interruptthehighestpriority,rightorleftlocationoftheoutputcircuitwithoutputgateIC3AaccessINT1portsingle-chip,whilesingle-chipP1.3andP1.4receivedinputIC3A,interruptedbytheprocesstoidentifythesourceofinquirytodealwith,interruptprioritylevelforthefirstleftrightafter.Partofthesourcecodeisasfollows:receive1:pushpswpushaccclrex1;relatedexternalinterrupt1jnbp1.1,right;P1.1pinto0,rangingfromrighttointerruptserviceroutinecircuitjnbp1.2,left;P1.2pinto0,totheleftrangingcircuitinterruptserviceroutinereturn:SETBEX1;openexternalinterrupt1popaccpoppswretiright:.;rightlocationentrancecircuitinterruptserviceroutineAjmpReturnleft:.;leftRangingentrancecircuitinterruptserviceroutineAjmpReturn3.3ThecalculationofultrasonicpropagationtimeWhenyoustartfiringatthesametimestartthesingle-chipcircuitrywithinthetimerT0,theuseoftimercountingfunctionrecordsthetimeandthelaunchofultrasonicreflectedwavereceivedtime.Whenyoureceivetheultrasonicreflectedwave,thereceivercircuitoutputsanegativejumpintheendofINT0orINT1interruptrequestgeneratesasignal,single-chipmicrocomputerinresponsetoexternalinterruptrequest,theimplementationoftheexternalinterruptservicesubroutine,readthetimedifference,calculatingthedistance.Someofitssourcecodeisasfollows:RECEIVE0:PUSHPSWPUSHACCCLREX0;relatedexternalinterrupt0MOVR7,TH0;readthetimevalueMOVR6,TL0CLRCMOVA,R6SUBBA,#0BBH;calculat