已阅读5页,还剩2页未读, 继续免费阅读
版权说明:本文档由用户提供并上传,收益归属内容提供方,若内容存在侵权,请进行举报或认领
文档简介
ST SPC563M64L7 32位MCU汽车动力总成解决方案时间:2016-07-26 10:35:31 作者:ST 来源:中电网ST公司的SPC563M64L7是用于汽车动力总成的32位Power Architecture MCU,是系统级芯片(SoC),采用许多新特性的高性能90nm CMOS技术,以降低成本和提高性能,Power Architecture技术具有支持DSP的附加指令,以及诸如增强的时间处理单元,增强排队的模数转换器,控制局域网(CAN)和增强的模块输入/输出系统.此外,器件还集成了94KB SRAM和1.5MB闪存.本文介绍了SPC563M64L7主要特性,框图,以及SPC563Mxx系列Discovery Plus开发板SPC563M-DISP主要特性和电路图,PCB顶层布局图.These 32-bit automotive microcontrollers are a family of System-on-Chip (SoC) devices that contain many new features coupled with high performance 90 nm CMOS technology to provide substantial reduction of cost per feature and significant performance improvement. The advanced and cost-efficient host processor core of this automotive controller family is built on Power Architecture technology. This family contains enhancements that improve the architectures fit in embedded applications, includes additional instruction support for Digital Signal Processing (DSP), integrates technologiessuch as an enhanced time processor unit, enhanced queued analog-to-digital converter, Controller Area Network, and an enhanced modular input-output systemthat are important for todays lower-end powertrain applications. The device has a single level of memory hierarchy consisting of up to 94 KB on-chip SRAM and up to 1.5 MB of internal flash memory. The device also has an External Bus Interface (EBI) for calibration.SPC563M64L7主要特性:Single issue,32-bit Power Architecture Book E compliant e200z335 CPU core complex Includes Variable Length Encoding (VLE) enhancements for code size reduction 32-channel Direct Memory Access controller (DMA) Interrupt Controller (INTC) capable of handling 364 selectable-priority interrupt sources: 191 peripheral interrupt sources, 8 software interrupts and 165 reserved interrupts. Frequency-Modulated Phase-Locked Loop (FMPLL) Calibration External Bus Interface (EBI)(a) System Integration Unit (SIU) Up to 1.5 Mbyte on-chip Flash with Flash controller Fetch Accelerator for single cycle Flash access 80 MHzUp to 94 Kbyte on-chip static RAM (including up to 32 Kbyte standby RAM) Boot Assist Module (BAM) 32-channel second-generation enhanced Time Processor Unit (eTPU) 32 standard eTPU channels Architectural enhancements to improve code efficiency and added flexibility 16-channels enhanced Modular Input-Output System (eMIOS) Enhanced Queued Analog-to-Digital Converter (eQADC) Decimation filter (part of eQADC) Silicon die temperature sensor 2 Deserial Serial Peripheral Interface (DSPI) modules (compatible with Microsecond Bus)2 enhanced Serial Communication Interface (eSCI) modules compatible with LIN2 Controller Area Network (FlexCAN) modules that support CAN 2.0B Nexus Port Controller (NPC) per IEEE-ISTO 5001-2003 standard Nexus interface IEEE 1149.1 (JTAG) support On-chip voltage regulator controller that provides 1.2 V and 3.3 V internal supplies from a 5 V external source.Designed for LQFP144, and LQFP176The SPC563Mxx series microcontrollers are system-on-chip devices that are built on Power Architecture technology and:Contain enhancements that improve the architectures fit in embedded applications Are 100% user-mode compatible with the Power Architecture instruction set Include additional instruction support for digital signal processing (DSP)Integrate technologies such as an enhanced time processor unit, enhanced queued analog-to-digital converter, Controller Area Network, and an enhanced modular input-output system Operating Parameters Fully static operation, 0 MHz 80 MHz (plus 2% frequency modulation - 82 MHz) 40 C150 C junction temperature operating range Low power designLess than 400 mW power dissipation (nominal)Designed for dynamic power management of core and peripheralsSoftware controlled clock gating of peripheralsLow power stop mode, with all clocks stopped Fabricated in 90 nm process 1.2 V internal logic High performance e200z335 core processor Advanced microcontroller bus architecture (AMBA) crossbar switch (XBAR) Enhanced direct memory access (eDMA) controller Interrupt controller (INTC) 191 peripheral interrupt request sources, plus 165 reserved positions Low latencythree clocks from receipt of interrupt request from peripheral to interrupt request to processor Frequency Modulating Phase-locked loop (FMPLL) Calibration bus interface (EBI) (available only in the calibration package)System integration unit (SIU) centralizes control of pads, GPIO pins and external interrupts. Error correction status module (ECSM) provides configurable error-correcting codes (ECC) reportingUp to 1.5 MB on-chip flash memory Up to 94 KB on-chip static RAM Boot assist module (BAM) enables and manages the transition of MCU from reset to user code execution from internal flash memory, external memory on the calibration bus or download and execution of code via FlexCAN or eSCI.Periodic interrupt timer (PIT) 32-bit wide down counter with automatic reload 4 channels clocked by system clock 1 channel clocked by crystal clock System timer module (STM) 32-bit up counter with 8-bit prescaler Clocked from system clock 4 channel timer compare hardware Software watchdog timer (SWT) 32-bit timer Enhanced modular I/O system (eMIOS) 16 standard timer channels (up to 14 channels connected to pins in LQFP144) 24-bit timer resolution Second-generation enhanced time processor unit (eTPU2) High level assembler/compiler Enhancements to make C compiler more efficient New engine relative addressing mode Enhanced queued A/D converter (eQADC) 2 independent on-chip RSD Cyclic ADCs Up to 34 input channels available to the two on-chip ADCs 4 pairs of differential analog input channels 2 deserial serial peripheral interface modules (DSPI) SPI provides full duplex communication ports with interrupt and DMA request support Deserial serial interface (DSI) achieves pin reduction by hardware serialization and deserialization of eTPU, eMIOS channels and GPIO 2 enhanced serial communication interface (eSCI) modules 2 FlexCAN modules IEEE 1149.1 JTAG controller (JTAGC)Nexus port controller (NPC) per IEEE-ISTO 5001-2003 standard 图1.SPC563Mxx系列框图SPC563Mxx系列Discovery Plus开发板SPC563M-DISPThe SPC563M-DISP Discovery kit helps you to discover SPC56 M line Power Architecture Microcontrollers. The discovery board is based on SPC563M64L7, a 32-bit Pow
温馨提示
- 1. 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。图纸软件为CAD,CAXA,PROE,UG,SolidWorks等.压缩文件请下载最新的WinRAR软件解压。
- 2. 本站的文档不包含任何第三方提供的附件图纸等,如果需要附件,请联系上传者。文件的所有权益归上传用户所有。
- 3. 本站RAR压缩包中若带图纸,网页内容里面会有图纸预览,若没有图纸预览就没有图纸。
- 4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
- 5. 人人文库网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对用户上传分享的文档内容本身不做任何修改或编辑,并不能对任何下载内容负责。
- 6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
- 7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。
最新文档
- 2025广西南宁隆安县红十字会招聘公益性岗位工作人员1名笔试考试备考题库及答案解析
- 2025中国邮政集团有限公司七台河市分公司秋季社会招聘13人笔试考试参考题库及答案解析
- 2025河南省地质局所属事业单位招才引智高层次人才40人笔试考试参考题库及答案解析
- 木地板坯料制备工岗前技术综合考核试卷含答案
- 2026天津市卫生健康委员会所属天津市第一中心医院招聘54人考试笔试备考题库及答案解析
- 刃具制造工岗前岗位晋升考核试卷含答案
- 2025重庆轮船(集团)有限公司四川分公司业务人员招聘1人笔试历年参考题库附带答案详解
- 乳品发酵工诚信知识考核试卷含答案
- 2025湖南邵阳市武冈市城乡供水有限公司招聘综合笔试历年参考题库附带答案详解
- 2025广东清远市连山壮族瑶族自治县程山农旅发展有限公司面向社会招聘2名合同制员工考试笔试备考题库及答案解析
- 2025年嘉峪关市网格员考试笔试试题(含答案)
- 小儿术后窒息课件
- 2025年苏科版八年级物理培优练:密度(解析版)
- 工程地质学 第3版 课件 第3章 地质构造
- 慢性病双向转诊制度
- 缝纫设备日常保养制度
- 中老年人中医养生课件教学
- 检察院实习生管理办法
- DB32-T 5035-2025 改扩建工程老路沥青路面结构内部状况快速检测方法与评价规范
- 小儿泄泻门诊病例分析
- 从科技角度探讨国际教育的同质化与多元化
评论
0/150
提交评论