数字电路英文版第十三单元ppt课件

CHAPTER13INTERFACING KEYTERMS AcceptorAreceivingdeviceonabus Analog to digitalconverter ADC Adeviceusedtoconvertananalogsignaltodigitalform BusAsetofinterconnectionsthatinterfaceoneormoredevicesbasedonastandardizedspecification BusarbitrationTheprocessthatpreventstwosourcesfromusingabusatthesametime BuscontentionAnadverseconditionthatcouldoccuriftwoormoredevicestrytocommunicateatthesametimeonabus ControllerAninstrumentthatcanspecifyeachoftheotherinstrumentsonthebusaseitheratalkeroralistenerforthepurposeofdatatransfer DCEDatacommunicationsequipment Digital to analogconverter DAC Adeviceusedtoconvertadigitalinputtoananalogsignal DTEDataterminalequipment FlashADCAsimultaneousanalog to digitalconverter HandshakingTheprocessofsignalinterchangebywhichtwodigitaldevicesorsystemsjointlyestablishcommunication High ZThehigh impedancestateofatristatecircuitinwhichtheoutputiseffectivelydisconnectedfromtherestofthecircuit InterfacingTheprocessofmakingtwoormoreelectronicdevicesorsystemsoperationallycompatiblewitheachothersothattheycanfunctionproperlytogether ISAbusIndustrystandardarchitecturebus aninternalparallelbusstandard LocalbusAninternalbusthatconnectsthemicroprocessortothecachememory themainmemory thecoprocessor andthePCIbuscontroller ModemAmodulator demodulatorforinterfacingdigitaldevicestoanalogtransmissionsystemssuchastelephonelines PCIbusPeripheralcontrolinterconnectbus aninternalparallelbusstandard PeripheralAdeviceorinstrumentthatprovidescommunicationwithacomputerorprovidesauxiliaryservicesorfunctionsforacomputer PortThephysicalinterfacebetweenacomputerandaperipheral SCSISmallcomputersysteminterface anexternalparallelbusstandard SourceAsendingdeviceonabus TristateAtypeofoutputinlogiccircuitsthatexhibitsthreestates HIGH LOW andHigh Z USBUniversalserialbus anexternalserialbusstandard 13 1DIGITALANDANALOGINTERFACING Analogquantitiesaresometimescalledreal worldquantitiesbecausemostphysicalquantitiesthatweareinterestedinmeasuringareanaloginnature 2 3 Manyapplicationsofcomputersandotherdigitalsystemsrequiretheinputofreal worldquantities suchastemperature speed position pressure andforce Real worldquantitiescanevenincludegraphicimages Also digitalsystemsoftenmustproduceoutputstocontrolreal worldquantities 4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 9 7 6 5 10 1 2 3 4 15 11 12 13 14 16 17 18 19 20 15 1110 1110 0100 0101 0101 0110 1011 0111 1001 1101 1101 1100 1100 1010 0111 1001 0101 0010 0000 0100 0100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 9 7 6 5 10 1 2 3 4 15 11 12 13 14 16 17 18 19 20 15 5 ApplicationExamples Addressbus Tointerfacebetweenthedigitalandanalogworlds twobasicprocessesarerequired analog to digital A D conversionanddigital to analog D A conversion 6 7 AnElectronicThermostat 1 Amplifier ADC Actualtemperature Desiredtemperature Controlanddisplaylogic 7 8 9 4 5 6 1 2 3 0 On OffHeat Cool Temperaturesensor Digitalcode Analogvoltage ToHVACunit 8 CDPlayer Amplifier Digitalsignalprocessor Digitalcode Pulses Amplifier Amplifier DAC ControlOn Off open close play pause track search Laserpick uphead Rightchannelaudio Liftchannelaudio 9 ADigitalAudiotapePlayer Recorder Amplifier Digitalsignalprocessor Audioin Amplifier Amplifier DAC ControlOn Off open close play pause track search ADC Rightchannelaudio Liftchannelaudio TapedriverMagneticread writeheads Digitalcode 10 13 2DIGITAL TO ANALOG D A CONVERSION D Aconversionisanimportantpartofmanysystems Inthissection wewillexaminethetheoryofoperationoftwobasictypesofdigital to analogconverters DACs andlearnabouttheirperformancecharacteristics 11 TheOperationalAmplifier Invertinginput Noninvertinginput Output Vin Vin1 Vin2 Vout Rf Ri HighinternalinputR Vout a Op ampsymbol c Op ampasacomparator b Op ampasaninvertingamplifierwithgainofRf Ri Rf Vout Vin Ri 12 Binary Weighted InputDigital to AnalogConverter Rf 8R 4R 2R R I1 I0 I2 I3 I0 8R V I3 R V I2 2R V I1 4R V 20 23 22 21 V V V V Vout I 0 If Vout IfRf Figure14 37 ThomasL FloydDigitalFundamentals 8e Copyright 2003byPearsonEducation Inc UpperSaddleRiver NewJersey07458Allrightsreserved Figure14 38OutputoftheDACinFigure14 37 ThomasL FloydDigitalFundamentals 8e Copyright 2003byPearsonEducation Inc UpperSaddleRiver NewJersey07458Allrightsreserved 13 TheR 2RLadderDigital to AnalogConverter Rf 2R R8 R D0 2R Vout D1 D2 D3 R R R6 R4 R2 R1 R3 R5 R7 2R 2R 2R 2R Inputs 14 Rf 2R D3 1 REQ 2R R7 2R I 2R 5V 5V 0 Vout IfRf 2R 2R 5V 5V a EquivalentcircuitforD3 1 D2 0 D1 0 D0 0 Rf 2R D2 1 R5 2R I 2R 5V R7 R8 REQ 2R R 2R Rf 2R R7 2R R R RTH R8 2 5V VTH 2 5V I 0 0V Vout IfRf 2R 2R 2 5V 2 5V b EquivalentcircuitforD3 0 D2 1 D1 0 D0 0 15 16 I 2R Rf 2R R7 2R R R RTH R8 1 25V VTH 1 25V I 0 0V Vout IfRf 2R 2R 1 25V 1 25V c EquivalentcircuitforD3 0 D2 0 D1 1 D0 0 17 I 2R Rf 2R R7 2R R R RTH R8 0 625V VTH 0 625V I 0 0V Vout IfRf 2R 0 625V 2R 0 625V d EquivalentcircuitforD3 0 D2 0 D1 0 D0 1 Resolution TheresolutionofaDACisthereciprocalofthenumberofdiscretestepsintheoutput Thetotalnumberofdiscretestepsequals2n 1 wherenisthenumberofbits 4 bitDAC 1 15 100 6 67 Accuracy AccuracyisacomparisonoftheactualoutputofaDACwiththeexpectedoutput Itisexpressedasapercentageofafull scale ormaximum outputvoltage Forexample ifaconverthasafull scaleoutputof10Vandtheaccuracyis 0 1 thenthemaximumerrorforanyoutputvoltageis 10V 0 001 10mV Ideally theaccuracyshouldbenoworsethan ofaleastsignificantbit Foran8 bitconverter theleastsignificantbitis0 39 offullscale Theaccuracyshouldbeapproximately 0 2 Linearity Alinearerrorisadeviationfromtheidealstraight lineoutputofaDAC Aspecialcaseisanoffseterror whichistheamountofoutputvoltagewhentheinputbitsareallzeros Monotonicity ADACismonotonicifitdoesnottakeanyreversestepswhenitissequencedoveritsentirerangeofinputbits Settlingtime SettlingtimeisnormallydefinedastheittakesaDACtosettlewithin LSBofitsfinalvaluewhenachangeoccursintheinputcode ThesettlingtimeofaDACisthetimeittakesfortheDAC sanalogoutputsettleto99 95 ofitsnewvalueafteradigitalinputhasbeenapplied 18 EXAMPLE13 2Determinetheresolution expressedasapercentage ofthefollowing An8 bitDAC b a12 bitDACSolution a Forthe8 bitconverter x100 x100 0 392 1 1 28 1 255 b Forthe12 bitconverter 1 1 212 1 4095 x100 x100 0 0244 Ifa4 bitDAChasa12Vreferenceapplied calculateeachofthefollowing a stepsizeb percentresolutionc theweightofeachbinarycolumnd theoutputvoltagewhen0010isappliede theoutputvoltagewhen1011isapplied a Stepsize V0 2n 12 16 0 75Vb Res s size V0 0 75 12 6 25 c LSB 12V 16 0 75V1 12V 8 1 5V1 12V 4 3 0VMSB 12V 2 6 0Vd 0010 1 5Ve 1011 8 25V Ifan8 bitDAChasa10Vreferenceapplied calculateeachofthefollowing a stepsizeb percentresolutionc theweightofeachbinarycolumnd theoutputvoltagewhen00000101isappliede theoutputvoltagewhen10110111isapplied a Stepsize V0 2n 10 256 0 039Vb Res s size V0 0 039 10 0 39 c LSB 10V 256 0 039V1 10V 128 0 078V2 10V 64 0 156V3 10V 32 0 3125V4 10V 16 0 625V5 10V 8 1 25V6 10V 4 2 5VMSB 10V 2 5V d 00000101 0 195Ve 10110111 7 137V 13 3ANALOGTODIGITAL A D CONVERSION Flash Simultaneous Analog to DigitalConverter Disadvantages toomanycomparatorsAdvantages fastconversiontime 19 6 7 5 4 3 2 1 0 1 2 4 R R R R R R R R Opampcomparators D0 D1 D2 VREF Samplingpulses Parallelbinaryoutput Priorityencoder Analoginput 20 765432104210to0 9V000000000001to1 9V000000100012to2 9V000001100103to3 9V000011100114to4 9V000111101005to5 9V001111101016to6 9V011111111107VorGreater11111111111VREF 8VR 1k 0 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 10 11 12 t V 100 110 111 110 101 010 000 001 011 101 110 111 EXAMPLE13 3 21 22 RelatedProblem 13 3 010 100 101 110 110 111 110 110 101 100 011 010 000 000 001 001 010 011 100 101 110 110 111 111 23 CLK Stairstep RampAnalog to DigitalConverter CLEAR EN Q6 Q7 Q5 Q4 Q3 Q2 Q1 Q0 D6 D7 D5 D4 D3 D2 D1 D0 D6 D7 D5 D4 D3 D2 D1 D0 Latch CTRDIV256 DAC Controlcircuit Stairstepreferencevoltage Analoginput Comparator C 24 CLK TrackingAnalog to DigitalConverter DOWN EN Q6 Q7 Q5 Q4 Q3 Q2 Q1 Q0 D6 D7 D5 D4 D3 D2 D1 D0 D6 D7 D5 D4 D3 D2 D1 D0 Latch Counter DAC Controlcircuit Analoginput Comparator C UP 4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 9 7 6 5 10 1 2 3 4 15 11 12 13 14 16 17 18 19 20 15 25 26 D6 D7 D5 D4 D3 D2 D1 D0 Counter Latches C Controllogic Rampgenerator Analoginput CLK Comparator Reset EN t V Ramp CLEAR BinaryorBCDoutput Chapter13 Interfacing True False1 Alightbulbandswitchareexamplesofananalogcircuit 2 AD Aconverterchangessomethingliketemperaturevariationsintoadigitalquantity 3 Anoperationalamplifierisusedasacomparator 4 Aneight bitD Aconverterhasaresolutionof0 125 5 TheprimarydisadvantageoftheflashA Dconverteristhelargenumberofcomparatorsrequired 6 WhentheanaloginputtoatrackingA Dconverterisataconstantlevel thedigitaloutputwilloscillate 7 TheRS 232 Cisaserialdatatransfersystem MultipleChoice 11 Whichofthefollowingcharacterizesananalogquantity a Discretelevelsrepresentchangesinaquantity b Itsvaluesfollowalogarithmicresponsecurve c Canbedescribedwithafinitenumberofsteps d Hasacontinuoussetofvaluesoveragivenrange 12 Ana