《EDA信号与变量》PPT课件

信号与变量,区别useIEEE.STD_LOGIC_1164.ALL;entitycount_onesisport(din:instd_logic_vector(7downto0);ones:outintegerrange0to8);endcount_ones;architecturenot_okofcount_onesissignaltemp:integerrange0to8;beginprocess(din)begintemp=0;foriin0to7loopif(din(i)=1)thentemp=temp+1;endif;endloop;ones=temp;endprocess;endarchitecturenot_ok;,libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;entitycount_onesisport(din:instd_logic_vector(7downto0);ones:outintegerrange0to8);endcount_ones;architectureokofcount_onesisbeginprocess(din)variabletemp:integerrange0to8;begintemp:=0;foriin0to7loopif(din(i)=1)thentemp:=temp+1;endif;endloop;ones=temp;endprocess;endarchitectureok;,8,分频器设计,libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;entityfreq_dividerisport(clk,clr:instd_logic;out1,out2:bufferstd_logic);endfreq_divider;architectureBehavioraloffreq_dividerissignalcount1:integerrange0to7;begin,process(clk,clr)variablecount2:integerrange0to7;beginif(clr=1)thencount1=0;count2:=0;out1=0;out2=0;elseif(clkeventandclk=1)thencount1=count1+1;count2:=count2+1;if(count1=?)thenout1=notout1;count1=0;endif;if(count2=?)thenout2=notout2;count2:=0;endif;endif;endif;endprocess;endBehavioral;,10,Cnt1：sigCnt2：var2,2,2,3,4,4,11,触发器设计,libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;entitydffisport(d,clk:instd_logic;q:bufferstd_logic;qbar:outstd_logic);enddff;architecturenot_okofdffisbeginprocess(clk)beginif(clkeventandclk=1)thenq=d;-进程结束后才生效qbar=notq;-进程结束后才生效，q的值此时还没更新！endif;endprocess;endarchitecturenot_ok;,12,qbar延迟了一个周期,13,改进的设计,libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;entitydffisport(d,clk:instd_logic;q:bufferstd_logic;qbar:outstd_logic);enddff;architectureokofdffisbeginprocess(clk)beginif(clkeventandclk=1)thenq=d;endif;endprocess;qbar=notq;endarchitectureok;,14,qbar赋值与进程并发，q变化，qbar立即更新,15,寄存器数量,一个信号的赋值是以另一个信号的跳变为条件时（即发生同步赋值时），编译后产生寄存器。（process、function、procedure中）如果一个变量在还没有进行赋值操作时已被使用，那么综合后就好产生寄存器。一个变量在一个信号跳变时赋值，并且该值最终又被赋给了另外的信号，则综合后会产生寄存器。如果变量的值没有被进程（函数或过程）以外的代码调用，那么不一定产生寄存器。,16,17,18,libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;entitydffisport(d,clk:instd_logic;q:bufferstd_logic;qbar:outstd_logic);enddff;architecturenot_okofdffisbeginprocess(clk)beginif(clkeventandclk=1)thenq=d;-进程结束后才生效qbar=notq;-进程结束后才生效，q的值此时还没更新！endif;endprocess;endarchitecturenot_ok;,19,改进的设计,libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;entitydffisport(d,clk:instd_logic;q:bufferstd_logic;qbar:outstd_logic);enddff;architectureokofdffisbeginprocess(clk)beginif(clkeventandclk=1)thenq=d;endif;endprocess;qbar=notq;endarchitectureok;,20,移位寄存器,entityshiftisport(din,clk:inbit;dout:outbit);endshift;architectureshiftofshiftisbeginprocess(clk)variablea,b,c:bit;beginif(clkeventandclk=1)thendout=c;c:=b;b:=a;a:=din;endif;endprocess;endarchitectureshift;,entityshiftisport(din,clk:inbit;dout:outbit);endshift;architectureshiftofshiftisbeginprocess(clk)variablea,b,c:bit;beginif(clkeventandclk=1)thena:=din;b:=a;c:=b;dout=c;endif;endprocess;endarchitectureshift;,entityshiftisport(din,clk:inbit;dout:outbit);ends