book3com_scd23

1、IBIS & SI 3ComRoy Leventhal3Com Carrier R&D 847-797-2152INTERNATIONAL CADENCE USER GROUP CONFERENCESeptember 10-13, 2000 San Jose, CaliforniaIBIS & SI 3ComWhat are the challenges? IBIS model sources and coverage Model quality, accuracy & verification Model storage, retrieval & use Mo

2、del parameter tradeoffs Design for SI Training for SI SI process & documentation Problem solving & improvising Room for improvement2IBIS & SI 3ComIBIS model sources The web - start at:/eig/ibis.htm Cadence libraries The supplier The SI reflector 3rd party customYou, Dude!3IBIS & SI

3、3ComThe web: google search Searches Search Engines: On 6/12/00: 14,508 hits in1.31 seconds for “ibis models” - “spice models” 52,837 hits Same date: 114,989 hits in.05 seconds for “signal integrity”Eighteen months ago this was a few hundred hits4IBIS & SI 3ComSuppliers Contact th

4、e supplier directly if the model youre looking for is not on their web page. A supplier can often produce a model not yet posted to the web.5IBIS & SI 3ComCadence libraries CDSDefault (note:not much 5v logic anymore) Cadenceoptionallibrary is the cost-effective way to go for glue-logic, etc.6IBIS &

5、SI 3ComEmail reflectorsSI-Listsi-listsilab,Cadence PCB user groupicu-pcb- IBISIOther Cadence user groups + subscribe/unsubscribe/ USERGROUPS/Cadence7IBIS & SI 3ComSI-List Signal Integrity Mailing List:This mailing list is for the discussi

6、on of signal integrity issues. To subscribe to si-list, send an email message with your name and email address to: To post email messages to the list, send them to An archive of si-list messages is at: /wb6tpu/si-list/index.html And

7、, visit the web at: /si-list.html8IBIS & SI 3Com3rd party modeling services Outsourcing 3Coms IBIS model needs? Checked 3 EDA houses: First provides only a time & materials consulting engagement Second gives the models free provided I buy their tools Third wanted $1200 a pop

8、for glue logic and/or custom parts Other 3rd party has to overcome my mistrust & their disadvantage of not seeing the full process spread I need cost-effective models as deliverables to run in the tool I own9IBIS & SI 3ComYou, Dude!IMPROVISE!| *|IBIS Ver 3.1File Name rgl_1638.ibs File Rev 2.0Source

9、Borrowedand modified by RGL from a similarpart HDMP_1636 also supplied by Agilent with the warning that the IO cells are somewhat differentDate 6_12_00| *| (C) COPYRIGHT 2000| 3Com Corporation| * Component RGL_HDMP_1638Manufacturer HP| Package| variabletypminmaxR_pkg .06ohms NA NA L_pkg 6.0nH NA NA

10、C_pkg .5pF NA NA|Pin signal_name model_name R_pin L_pin C_pin|12345678GND_TXHS TX0TX1 TX2 TX3 TX4 TX5 TX6GND .065 5.38n .3p Z530678_IN22 .063 5.25n .29p Z530678_IN22 .062 5.13n .28p Z530678_IN22 .06 5.04n .27p Z530678_IN22 .059 4.95n .26p Z530678_IN22 .059 4.9n .25p Z530678_IN22 .058 4.87n .25p Z530

11、678_IN22 .058 4.85n .24p Z530678_IN22 .058 4.85n .24p Z530678_IN22 .058 4.87n .25p Z530678_IN22 .059 4.9n .25p NCZ530678_IN22 .06 5.04n .27p9TX710 TX811 TX912 NC13 RXSEL Key ingredients: Pin List, I/O cell V-I curves, dV/dt, threshold voltages, etc. Embellishments: V-T curves, etc. Check run through

12、 parsers: IBIS: ibischk3 Cadence: ibis2signoise I/O cell source: Simulate from SPICE -not likely & whats the point? Borrow something similar10IBIS & SI 3ComCoverage % coverage coverage effectiveness You have to improvise: Model accuracy needed is a function of design robustness and the project miles

13、tone. Simulate early & often You have to prioritize:Critical nets only? You have to focus:Reflections Vs xtalk Vs? Its never too early to seek IBIS models!List of IBIS Models Needed, XYZ.brd, 6/22/00total part count on board: 3583Device TypeModel Name, etc.CompPackage Name RefDesC10031175MMC Network

14、s XPIF_300BB3C File avail. But, many errors.ICBGA388_0500_PE2_01A U2500 U2700 U3100 U3300 U3500 U3700 U3900 U4100 U4300 U4500 U4700 U4900 U5100 U5300 U5500C10030962MMC Networks NP5410BA1C File avail. But, many errors.ICBGA452_0500_PE1_02A U1500 U180010030963MMC Networks ED5412BA1C File avail. But, m

15、any errors.ICBGA553_0500_PE1_01A U2100 U2200C10031488C10031754Micron MT58L64L36PT_7.5?SRAM 64KX36Our own component database info VERY poorICICRQFP100_0256_02A U2600 U2601 U2800 U2801 U3000 U3001 U3200 U3201 U3400 U3401 U3600 U3601 U3800 U3801 U4000 U4001 U4200 U4201 U4400 U4401 U4600 U4601 U4800 U48

16、01 U5000 U5001 U5200 U5201 U5400 U5401 U5600 U5601 RQFP100_0256_02A U9300 U9301 U9500 U9501C10031234IDT IDTQS3VH257QReceived 6/26/00 (email) from IDTICSSOIC16_0250_01A U8021004128200IDT IDTQSVH126S7XICSOIC14_0500_01A U900 U9011004136000Atmel AT24C02N_10SI_2.7Not critical, default will probably be fi

17、neICSOIC8_0500_01A U803C10031793On Semiconductor MC10EPT20 DR2 Critical, but getting from On close to hopelessICSOIC8_0500_01A U5800C10038039BroadCom BCM5208KFP File avail. But, many errors.ICSQFP208_0196_02A U9800C10002001Agilent HDMP_1638 CriticalKluged together model on previous board by adding p

18、in list to IBIS model cells from Agilent of a similar part from this processICSQFP64_0196_05AU5701 U5901 U6101 U6301 U6501 U6701 U6901 U7101 U7301 U7501 U7701 U7901 U8101 U8301 U8601 U8901C10031414Phillips PCF8570TD-T Hello, is anybody out there?ICSOIC8_0500_07A U804C10031797Phillips PCF8575 TS Hell

19、o, is anybody out there?ICSSOP24_0256_01A U800 U80111IBIS & SI 3ComIBIS Consumer Report Results on Millennium: Process:Started with 250 files 25 duplicates49 failed - fixed on my own47 additional failed - returned to source for correction as of: 4/27/00Quality = 57%15 fixed at source and returned as

20、 of: 6/27/00“Reliability” = 84%In addition, requested 95 important to critical models in past 3 months: 29 have been deliveredGather models from sources Convert (parse) to Cadence Correct mistakes / return to source IterateEyeball reality check in Cadence GUI: pin list, curves, max clamp I, etc.Iter

21、ateAssociate with 3Com part # Ship to librarian for archiving Link to Cadence GUI & retrieve Assign to devicesSave assignments and use as map.dat (iterate simulations as board moves through design process) What are your customers expectations? What are your dreams of success? How do these results st

22、ack up?12IBIS & SI 3ComAccuracy & verification Verification is made easier if the model doesnt have to be precise to be accurate Outright mistakes are caught with“Reality Checks”3Com IBIS Models Acceptance CriteriaA. GeneralB. IBIS model verification & approval levels1. Definitions2. Level 4: Syntax

23、 correct & reality checks3. Level 3: Verify model to data sheet4. Level 2: Correlate IBIS with SPICE5. Level 1: Verify model by direct measurementC. Common mistakes & their correctionD. Outline for IBIS model ISO9000 training13IBIS & SI 3ComRetrieval & useTesting the linkage to 3Com Part # for auto

24、loading of IBIS modelsLinkage to Optional Digital Library works. But, there is a bug with map.datAuto setup works wellExtensive use of map.dat as a board gets routed- rerouted and simulated- resimulatedMessages about pin use reassignment can catch model mistakesMulti-supplier models combined under 3

25、Com part number14IBIS & SI 3ComReady - set - go! Use audits (e.g., BOM, component, model assignment, net, SQ, etc.) to check progress & target additional prep. Use information inquiry button.15IBIS & SI 3ComScreens: pass / fail / problem solve Whole board scans at a summary report level are done; fo

26、llowed by detailed simulations on possible problem nets; followed by individual net problem solving with waveforms, topology and model manipulation Typical recent board:1449 Components2138 Nets27 Layers (including dielectrics)16IBIS & SI 3ComModeling tradeoffs & manipulations Here is an example of s

27、imulating with a too simple model of GTLP sent initially by the supplier. Only the slew rate information (dv/dt_r & dv/dt_f) was in the file. The clock was only 8 MHz. But, the topology was complex: 18-slot backplane with 1” pitch and 1” stubs, backplane bus nominal Zo = 63W, terminated at each end

28、with a 31W pullup resistor. Open-drain GTLP I/Os. Loaded backplane Zo was approximately 25 W17IBIS & SI 3ComModel detail added Then, the supplier added the V-T curve to the IBIS fileThis is what the rise waveform V-T curve looks like.Note: soft turn-on (and turn-off)What does this do to the frequenc

29、y content of the driver?18IBIS & SI 3ComBetter modeling = better results This is what the simulation results look like with the more sophisticated and accurate IBIS model Use a blend of technology-topology- termination choices to succeed What about proposing the device specs to the supplier? - “spec

30、s that swim upstream.” Start your task at the system / logic design stage Whats important?timing margin and noise margin not esthetics19IBIS & SI 3ComDesigning for SISignal Integrity - 101 Robust design Design space exploration Specs that swim upstream Design challenge increases as complexity & spee

31、d increaseStatistical Design Used to model all possible combinations of conditions the design must operate under Manufacturing variances Component speed Trace Impedance Terminator Value Design Variances Segment lengths17520IBIS & SI 3ComS(ensitivity &) I(nterest) training A series of 22 lab-lecture

32、sessions related to design phase was prepared The first half was delivered prior to the start of our Millenniumproject21IBIS & SI 3ComIn development - SI ISO 9000 processTiming Analysis Required?Functional Spec yesTiming AnalysisNothing works unless the people involved care, have the capability, own

33、ership & time to accomplish SI objectives.NoEndTimingConstraintsFigure 1: Signal Integrity Simulation Process Flow ChartSimulation Models Created & Verified to Level 4Pre-Board Layout: Netlist & BOM From HDWRatsnest, Manhattan No, Modify Design &RerunDistance & Target ZoSpecifications Met?Yes,Incorp

34、orate TechnologyFile Get models quick! Simulate early & often - late changes get missed Drive constraints into CAD Verify-only is the goal at /after routeNo, Modify Design & RerunYes, Create TopologyTemplate, Design Constraints & Forward toPCB DesignerSpecifications Met? No, MDes ReYes, Capture any

35、SimulationOutput to Test, Manufacturing, Etc.Specifications Met? Model Refinements in CADLibrary Post Route Board Simulations: Database From CAD Departmentodify ign & runPlacement SimulationsTechnology & Topology Explore SimulationsRequest: Simulation Models & Net Simulations22IBIS & SI 3ComDocument

36、ation Making A Model Controlled by: ISO 9000 Located at Documentum:/Iso/Main.html ISO Documentation Consists of: “Simulation Model Request Form” “New Component Request Form” “Carrier Systems IBIS Model Standard” “IBIS Model Syntax Guide” “Simulation Model Creation &Updating Process” “Simulation Model Verification Process” Using A Model “How to Use the IBIS Model” “Signal Integrity - 101” “Signal Integrity - Board Design & Simulation Techniques” “Logic Family Signal Integrity Comparisons” “Modelin