FPGA培训资料矩阵键盘驱动数码管

1、矩阵键盘驱动数码管1. 矩阵键盘的结构和驱动原理2. 扫描法获得矩阵键盘扫描码的原理和方法3. 扫描码驱动数码管矩阵键盘的结构和驱动原理Row0Row1Row2Row3Col3Col2Col1Col0扫描法获得矩阵键盘扫描码的原理和方法无按键按下时，col0col3输出分别为“1111”当输入扫描时，扫描第一行，即IN1<=0，当按下Button 1，那么输出col输出信号将发生变化，Out1变为0，则col0col3输出分别为“1110”，取反，则为“0001”，代表BT1被按下。因此，可通过行扫描码和列输出码来获得分时扫描的键盘按压信号。只要扫描时间适当，就可得到按键的按压情况。因有

2、四行，因此，扫描后存储的扫描码为16位，扫描行列输出也分4位4位地存放。library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;-实体entity key_seg_test is Port ( clk : in std_logic; -系统时钟,40MHz - key_row : out std_logic_vector(3 downto 0); -FPGA输出到键盘的行扫描信号 key_col : in std_logic_vector(3 do

3、wnto 0); -键盘输入到FPGA的列响应信号 - seg_d : out std_logic_vector(7 downto 0); -7段数码管数据线 seg_sel : out std_logic_vector(3 downto 0) -7段数码管位数选择,'1'表示对应位数的数码管有效 );end key_seg_test;-构造体architecture topdesign_arch of key_seg_test issignal key_row_reg : std_logic_vector(3 downto 0);signal key_code : std_l

4、ogic_vector(15 downto 0);signal count_clk : std_logic_vector(22 downto 0);-主程序begin-process(clk) -时钟计数分频begin if(clk'event and clk='1')then count_clk<=count_clk+1; end if;end process;-process(clk)begin if(clk'event and clk='1')then -逐行扫描 case count_clk(19 downto 16) is -数码

5、管动态扫描,扫描频率为(40*106)/(220)=38.15Hz(扫描周期为0.026s) when "0000"=> key_row_reg<="1110" -第一行 when "0001"=> key_code(3 downto 0) <= not key_col; when "0010"=> key_row_reg<="1101" -第二行 when "0011"=> key_code(7 downto 4) <= no

6、t key_col; when "0100"=> key_row_reg<="1011" -第三行 when "0101"=> key_code(11 downto 8) <= not key_col; when "0110"=> key_row_reg<="0111" -第四行 when "0111"=> key_code(15 downto 12)<= not key_col; when others => end c

7、ase; end if;end process;-key_row<=key_row_reg;-process(key_code)begincase key_code iswhen "00001"=>seg_d<="00111111" -0when "00010"=>seg_d<="00000110" -1 when "00100"=>seg_d<="01011011" -2when "01000"=>seg_

8、d<="01001111" -3when "10000"=>seg_d<="01100110" -4when "00000"=>seg_d<="01101101" -5when "00000"=>seg_d<="01111101" -6when "00000"=>seg_d<="00000111" -7when "00000"=>seg_

9、d<="01111111" -8when "00000"=>seg_d<="01101111" -9when "00000"=>seg_d<="01110111" -Awhen "00000"=>seg_d<="01111100" -Bwhen "00000"=>seg_d<="00111001" -Cwhen "00000"=>seg_d<="01011110" -Dwhen "00000"=>seg_d<="01111001" -Ewhen "10000"=>seg_d<="01110001" -Fwhen others => seg_d<="00000000"end ca