ESDProtectionDesignSeminar（英文版）(共25页).ppt

1、2022/2/16 1ESD Protection Design Seminar Jim SutherlandSenior Applications Engineer2022/2/16 2Outline4 What is ESD?4 What damage can it cause?4 Why is the problem growing?4 What are the issues for the designer?4 How can we measure it?4 How can we protect equipment from ESD?2022/2/16 3What Is ESD?4ES

2、D = Electro Static Discharge4Generation- Triboelectric (friction causes accumulation of charge)- Induction (field induces charge)4Discharge- Dielectric (air) breakdown Electric field increases when charged bodies approach each other - Current flow into circuitry 2022/2/16 4ESD Damage of ICs4Permanen

3、t- Oxide breakdown, shorts, opens, latch-up4Temporary- Latch-up, ground bounce4Latent- Degradation from an ESD event2022/2/16 5 ESD problem is growing4Circuits/Systems- Old - Robust ICs & Low speed signals- New - Sensitive ICs & High speed signals4Environment- Old - Manufacturing / Corporate

4、 - New - Home / Outdoors / Person2022/2/16 6ESD Issues for the Designer 4Must meet ESD specifications4Select ESD tolerant components4Minimize signal degradation (from R,L & C)4Board space / weight / proper design4Component cost4Assembly cost4Lifetime cost (stability)4Test the system2022/2/16 7In

5、ternational ESD Standards4Human Body Model (HBM) - for devices- EIA/JESD22-A114-A- ANSI/EOS/ESD-S5.1-1993- MIL-STD-883 (method 3015)4IEC 1000-4-2:1995 - for systems4Machine Model (MM) - less common- EIA/JESD22-A115-A- ANSI/EOS/ESD-S5.1-19934Charge Device Model (CDM) - less common- JESD22-c1012022/2/

6、16 8Human Body Model (HBM)4 Discharge from 100pF capacitor through 1.5 kOhm resistor4 6 ESD pulses- 3 positive, 3 negative- 1 sec separation4 Pin-to-pin testing- N(N-1)/2 combinations4 Used for component characterization4 Widely usedDual Polarity ESDPulse Generator(100 pF capacitordischarging throug

7、h1.5 Kohm resistor)ComponentUnder TestTerminal ATerminal BHuman Body Model (HBM)Test configuration2022/2/16 9HBM Current WaveformCurrent Waveform Through a Short - HBM-1.02.03.04.05.06.07.08.00100200300400500Time (nS)Rise Time: 2 nS Tr 10 nS2022/2/16 10IEC 1000-4-2:1995 Standard4 Discharge from 150

8、pF capacitor through 330 ohm resistor4 6 ESD pulses4 3 positive, 3 negative4 Used for system characterization4 “Contact v. “Air discharge4 Different levels4 Different applicationsDual Polarity ESDPulse Generator(150 pF capacitordischarging through330 ohm resistor)SystemUnder TestTerminal ATerminal B

9、IEC 1000-4-2:1995“Contact Discharge”Test Configuration2022/2/16 11IEC 1000-4-2 Current WaveformVery fast rise time: Tr 1nS60ns2022/2/16 12IEC 1000-4-2 Test Levels4 Contact discharge is the preferred test method - air discharges are not repeatable4 Air discharges used where contact discharge cannot b

10、e applied4 No implied equivalence in test severity between the two test methodsContact DischargeAir DischargeLevelTest Voltage (KV)LevelTest Voltage (KV)12122424363848415x *Specialx *Special - x is an open level. The level has to be specified in the dedicated equipment specification. If higher volta

11、ges than those shown are specified, special test equipment may be needed.2022/2/16 13IEC 1000-4-2 Bench Test Specification2022/2/16 14ESD Protection Techniques4Clamp diodes in IC - Not sufficient protection 4Shielding - Low effectiveness4Bypass capacitor or series resistor/inductor- Can degrade sign

12、al; many components; large board area 4Spark gap- Low cost; low stability; large board area4Discrete Zener diodes- High capacitance, many components; large board area4Discrete PN diodes- Low capacitance; many components; large board area 4Integrated PN diodes2022/2/16 15Integrated Diode Networks4Sup

13、erior downstream ESD protection- High speed response- ESD current steered to GND or VCC4Minimum Signal Degradation (Low C)4Minimal board space, weight4Low assembly/manufacturing costs4Minimal Design-In Time4Long-term reliability2022/2/16 16Choosing an ESD Diode Network4 How many lines are needed? 4

14、How much capacitance? (e.g. 5 pF)4 What is the HBM rating? (e.g. 15 kV)4 What is the downstream clamp voltage? (e.g. 13 V 15 kV HBM pulse)4 What is the contact discharge rating? (e.g. 8 kV)4 What is the air discharge rating? (e.g. 15 kV)4 What package? (e.g. 24-pin QSOP)2022/2/16 17ESD Diode Network

15、 PlacementThe Need to Keep ESD DiodesDownstream of Line InductancesAlso put protection diodes at most likely ESD entry point - the connectorPreferred LayoutESD EntryPointParasitic LVccGndProtectedDevicePoor layout - increased clamp voltagedue to parasitic inductanceParasitic LVccGndProtectedDeviceES

16、D EntryPoint2022/2/16 18Designing for Minimal PowerRail InductanceVFESD applied hereVESD current (IESD)VccGndVPVNI/OProtectedDevice2022/2/16 19Add Bypass Capacitor- Place Ceramic bypass capacitor (0.1 0.2 uF) as close as possible to ESD diode network power rail to shunt ESD current to both power rai

17、ls- Maybe add Zener in parallel with capacitor to minimize parasitic inductance of bypass capacitorProtectedDeviceGndVccC2022/2/16 20Using a Series Resistor toMinimize Downstream Current4 Can be considered for latch-up sensitive applications4 Guaranteed clamping voltage limits current downstream (I

18、= V / R)4 Only for inputs with high Z4 Only for output drivers with low Z- watch out for filtering of signalESDEntryPointRsProtectedDeviceGndResistor Rs furtherlimits ESD currentinto Protected DeviceVcc2022/2/16 21Power-down IssuesVccGndBypassCapacitor0.1 0.2 uFBlocking DiodeI/O4 Diode protected sys

19、tems that are powered down can drain current from an active high input through the diode to VCC 4 This can drain batteries and/or damage devices on the same line4 To avoid this, isolate VCC from the bypass capacitor with a blocking diode4 One diode solution2022/2/16 22Component and System Specificat

20、ions4There is no simple formula to translate system specifications into component specifications- IEC 1000-4-2 Specification is more severe than HBM- Line capacitance and inductance shape the ESD pulse, reducing its peak value- Poor device placement can degrade performance- If there are multiple devices on a line, decide which to protect- The relationship between downstream clamp voltage and downstream protection is not exact2022/2/16 23Validating the Design4Define the practical limits of functional failure (e.g. Data integrity, re