组合逻辑电路分析和设计教材

1、组合逻辑电路组合逻辑电路时序逻辑电路时序逻辑电路components：Logic Gatescomponents：Logic Gates+Flip Flops, Latches Chapter 7,8,9,10 Chapter 5,6 the output is only depended on the current inputsThe output is not only depended on the current inputs but also depended on the past state Combinational Logic Analysis and DesignTrut

2、h tableINPUTSINPUTSA B C D A B C D AB CDAB CDOUTPUTOUTPUTX X0 0 0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 10 00 00 00 10 00 00 00 1 0 00 00 00 11 01 01 01 10001000100011111XX=AB+CDTruth tableBoolean expressionTruth tableBAABBAX=F(A,B,C

3、)?The sensor produce a HIGH when the level of chemical in the tank drops below a specified pointBCABACA,B,C are level sensors. a HIGH is produced when the level of chemical in the tank drops below a specified point.Analysis the function of the circuitX=AB+BC+ACBCABACX=AB+BC+ACTruth tableThe low-leve

4、l indicator will give an indication when more than two tanks level drop below the specified point!Analysis the function of the circuitAnalysis the function of the circuit (review)1. From an application to a Truth Table2. From a Truth Table to a simplified logic expression3. From the simplified logic

5、 expression to a logic circuit三人表决电路三人表决电路每人一个按键，如果同意则按下，不同意则不按。每人一个按键，如果同意则按下，不同意则不按。结果用指示灯表示，多数同意时指示灯亮，否则不亮。结果用指示灯表示，多数同意时指示灯亮，否则不亮。1. From logic function to Truth TableA B C F 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 Truth TableInputs: A、B、CAgree “1”， otherwise“0”Output: FL

6、ight on “1”， otherwise“0”A B C F 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 Truth Table2. From Truth Table to simplified logic expressionABC00011110010 0 1 0 0 1 1 1 ABACBCCABCABF ABBCCAF3. From Logic Expression to Logic CircuitCABCABF And-Or Logic3. From Logic Expression to Log

7、ic CircuitCABCABF chap5-1a.ewb ( 0 0 0 0 0 0 1 10 1 0 10 1 1 01 0 0 11 0 1 01 1 0 01 1 1 1ABCCBACBACBAY Solution：ABCCBACBACBAY Chap5奇偶校验电路.ewbstep1. From an application to a Truth Tablestep2. From a Truth Table to a simplified logic expressionstep3. From the simplified logic expression to a logic ci

8、rcuitCombination Logic Implementation (Review)Textbook: Page 168 ch5-2 ?AAHIGH ?ABABABABA BABA BA BABABABABABBABACDABCDABDeMorganswhen drawing a NAND logic diagram, always use the gate symbols in such a way that every connection between a gate output and a gate input is either bubble-to-bubble or no

9、nbubble-to-nonbubble.every connection between a gate output and a gate input is either bubble-to-bubble or nonbubble-to-nonbubbleEXAMPLE : Implement each expression with NAND logic using appropriate dual symbolsDEABC (a)EXAMPLE : Implement each expression with NAND logic using appropriate dual symbo

10、lsEDABC(b)A+B=AB A NOR gate function as either a NOR or a negative-AND.Page 178-180CABCABF 三人表决电路三人表决电路: : Use NAND gates CABCAB ABCAnd-Or Logic GatesABCNAND Logic GatesABCCBACBACBAY ABCCBACBACBAY BCACBACBACBAEX 5-12： Determine the final output waveform X for the circuit, with input waveforms A,B an

11、d C as shown.EX 5-11： Draw the timing diagramFind out the logic circuit that will generate the output waveform for the inputs.Page193: Problem30Homework : Page193 Problem317-segment displayspage149共阳极接法共阳极接法共阴极接法共阴极接法gfedcba例：例： 共阴极接法共阴极接法a b c d e f g 0 1 1 0 0 0 01 1 0 1 1 0 1低低电电平平时时发发光光高高电电平平时时发

12、发光光共阳极接法共阳极接法abcgdefdgfecbag共阴极接法共阴极接法abcdefg二十进二十进制编码制编码?显示显示器件器件 D C B Aa b c d e f g 0 0 0 0 1 1 1 1 1 1 0 00 0 0 1 0 1 1 0 0 0 0 10 0 1 0 1 1 0 1 1 0 1 20 0 1 1 1 1 1 1 0 0 1 30 1 0 0 0 1 1 0 0 1 1 40 1 0 1 1 0 1 1 0 1 1 50 1 1 0 1 0 1 1 1 1 1 60 1 1 1 1 1 1 0 0 0 0 71 0 0 0 1 1 1 1 1 1 1 81 0 0 1 1 1 1 1 0 1 1 9gfedcbaOther inputs: Dont care D C B Aa b c d e f g 0 0 0 0 1 1 1 1 1 1 0 00 0 0 1 0 1 1 0 0 0 0 10 0 1 0 1 1