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1、湖南工业大学计算机与通讯学院前沿讲座Lecture 1 集成电路封装技术-多芯片封装陈卫兵Spring 2021.前沿讲座Slide 2Outline芯片封装开展史芯片封装LED封装.芯片封装开展史The transistor invented at Bell lab. in 1947前沿讲座Slide 3.芯片封装开展史September 12th 1958, Jack Kilby at Texas instrument had built a simple oscillator IC with five integrated components (resistors, capacitor

2、s, distributed capacitors and transistors)前沿讲座Slide 4.芯片封装开展史1959 - Planar technology invented 前沿讲座Slide 5.芯片封装开展史1960 - Epitaxial deposition developed Bell Labs developed the technique of Epitaxial Deposition1960 - First MOSFET fabricated Kahng at Bell Labs fabricates the first MOSFET. 1961 - First

3、 commercial ICs Fairchild and Texas Instruments both introduce commercial ICs.1962 - Transistor-Transistor Logic invented 1962 - Semiconductor industry surpasses $1-billion in sales 1963 - First MOS IC,CMOS process inventedRCA produces the first PMOS IC.前沿讲座Slide 6.芯片封装开展史前沿讲座Slide 7.前沿讲座Slide 8.芯片封

4、装开展史国内封装厂:江苏长电、天水华天、日月光、矽品、华泰等合资封装厂:日立、三星、南通富士通等国外封装厂:Intel、AMD等前沿讲座Slide 9针脚式SMT新一代.前沿讲座Slide 10芯片封装芯片封装从芯片电学衔接电源和信号到板上要求有小的信号延迟和失真机械衔接芯片到板上将芯片产生的热量耗散出去维护芯片不被机械、应力毁坏芯片和板的热膨胀系数兼容,防止芯片被热应力损坏制造和测试费用廉价.前沿讲座Slide 11芯片封装邦定Traditionally, chip is surrounded by pad frameMetal pads on 100 200 mm pitchGold bo

5、nd wires attach pads to packageLead frame distributes signals in packageMetal heat spreader helps with cooling.芯片封装邦定Two methods前沿讲座Slide 12.前沿讲座Slide 13芯片封装构造方式过孔和外表贴装方式.前沿讲座Slide 14芯片封装高级方式Bond wires contribute parasitic inductanceFancy packages have many signal, power layersLike tiny printed circ

6、uit boardsFlip-chip places connections across surface of die rather than around peripheryTop level metal pads covered with solder ballsChip flips upside downCarefully aligned to package (done blind!)Heated to melt ballsAlso called C4 (Controlled Collapse Chip Connection).CSP方式前沿讲座Slide 15Wrist Camer

7、a (Fujitsu)G-SHOCK Watch (IEP)75% down-size mounting area27mm30mmWire-bondingWLCSPshrink.芯片封装 Flip-chip 前沿讲座Slide 16.前沿讲座Slide 17芯片封装多芯片方式Pentium Pro MCMFast connection of CPU to cacheExpensive, requires known good dice.芯片封装封装方式与费用IC Package v.s Cost compare前沿讲座Slide 18.前沿讲座Slide 19芯片封装寄生参数Use many

8、VDD, GND in parallelInductance, IDD.前沿讲座Slide 20芯片封装热耗散60 W light bulb has surface area of 120 cm2Itanium 2 die dissipates 130 W over 4 cm2Chips have enormous power densitiesCooling is a serious challengePackage spreads heat to larger surface areaHeat sinks may increase surface area furtherFans incr

9、ease airflow rate over surface areaLiquid cooling used in extreme cases ($).前沿讲座Slide 21芯片封装ESD维护Static electricity builds up on your bodyShock delivered to a chip can fry thin gatesMust dissipate this energy in protection circuits before it reaches the gatesESD protection circuitsCurrent limiting resistorDiode clampsESD testingHuman body modelViews human as charged capacitor.新一代封装技术柔性衔接前沿讲座Slide 22.新一代封装技术3D衔接Packaging Technology with 2 or More DIE Stacked in a Single Package or Multiple Packages Stacked Together前沿讲座Slide 23.新一代封装技术混合封装厚膜技术前沿讲座Slide 24.LED封装芯片构造前沿讲座Slide

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