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ZhangQianBriefIntroductionofIntegratedCircuitContentsWhatisIC?ComponentsinIC.DesignFlow.Manufacturing.Somenewtechnologies.Sometermsgoodtoknow.WhatisIC?WhatisIC?4IC—IntegratedCircuits:Asetofelectroniccircuitsononesmallplate("chip")ofsemiconductormaterial,normallysilicon.Largescale,1970,10Ktransistors→Verylarge,1980s,hundredsKofTransistors→Ultra-large,over1Billionin2023)→Wafer-scaleChips,SOC(SystemsonChip),3D-ICs.BriefIntroductionofICindustry.Currently,therearethreekindsofcompanyinICindustry:
IDM,
FoundryandDesignHouse.IDM(IntegratedDeviceManufacturer)—FromICdesigntomanufacturing,hasitsownproductionline.MainIDMcompanies:Intel、STM、TI、Infineon,etc.,.Foundry—MainlyfocusonICcontract-manufacturingbusinessbasedonothercompanies’designandrequirements.MainFoundrycompanies:TSMC(台积电)、GlobalFoundries(格罗方德),SMIC(中芯国际)etc.,.Fabless—Doesn’thaveproductionline,mainlyfocusondesign.MainFablesscompanies:ARM,MTK,etc.,.Top20ICcompanies(2023)2023RANKING2023RANKINGCOMPANY2023INCOME2023INCOMEGROWTHINCOMEPercentage11Intel$47,420$46,960-1.0%14.8%22SAMSUNG$31,264$33,4567.0%10.5%33QUALCOMM$13,177$17,34131.6%5.5%104MicronTechnology$6,772$14,168109.2%4.5%75SKHYNICS$8,970$13,33548.7%4.2%56TOSHIBA$11,131$12,45911.9%3.9%47TI$12,035$11,379-5.5%3.6%98BROADCOMM$7,843$8,1213.5%2.6%89STM$8,493$8,076-4.9%2.5%610RENESAS$9,236$7,822-15.3%2.5%1311INFINEON$4,821$5,0965.7%1.6%1212AMD$5,297$5,076-4.2%1.6%1413NXP$4,114$4,65813.2%1.5%1814MTK$3,357$4,43132.1%1.4%1115SONY$6,109$4,394-28.1%1.4%1616FREESCALE$3,740$3,9585.8%1.2%1517NVIDIA$3,826$3,612-5.6%1.1%1918MARWELL$3,168$3,2813.6%1.0%2219ONSEMI$2,869$2,740-4.5%0.9%2320ADI$2,671$2,6770.2%0.8%Top20Sum$196,313$213,0438.5%67.0%OtherSum$106,612$104,833-1.7%33.0%TotalSum$302,925$317,6764.9%100.0%Athinsliceofsemiconductormaterial,usedinthefabricationofintegratedcircuitsandothermicrodevices.
Wafer(晶圆)7SiliconunitcellWaferMonocrystallinesilicon(单晶硅)
TrendofIC:Moore’slaw(摩尔定律)8Moore’sLaw:Istheobservationthat,overthehistoryofcomputinghardware,thenumberoftransistorsonintegratedcircuitsdoublesapproximatelyeverytwoyears.
GordonMooreNamedafterIntelco-founderGordonE.Moorewhodescribedthetrendin1965.TrendofIC:FeatureSize(特征尺寸)9Keepshrinkingfeaturesize90nm,65nm,45nm→45nm,28nm,22nm(Intellatesti3,i5,i7family)→14nm(nextgeneration)TrendofIC:FeatureSize(特征尺寸)10Fasterprocessingspeed.HigherdensityoftransistorsinoneIC.TrendofIC:WaferDiameter(晶圆直径)11Keepexpandingwaferdiameter(晶圆直径)6inch→8inch→12inch(mostpopular)→18inch(onlyinusedinbigfoundrycompanies)→22inch?(Nextgeneration)Lowercostofsinglechip.TrendofIC:WaferDiameter(晶圆直径)122-inchwafer12-inchwafer18-inchwaferTrendofIC:Cost13KeepincreasingcostofICindustryFabCost:*DatacomesfromGlobalFoundries→$2.5B@65nm→$4.0B@45nm→$4.85B@32nm→$6.7B@22nm$1.8B@90nmFabCostProcessDevelopcostChipDesignCost145020232500400048506700250310400600900130015243460100150130nm90nm65nm45nm32nm22nm$mnTrendofIC:Cost14KeepdecreasingcostpertransistoronICCostpertransistorisdecreasing30-40%everyyearonthebenefitofsmallerFeaturesizeandbiggerwafer.ComponentsinICPrinciplesofMOSFET16MOSFETisthebasicandmostimportantunitinICdesign.
Unliketriode,MOSFETisavoltagecontrolcomponent.ItsDrain-SourcecurrentiscontrolledbyvoltageappliedonitsGate.PrinciplesofMOSFET17HowcanaMOS
FETworkslikeaswitch?AndwhyitisaVoltagecontroltransistor?
a).Applyavoltage(Vg)ongate.B).DepletionlayerstarttoformC).Inversionlayerstarttoform.D).Electronschannelforms.n+n++0.1V+-VGP-substrateNegativeIonsElectronsIVthComplementarymetal–oxide–semiconductor(CMOS)18MOSFETisthebasicunitinIC.ANMOSorPMOSdependsonwhatsubstrateitused.AnICdesignusedcomplementarypairofN-typeandP-typeMOSFETiscalledCMOStechnology.
Poly-Silicon(多晶硅)resistor.DepositapolySilayeronsubstrate,coverthepolywithanoxidelayer.It’susedtoisolatemetalcontact.ThenetchingmetalcontactandconnectsbothendsofpolySi.ResistorsinIC19Poly-SiliconresistorThinfilmresistorThinFilm(薄膜电阻)resistor.Ahigh-qualityresistorfabricatedfromathinnickel-chromium(镍铬)alloyorasilicon-chromiummixture.CapacitorsinIC20Poly-Diffusion(多晶硅-扩散区)capacitor.TheupperelectrodeisthePolylayer,andbottomelectrodeissubstrate.Capacitorworksindiffusionarea,thedi-electricalmaterialofcapacitoristheoxidelayer.
PolytoPoly(多晶硅-多晶硅)capacitor.Bothelectrodesarepolysanddi-electricalmaterialofcapacitoristheoxidelayerbetweentwopoly.MetaltoMetal(金属-金属)capacitor.SameasPolytoploycapacitor.Butusehighesttwometallayersascapacitor’selectrodes.PolytodiffusioncapacitorPolytoPolycapacitorHorizontalMetalCapacitor.Manymetalplateindifferentmetallayerstacktogether.PectinateMetalCapacitor(梳状金属电容)TwoCombtypemetalinterpolateeach“teeth”totheotherandformsacapacitor.
CapacitorsinIC21HorizontalmetalCapacitorPectinateMetalCapacitorCapacitorsinIC22Gap-tunableCapacitorTunablerage<50%200200m2,1.5m2.04pF,Q=60@1GHzArea-tunableCapacitorTunablerage>100%1mm2,2um,30um3.3pF,Q=100@400MHzInductorsinIC23Youcangetinductorsonchipbywrappingmetaltraceslikecoil.Itcanbesamemetallayerordifferent.Usuallyitusesthetoplayer.Circularisthebestshape.Byconsideringmanufacturedifficulty,octagon(八边形)isthemostchoice.
InductorsinIC24InductorsinrealICdesign.
InterconnectioninIC25Interconnectionbetweendifferentlayerthroughaluminumvias.InterconnectionbetweenmetallayertooxidelayerthroughTungsten(钨)plugs.
DesignFlowDesignFlowofIC27AtypicalICcontainsbothanalogcircuitsanddigitalcircuits.TheirdesignsareusingdifferentdesignflowanddifferentSWbutwillfinallycombinetoeachotherbeforeactualmanufacturing.
FabricationflowofIC28Therearelotsofprocessfromdesigntoanactualproduct.
AnADClayout29AflashADC’slayout.
SomeIC’slayout30
ManufacturingManufacturingprocessofMOStransistor32BasicStepsOxidegrowth(氧化物生长)Ionimplantation(离子注入)Deposition(沉积)Etching(刻蚀)Photolithography(光刻)Photolithographyisthemeansbywhichtheabovestepsareappliedtoselectedareasofthesiliconwafer.
Oxidation33DescriptionOxidationistheprocessbywhichalayerofsilicondioxideisgrownonthesurfaceofasiliconwafer.Uses:Protecttheunderlyingmaterialfromcontamination.Provideisolation.Verythinoxides(100Åto1000Å)aregrownusingdryoxidationtechniques.Thickeroxides(>1000Å)aregrownusingwetoxidationtechniques.IonImplantation34DescriptionIonimplantationistheprocessbywhichimpurityionsareacceleratedtoahighvelocityandphysicallylodgedintothetargetmaterial.Annealing(退火)isrequiredtoactivatetheimpurityatomsandrepairthephysicaldamagetothecrystallattice.Thisstepisdoneat500to800°C.Ionimplantationisalowertemperatureprocesscomparedtodiffusion.Canimplantthroughsurfacelayers,thusitisusefulforfield-thresholdadjustment.Canachieveuniquedopingprofilesuchasburiedconcentrationpeak.Deposition35DescriptionDepositionisthemeansbywhichvariousmaterialsaredepositedonthesiliconwafer.Like:Siliconnitride(Si3N4),Silicondioxide(SiO2),Aluminum,Poly-Silicon(多晶硅).VariouswaystodepositamaterialonasubstrateChemical-vapordeposition(CVD)(化学气相沉积)Low-pressurechemical-vapordeposition(LPCVD)(低压化学气相沉积)Plasma-assistedchemical-vapordeposition(PECVD)(等离子增强化学气相沉积)Sputterdeposition(溅射沉积)Materialthatisbeingdepositedusingthesetechniquescoverstheentirewaferandrequiresnomask.Etching36DescriptionEtchingistheprocessofselectivelyremovingalayerofmaterial.Etchantmayremoveportionsorallof:1)Thedesiredmaterial;2)Theunderlyinglayer;3)Themaskinglayer.ExposeDevelopApplyPhotoResistEtchingPhotolithography37DescriptionPhotolithographyistheprocessthattransferselectedpatternonexpectedmaterials.Itcontains:Photoresistmaterial,Mask,materialtobepatterned(e.g.,oxide)StepsApplyphotoresist;ExposethephotoresisttoUVlightthroughamaskDevelop(removeunwantedphotoresistusingsolvents)Etching.Removephotoresist(solvents)PhotomaskUVLightPhotomaskPolysiliconPhotoresistSubstrateDepositionRemoveResistSomenewtechnologies3DIntegration39Wafer-levelbonding:multiply-layerstackingThrough-silicon-vias(TSVs):verticalinterconnections(硅过孔).
TSVs(Siliconvia)Multiply-layerthinnedwaferstackingWafersSequentiallyalign,bonding,thinningandinterconnectProcessor/LogicMemoryI/Os,A/Ds,Opto/BiosensorsorMEMSI/Os,A/Ds,Opto/BiosensorsorMEMS3-DChipStackHighdensity,highintegration.Differentfabrication.Heterogeneousintegration(异质集成)
3DIntegration-Multifunctionality40
HgCdTe汞镉碲(sensor)45nmCMOS(Digital)0.18mCMOS(Analog)Heterogeneousintegration(异质集成)3DIntegration-Memory41
Highdensity,highintegration.Lesspins.Lessthickness.
SAMSUNG
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