矽力杰 Silergy SQ33607 PD 反激控制器 规格书 Datasheet 佰祥电子

SQ33607

IEEE802.3af/atCompliantPoEPDInterfacewith

HighEfficiencyPSR/SSRFlybackController

GeneralDescriptionFeatures

TheSQ33607isafullyintegratedIEEE802.3af/atPoEFullyCompatiblewith802.3af/atSpecifications

compliantPoweredDevice(PD)powersupplycontroller.It100V0.45ΩPDIntegratedPassSwitch

includesthePDinterfaceandahighefficiencyPSR/SSR30Wmaximumpower

Flybackcontroller.100mAPDInrushCurrentlimit

900mAPDNormalOperationCurrentLimit

ThePDinterfacehasallthefunctionstocomplywithIEEEAuxiliaryAdaptorORingSupport

802.3af/at,includingdetection,1-eventand2-eventFlexibleTopology:

classification,~100mAinrushcurrentlimit,900mAPrimary-SideRegulated(PSR)Flyback

operationcurrentlimit,automaintainpowersignature(250kHz/400kHzSelectable)

(AMPS),aswellas100VratedHot-swapMOSFET.ThePDSecondary-SideRegulated(SSR)Flyback

interfacealsosupportsAuxiliaryAdaptorOringandtype-2(ProgrammableFrequency)

indicator.OutputDiodeCompensationinPSRMode

Cycle-by-CycleCurrentSenseLimit

ThePWMcontrollerisspecificallyoptimizedforlowcost,PrecisionVoltageReference

smallsizeisolatedflyabackconfiguration,witheitherFrequencyModulationforEMIreduction

primary-sideregulation(PSR)orsecondary-sideregulationProgrammableSoft-start

(SSR).Thedeviceintegratesahighvoltagestart-upcircuit,OLPCompensationforWide-InputRange

usingcurrentmode,quasiconstant-frequencycontroltoExternallyProgrammableThermalShutdown

avoidsub-harmonicoscillationsandnoneedofslopeProgrammableLineUnderVoltageLockout(UVLO)

compensation.withAdjustableHysteresis

HiccupProtectionforOLP,SCP,OVPandThermal

SQ33607isavailableinaQFN4mmx4mm-20pinShutdown

package.

Applications

IEEE802.3af/at-CompliantDevices

SecurityCameras

VideoTelephones

WLANAccessPoints

IoTDevices

TypicalApplication

T1VOUT

L

1RUV1CSNBR

C2C3SNB2DS

RUV2CUVCO

RSNB1

VDDUVLOCSSDSNB

T2PSSDRAIN(Q1)

transformerDENQ1

FromEthernetEthernetFromRDENGATE

ROLC

CLSCS/OTP

Radj

RCLSCCSRCS

C1ΘD

PGOTP

VCCRNTC

TVS1VSSCVCC

R

AMPSVCCDVCCRFB1

RMPSFB

COMP

APDRFB2

MODE/FRS

RTNGND

RAPD1

AdapterRAPD2OringDiode

Fig.1TypicalApplication-IsolatedPSRFlybackConverter

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SQ33607

T1VOUT

L1

RUV1CSNBR

C2C3SNB2DS

RUV2CO

CUV

RSNB1

VDDUVLOCSSDSNB

T2PSSDRAIN(Q1)

transformerDENQ

FromEthernetEthernetFrom1

RDENGATE

ROLC

CLSCS/OTP

Radj

RCLSCCSRCS

C1ΘR

PGDOTPS1RS2

VCCRNTC

US2

TVS1VSSCVCC

RVCC

AMPSDVCCRS4CS1

RMPSFB

APDCOMP

US1

MODE/FRSRFRS

RS3

RTNGND

RAPD1

AdapterRAPD2OringDiode

Fig.2TypicalApplication-IsolatedSSRFlybackConverter

OrderingInformationPinout(topview)

MODE

OrderingPGSS/FRSVSSN/C

0

9

8

7

6

2

1

1

1

PackagetypeTopMark1

PartNumber

QFN44-20VDD115RTN

SQ33607QYQRoHS-CompliantandFNAxyzAMPS214N/C

Halogen-FreeDEN313T2P

x=yearcode,y=weekcode,z=lotnumbercodeCLS412UVLO

APD511CS/OTP

0

6

7

8

9

1

FBCOMPVCCGATEGND

PinDescription

PinNoPinNamePinDescription

1VDDPositivepowersupplyterminalforPoEandcontrollerinputpowerrail.

AutomaticMPScontrol.Connectaresistorwithappropriatepowerrating(tosupportthe

2AMPSMPScurrent)fromAMPStoVSStoprogramtheMPScurrentamplitude.LeaveAMPS

openifnotused.

3DENDetection.Connecta24.9kΩresistorbetweenVDDandDENforPoEdetection.

4CLSClassification.ConnectaresistorfromCLStoVSStoprogramtheclassificationcurrent.

Adaptorpowerinputdetector.DriveVDD-APDabove1.5Vtodisablehot-swapMOSFET

5APD

andCLASSfunctionsandforceT2PandPGactive.

Outputvoltagefeedbackpin.Connectaresistordividerfromsensingwindingtoregulate

6FB

outputvoltageinPSRmode.InSSRmode,theFBshouldbeconnectedtoGND.

Loopcompensationpin.LetitfloatinPSRmode,andinternallypulledupto3.3V

7COMP

through10kresistorinSSRmode.

8VCCDCDCinternalcircuitsupplypin.ConnectabypasscapacitorbetweenthispintoGND.

9GATEFlybackMOSFETgatedriverpin.

10GNDFlybackcontrollerground.

11CS/OTPCurrentsenseandexternalover-temperatureprotectionpin.

Inputundervoltagedetector.Theinputvoltageisscaleddownandsampledusinga

12UVLO

resistordivider.ThecontrollerisenabledonceVUVLOexceedstheenablethreshold.

Type-2PSEindicator.T2Pisanopen-drainoutput.T2PpulledlowtoRTNindicatesthe

13T2P

presenceofaType-2PSEorthepresenceofawalladapter.

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SQ33607

15RTNDrainofPDhot-swapMOSFET.ConnectGNDtoRTNinPCBlayout.

17VSSNegativepowersupplyterminalfromPoEinputpowerrail.

PSR/SSRmodesettingandSSRfrequencysettingpin.ConnectaresistorfromFRSto

18MODE/FRS

GNDtoprogramtheconverterswitchingfrequencyinSSRMode.

Soft-startsettingpin.AcapacitorfromSStoGNDpinsetsthesoft-start(ISSCcharge

19SS

current)fortheDC-DCconverter.

PDsupplypowergoodindicatorandpowerdowninput.ThissignalenablestheDCDC

converterinternally.Itispulledupbyinternal3.3Vvoltagesource;leavefloatingin

20PG

application.PullingPGdownduringoperationwillshutdowntheflybackconverter,

forcingsleepmode.

14,16N/CNotconnectedinternally.

Thisisthethermalpadforthedeviceandshouldbesolderedtotaplaneconnectedto

EPExposedpad

VSS.

BlockDiagram

VDDAPD

DetectionInrushand

2.7V-10.1Vcurrentlimit

DENStart-upT2P

Delaycontrol

IOTP

ControlLogic

CLSClassificationGateDriverRTN

14.5V-20.5V

PG

MarkEventCurrent/Voltage

6.9V-10.1Vsense

VSSRTN

MPSV

MPSVDD

Temperatureenable

IOTP

Detection

MPSAutoMPS

thresholdcontrol

AMPS

VDDPG

Internaltemperature

IOTP

Detection

VCCchargeVCC

HVstartup

MODEMODEcontrol

MODE/FRSSelectionCOT

FRSSettingcontrolPWMIOTP

comparatorVCC

2.5VPWM

PWMlogicDriverGATE

COMPtoFsw

10kMODE

MODE&GND

COMPtoPKCurrentcyclebycyclehiccup

OCP

COMP

1.2VVpkCurrentsense

&CS/OTP

Soft-start

EApeaklimit

SSblock

PWM

OLP

COMPcompensation

FB

1.45V

OCP

OLP

OVPTimer

0.16V

SCP

EOTPprotectionhiccup

UVLOSCP

0.25V

UVLO

UVLODelay

1.23VPWMB

V

OTPOTP_REF

EOTP

Delay

Fig.3BlockDiagram

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SQ33607

AbsoluteMaximumRatings

Parameter(Note1)MinMaxUnit

PinsVoltageRespectstoVSS

VDD,RTN,DEN,APD,T2P-0.3100

V

AMPS(Note6),CLASS(Note6)-0.35.5

PinsVoltageRespectstoRTN(Note7)

VDD,T2P-0.3100V

PinsVoltageRespectstoGND

VDD-0.3100

VCC,GATE-0.320

UVLO-0.316V

FB,MODE/FRS,CS/OTP,PG-0.33.3

SS,COMP-0.33.6

PinsCurrent:

T2PSinkCurrent15

PGSinkCurrent0.8mA

AMPSSourcecurrent15

JunctionTemperature,Operating-45150

LeadTemperature(Soldering,10sec.)260°C

StorageTemperature-65150

VESDElectrostaicHuman-bodymodel(HBM),perANSI/ESDA/JEDECJS-001-2023±2000

V

DischargeCharged-devicemodel(CDM),perANSI/ESDA/JEDECJS-002-2022±500

ThermalInformation

Parameter(Note2)MinMaxUnit

θJAJunction-to-ambientThermalResistance35.5

θJCJunction-to-caseThermalResistance14.1°C/W

θJBJunction-to-BoardThermalResistance5.7

PDPowerDissipationTA=25°C3.52W

RecommendedOperatingConditions

Parameter(Note3)MinMaxUnit

VDD1057

V

VCC,GATE815

JunctionTemperatureTJ-40125°C

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SQ33607

ElectricalCharacteristics(PDInterfacePart)

(VDD,CLASS,DENandRTNvoltagesarereferredtoVSS,T2PvoltageisreferredtoRTN.VDD-VSS=48V,VSS=0V,RDEN=24.9kΩ,

RCLS=63.4Ω,TJ=-40℃to+125℃,typicalvaluesaretestedatTJ=25℃,unlessotherwisespecified(Note4.)

ParameterSymbolTestconditionsMinTypMaxUnit

DetectiononVDNT_ONVDDrising0.81.11.4V

DetectionoffVDEN_OFFVDDrising10.11112.5V

DENLeakageCurrentVDEN_LKVDEN=VDD=57V,measureIDEN0.15µA

DetectionVDD=10.1V,floatDENpin,notin

BiasCurrentIBIAS12µA

Markstatus,measureISUPPLY

VDD=1.4V,measureISUPPLY53.855.658.3µA

DetectionCurrentIDEN

VDD=10.1V,measureISUPPLY395412425µA

VCLASSOutputVoltageVCLASS13V<VDD<21V,1mA<ICLASS<42mA2.372.52.63V

13V≤VDD≤21V,Nottestedinproduction,guaranteedbyVCLASS

RCLASS=1270Ω,13V≤VDD≤21V2

RCLASS=243Ω,13V≤VDD≤21V10.55

ClassificationCurrentICLASS

RCLASS=137Ω,13V≤VDD≤21V18.7mA

RCLASS=90.9Ω,13V≤VDD≤21V28.15

RCLASS=63.4Ω,13V≤VDD≤21V40.4

ClassificationLower

VCL_ONVDDrising,Classregulatorturnson111213

Threshold

Classificationupper

ClassificationVCL_OFFVDDrising,Classregulatorturnsoff212223

ThresholdV

ClassificationLowsidehysteresis0.9

VCL_H

HysteresisHighsidehysteresis0.5

MarkEventReset

VMARK_L456

Threshold

MaxMarkEvent

VMARK_H10.21111.8V

Voltage

MarkEvent

RMARK2-pointmeasureat7Vand10V6912kΩ

Resistance

ICSupplyCurrent

IIN_CLASSVDD=17.5V,CLASSfloating220280µA

duringClassification

ClassLeakageCurrentILKVDD=57V,VCLASS=0V2µA

VDDTurnon

VDD_RVDDrising33.53536.5V

Threshold

VDD