数字电子技术(课件)lec11.ppt

1、2020/7/13,Chapter 6 Functions of Combinational Logic,1,Key Knowledge in Lecture 11,Lecture 11: Decoders,Decoder principles and applications; Decoder expansion; Leading and trailing zero suppression method; Implement logic functions using decoder;,Difficult Topics: Decoder expansion; Zero suppression

2、 method; Implement logic functions using decoder;,2020/7/13,Chapter 6 Functions of Combinational Logic,2,Decoders,Lecture 11: Decoders,A digital circuit that detects the presence of a specified combination of bits (code) on its inputs and indicates the presence of that code by a specified output lev

3、el.,Binary decoder,Output is 1 only when A0 = 1 A1 = 0 A2 = 0 A3 = 1,Look at the following circuit,So this circuit detects if code1001 is present.,2020/7/13,Chapter 6 Functions of Combinational Logic,3,Test Your Understanding,Lecture 11: Decoders,Determine the logic required to decode the binary num

4、ber 1011 by producing a HIGH on the output.,Question:,What is the decoding function?,Logic circuit:,To decode all combinations of an input code, we need to have more outputs.,2020/7/13,Chapter 6 Functions of Combinational Logic,4,例：3线8线译码器,Y0 = A2 A1 A0 = m0 Y1 = A2 A1 A0 = m1 Y7 = A2 A1 A0 = m7,Log

5、ic expression:,可以看出译码器的每个输出对应于输入变量的一个特定最小项。这为用译码器实现逻辑函数提供了依据。,Lecture 11: Decoders,Binary Decoder,2020/7/13,Chapter 6 Functions of Combinational Logic,5,用电路进行实现,真值表,逻辑表达式：,例如：对于Y0来说，只有当A2 A1 A0 都为0时，接在非门输出端的二极管才不会导通，从而使得Y0输出为1。,Lecture 11: Decoders,内部结构#1：二极管与门阵列3线8线译码器,2020/7/13,Chapter 6 Functions

6、 of Combinational Logic,6,低电平输出,附加 控制端,集成译码器实例：74HC138,Lecture 11: Decoders,内部结构#2：用与非门组成的3线8线译码器,If S=0, then Yi=1,分析：当输入为m0时输出Y0为0 (低电平),当所有的输出都为高电平时表示译码器没有进行译码。这样我们可以用附加控制端控制译码器的工作状态。,2020/7/13,Chapter 6 Functions of Combinational Logic,7,Lecture 11: Decoders,Function Table of 74HC138：,2020/7/13,

7、Chapter 6 Functions of Combinational Logic,8,4线16线译码器,例：用两片74HC138（3线8线译码器）,扩展成,低位片,高位片,分析：当输入D3D2D1D0的值为00000111时，希望低位片直接对其译码。,低位片S2S3端需要低电平， D3正好提供。,同时又要禁止高位片工作，可用D3控制高位片的S1端。,当输入D3D2D1D0的值为10001111时，希望高位片工作，低位片封锁。所以输入要同时送到高位片。,最后S2S3需要低电平,Lecture 11: Decoders,Use Control Terminal to Expand Decode

8、r,2020/7/13,Chapter 6 Functions of Combinational Logic,9,4-Bit Decoder Truth Table,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,10,4-Bit Decoder Logic Symbol,Lecture 11: Decoders,4-bit decoder Binary inputs Active-low outputs,See illustration demo,2020/7/13,Chapter 6 Fun

9、ctions of Combinational Logic,11,The 74HC154 1-of-16 Decoder,Lecture 11: Decoders,It is an active-LOW decoder. It provides enable function (EN),When the decoder is not enabled, then all sixteen outputs (Y) will be HIGH regardless of the states of the four input variables.,2020/7/13,Chapter 6 Functio

10、ns of Combinational Logic,12,Test Your Understanding: Decoder Expansion,Lecture 11: Decoders,Use 74HC154 to implement a 5-bit number decoding.,The fifth bit A4 is connected to the chip select inputs.,2020/7/13,Chapter 6 Functions of Combinational Logic,13,An Application of Decoders,Lecture 11: Decod

11、ers,A simplified computer I/O port system with a port address decoder with only four address lines shown.,2020/7/13,Chapter 6 Functions of Combinational Logic,14,BCD-to-Decimal Decoder,Lecture 11: Decoders,Please notice that the method of implementation is the same as 1-of-16 decoder except that onl

12、y ten outputs are needed.,2020/7/13,Chapter 6 Functions of Combinational Logic,15,将输入BCD码的10个代码译成10个高、低电平的输出信号。BCD码以外的伪码，输出均无低电平信号产生。,Lecture 11: Decoders,74HC42二十进制译码器逻辑图,2020/7/13,Chapter 6 Functions of Combinational Logic,16,Lecture 11: Decoders,74HC42 BCD-to-Decimal Decoder timing diagram,See de

13、mo,2020/7/13,Chapter 6 Functions of Combinational Logic,17,BCD-to-7-Segement Decoder Logic Symbol,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,18,the 74LS47 BCD-to-7-segment decoder/driver,Lecture 11: Decoders,See demo,Suitable for common anode LED display,2020/7/13,Chap

14、ter 6 Functions of Combinational Logic,19,2. BCD七段字符显示译码器（代码转换器）7448,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,20,卡诺图,真值表,Ya=(A3A2A1A0+A2A0+A3A1),Yb=(A2A1A0+A2A1A0+A3A1),Yc=(A2A1A0+A3A2),Yd=(A2A1A0+ A2 A1A0 + A2A1A0),Ye=(A0+A2A1),Yf=(A3A2A0+A1A0+A2A1),Yg=(A3A2A1+A2A1A

15、0),Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,21,BCD七段显示译码器7448的逻辑图,请同学们注意到：逻辑式中的或非关系，在逻辑图中画出的是负与门。,Lecture 11: Decoders,B,G5G7, G9G12平常作非门用,当A0=A1=A2=0时, YaYf = 1,2020/7/13,Chapter 6 Functions of Combinational Logic,22,7448的附加控制信号：（1）,当 时，Ya Yg全部置为1,灯测试输入,因为LT=0时，类似于A

16、0=A1=A2 =0; 使得A10=A11=A12 =0; 同时G19的两个输入都为0,使Yg输出为1。七段显示全部亮。,Lecture 11: Decoders,B,2020/7/13,Chapter 6 Functions of Combinational Logic,23,7448的附加控制信号：（2）,当 时， 时，则灭灯,灭零输入,Lecture 11: Decoders,B,理由：当RBI=0时，通过门G1, G3, G4传到门G9, G10, G11, G12的输入端，使A10, A11, A12, A13输出为1。 而门G13G19中只要它们各自的输入端中有一个为1, 则可使Y

17、aYg输出为0，从而达到灭零的目的。,2020/7/13,Chapter 6 Functions of Combinational Logic,24,7448的附加控制信号：（3）,灭灯输入/灭零输出 输入信号，称灭灯输入控制端： 无论输入状态是什么，数码管熄灭 输出信号，称灭零输出端： 只有当输入 ，且灭零输入信号 时， 才给出低电平。 因此 表示译码器将本来应该显示的零熄灭了,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,25,当BI为低电平时， A10=A11=A12 = A13 = 1

18、; 画有红圈的与门输出为1，因而使得YaYg输出全部为低，灯灭.,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,26,7448可以直接驱动共阴极的半导体数码管。但只能提供大约2mA左右的电流。如果数码管需要的电流大于这个数值时，则应当在2k的上拉电阻上再并联适当的电阻.,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,27,Zero Suppression Using the 74LS47 De

19、coder,Lecture 11: Decoders,See ripple blanking demo,2020/7/13,28,Display of Decimal Digits with a 7-Segment Device,LED Displays,LCD Displays,Lecture 11: Decoders,Chapter 6 Functions of Combinational Logic,2020/7/13,29,Display of Decimal Digits with a 7-Segment Device,LED Displays,LCD Displays,Chapte

20、r 6 Functions of Combinational Logic,Lecture 11: Decoders,2020/7/13,30,数码管的两种常用管脚排列图,Chapter 6 Functions of Combinational Logic,Lecture 11: Decoders,2020/7/13,31,7段LCD数码管,See demo,Chapter 6 Functions of Combinational Logic,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,32,

21、Lecture 11: Decoders,Using Decoder to Generate Logic Function,Look at the 2-to-4 decoder logic expression:,Ideas: make use of the fact that the decoder output contains all minterms of input variables.,The above decoder outputs contain the inverse of them.,2020/7/13,Chapter 6 Functions of Combination

22、al Logic,33,Note：,m1,m4,m5,m7,Lecture 11: Decoders,Implement Following Logic Functions Using Decoder,Solution:,Logic circuit for F1, F2, F3,2020/7/13,Chapter 6 Functions of Combinational Logic,34,2线4线译码器中的竞争-冒险现象,Lecture 11: Decoders,2020/7/13,Chapter 6 Functions of Combinational Logic,35,Test Your

23、Understanding,Lecture 11: Decoders,If a 1-of-16 decoder with active-LOW outputs exhibits a LOW on the decimal 12 output, what are the inputs? a) A3A2A1A0=1010;b) A3A2A1A0=1110; c) A3A2A1A0=1100;d) A3A2A1A0=0100;,Answer: c),2020/7/13,Chapter 6 Functions of Combinational Logic,36,Summary of Lecture 11,Lecture 11: Decoders,A decoder is used to detect the presence of a specified combination of bits on its inputs. Decoder can be