电容-MLCC经典.ppt

1、1,Multi-layer ceramic capacitor (MLCC) & Resistor chip (R-chip) general introduction and application,C.L.Chiang Marketing Phycomp Taiwan,2,Construction of MLCC,3,Type I (Class I) : Temperature Compensation ex. NP0, N750 Type II (Class II) : High Dielectric Constant ex. X7R, X5R, Y5V, Z5U, BaTiO3 ,Ca

2、TiO3, SrTiO3 , NbTiO3 , TiO2 , La2O3 .,Dielectric material,4,The principle of capacitance designing,Capacitance = e e0,A x ( Ne-1 ),D,Unit : F (farad, from Faraday),5,MLCC material and construction,Plating Termination,Conventional MLCC BME MLCC,PdAg Termination,6,PVA,NPO,H20,Ball Mill,Slip,Foil Cast

3、ing,Screen Printing,Drying,MLCC process flow,Pressing,Notching,Binder Burn Out,11001300C,Sintering,Tumbling,Dipping/Curing,Plating,Testing,Taping,7,The classification of ceramic material,Type II (Class II) : High Dielectric Constant Non-liner function of cap. with temp. ex. X7R, Y5V, Z5U,Type I (Cla

4、ss I) : Temperature Compensation Liner function of cap. with temp. ex. NP0, N750,8,EIA: Class I,Ex. :C0G = NP0,T.C.= 0 -1 30 ppm C: 0N: Negative 0: -1P: Positive G: 30 ppm0: 0,Symbols of temperature coefficients,9,Temperature coefficient of class I MLCC,10,Temperature coefficient/characteristic of M

5、LCC,11,Aging characteristic of MLCC,12,Construction of RSMD,13,Termination Construction of RSMD,14,RuO2,NiCr,Overcoat,Overcoat,Glaze coat,Material comparison between thin film and thick film R-chip,15,What is 04024 8P4R ?,Integrate 4 isolate Resistors into a 0805 size of package,R1 = R2 = R3 = R4,16

6、,R-chip process flow,17,Temperature coefficient of R-chip,Ex: TCR200 (200ppm/ C),18,Power de-rating,50,0,-55,T (C),Pmax,50,0,100,70,125,155,%Prated,RC01/ RC11/ RC21,RC31,IEC publication 60115-8,Maximum dissipation (Pmax) in percentage of rated power as a function of the ambient temperature (Tamb).,1

7、9,Venn diagram showing interrelationship in SMD Technology,20,Cracking modes of MLCC,21,Top crack,Side crack,Thermal shock defect mode,22,MLCC structure with coefficients in thermal expansion (CTE) and thermal conductivities (dT) listed,The theory of thermal shock effect,23,Manual Soldering,The tip

8、of soldering iron should not directly touch the chip component to avoid thermal shock on the interface between termination and body during mounting, repairing or de-mounting process (shall ensure both termination had been molten still before chip component removed).,Temperature profile,The method an

9、d condition by manual soldering,24,The typical failure modes in the board bending test,25,Bending test method,26,Defect mode by PCB bending effect,Termination could be loosed after rework/demounted by solder iron,The fracture appears wedge,27,Excessive solder amount,Crack by PCB bending effect,28,Ch

10、ip mounting close to board separation point,Magnitude of stress 1 2 3 4 5,Perforation,Slit,Prerouted Corners to Relieve Stress,The stress vs. position on PCB during bending,29,Termination loosing (Thermal effect),Capacitance IR ,Capacitance ,Bending defect (Mechanical effect),Termination leaching (T

11、hermal effect),The mechanism about termination loosing,30,Computing,Consumer Multimedia,Automotive & General Industrial,Communications,Focus applications,31,3C Market trend,32,Changing social behavior needs new products,33,Worldwide MLCC product mix in 1999 2001,34,Worldwide R-chip product mix in 19

12、99 2001,35,Ceramic capacitor trend for miniaturization application,36,Miniaturization,37,Passive components content in cellular phones (C,R,L),Nokia 3210,38,MLCC content in cellular phones,Nokia 3210,39,Source: CARTs,Global cellular phone shipments 1997-2002,40,Smart phone - Integration by mobile ph

13、one & PDA,41,Venn diagram showing interrelationship in SMD Technology,42,Tombstoning defect,43,g : Surface tension of molten solder q : Contact angle of solder gx, y : Components of solder surface tension r in x and y direction h : Chip wetting height f : Force generated by chip mass f1, 2 : Compone

14、nts of force for moment analysis G : Chip center of gravity lGA : Distance between point A and G m : Component mass g : Gravitational acceleration,Tombstoning model,Chip stands up when a moment generated by surface tension of solder around point A exceeds the static moment of chip mass. Moment M gen

15、erated at point A by solder surface tension is M=hg sinq , and moment Mc generated at point A by chip mass is 1/2mgl. The condition for tombstoning is MMc.,44,1. Uneven heating,2. Chip components,3. Board material and thickness,4. Land shape, geometry (relation with chip termination dimensions), and

16、 land solder wettability,5. Solder paste,6. Reflow soldering method selected,a. Preheating and heating conditions b. Temperature distribution inside the furnace and on the board,a. Termination shape and dimensional accuracy b. Termination solder wettability,a. Flux composition, chemical activity b.

17、Solder amount (coated area and coating thickness) and coating accuracy,Six factors cause tombstoning,45,Tombstoning factors and defect incidence,46,FR = Fg Cos q - FB FR = Pg Cos q - pgV p = Specimen periphery g = Liquid surface tension q = Contact angle p = Liquid density g = 9.81ms-2 V = Immersed

18、volume of specimen,The basic theory of wetting balance,The theory of wetting balance is to measure the micro-force during the soldering process for components. It takes the measurement from the beginning of component immersed in the solder to the end of balance of force.,47,Wetting balance test proc

19、edure vs. wetting force,48,Wetting force profile by wetting balance,49,Occupied area: 0603 4.05 mm2 04021.66 mm2 02010.54 mm2,PCB space saving 0402, 0201 v.s. 0603,0603,0402,0201,50,Advantages of product miniaturization,51,Integration components development trends,52,Cost saving by using C-array,53,MLCC vs Tantalum,MLCC features: Non-polarized unit Higher insul