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1、电源管理,2,李志林,资深应用工程师 美国国家半导体北京销售办事处,3,内容提要,电源管理概述 产品介绍 PCB Lyaout,4,LDO 选型过程,数字稳压器 优化的负载瞬态性能 更快的打开时间降至 20s 超低静态电流 模拟/射频稳压器 降低的设备噪声 20VRMS 改进的 PSRR 与优化的线路瞬态性能 快速打开/关闭时间降至 30s,5,LDO的应用,功能: 降压 应用条件: 一般电流1A 超低压降及低噪音应用,P = (Vin-Vout) x I load ) + (Vin x Iq),6,LDO 的负载瞬态响应的最优化,7,COUT 对LDO的稳定性的影响,Transient Re
2、sponse for Load Step Large Cout Still stable, more ringing,Transient Response for Load Step Small COUT Rings heavily, marginally stable,1. ESR Too High Poor quality tantalum capacitors can have a high ESR. An aluminum electrolytic will have a high ESR at cold temperatures. 2. ESR Too Low Many surfac
3、e-mount ceramic capacitors with very low (20 mW) ESRs. Tantalum, OSCON, SP, POSCAP, film capacitors all have low ESR,8,请阅读 DATASHEET!,LP38690 LP2989,9,功率回路中的电容,Electrical Characteristics Capacitance at rated voltage (cermics!) Voltage Rating RMS current rating ESR Temp Rating ESL,17.7mOhms,10mOhms,5
4、.6mOhms,3.1mOhms,1.8mOhms,10,功率回路中的电容,Aluminum Electrolytic Low Cost Wide voltage ratings Wide capacitance ratings Higher ESL ESR increases in cold Tantalum Small size vs C High capacitance Low ESR (30-150mohm) Use caution on input Being replaced by niobium POSCAPTM (Sanyo) Similar to tantalum in si
5、ze High Capacitance Lower risk of destructive failure Lower ESR (20-80mohm),Ceramic X5R or X7R best dielectric Lowest ESR (1-10mohm) Can generate audible noise in some applications Technology has improved greatly in last 5 years Small size Low cost Specialty Polymer Aluminum Very Low ESR (10-50mohm)
6、 High capacitance Small size Limited suppliers OSCONTM (Sanyo) Organic Aluminum Electrolytic Very low ESR (10-200mohm) High Capacitance SMD and through-hole,11,电感量对瞬态过冲的影响,低电感能提高系统的瞬态响应,12,电感量对开关纹波电流的影响,33uH $0.3,68uH $1.0,13,电源设计的折衷考虑,高ESR 的输出电容 Cout : 更大的相位余量 输出纹波较大 低感量的输出电感 更大的相位余量 在负载瞬态响应中过冲很小 高
7、的峰值开关电流 输出纹波较大 小体积及低价格 电源设计是一系列的折衷考虑.,回滞控制模式,15,回滞控制模式的基本结构,Low Cost Controller LM3485 LM3475,反馈电压与基准设置有10 to 15mV 的回滞,当反馈电压超过基准电压1/2(Vh),PMOSFET Shut down, 直到反馈电压低于基准电压1/2(Vh),16,LM3485 结构,17,回滞控制模式的开关波型,T ON and t OFF are functions of VIN, VOUT, L, ESR, ESL, VHYS*(RF1+RF2)/RF2, and td,18,LM3485 应用
8、电路,19,In most cases, switching frequency is determined by output ripple voltage (DVOUT) resulting from ESR. Amplitude of DVOUT is described by the following two equations: Combining these two equations yields an expression for the switching frequency,计算回滞控制模式的开关频率,CFF sigficantly reduces this term,2
9、0,LM3485 电解电容 COUT,10uF Ceramic Cin 4.7uH 10uF Electrolytic Cout 1.4MHz 5Vin 2.5Vout 0.7Amps,The feedback network does not use a CFF capacitor.,21,LM3485 Waveform 1,10uF Ceramic Cin 4.7uH 10uF Ceramic Cout 186kHz 5Vin 1.8Vout 0.7Amp,22,输出使用陶瓷电容,It is a reliable way of using low ESR output capacitors
10、 and having very low output ripple. It allows the use of high ESL output capacitors which generate spikes which may trigger the comparator early. Lastly, it makes the operating frequency independent of output ESR and results in a more predictable operating frequency. highly recommend using this meth
11、od. Adjustment of R3 will adjust the operating frequency.,23,回滞控制模式的其他理论,Frequency changes when Vin close to Vout F proportional to 1/L F proportional to ESR F proportional to Vout F not a function of load If continuous mode Will vary slightly, but less than PWM tolerance on frequency. No control lo
12、op to worry about always stable and noise immune.,固定导通时间的控制模式,25,固定导通时间的控制的结构,When the feedback voltage falls below VREF, the comparator output swings high, and the one-shot generates a pulse that turns the output switch. The timer sets a constant on-time for the switch, and it adjusts the pulse wid
13、th to decrease as VIN increases. This keeps the switching frequency relatively constant over variations in VIN. After the on-time pulse ends, the switch remains off until the feedback voltage drops below VREF again, at which point, another pulse is generated.,26,tON is a constant, so the regulator m
14、ust adjust tOFF to the value necessary to maintain charge balance in the inductor. This is expressed by the following equation: Solving this equation for 1/T yields an expression for the switching frequency:,固定导通时间的控制的开关频率,Future product uses Vin feedforward for constant frequency,27,固定导通时间的控制的开关波形,
15、tON is set by a one-shot timer that decreases tON as VIN increases. tOFF is a function of VIN, VOUT, and tON,28,LM5007 方框图,LDO,30,LP388X/9X Dual-Rail LDOsLower Cost, Better Efficiency,Better efficiency than converting from 5V or 3.3V High load current, puts off a switcher solution PSRR is more than
16、80dB,1.5V/0.8A1.2V/1.5A1.2V/3A,1.8V,31,LP388X/9X Family of CMOS LDOs,Block Diagram,特性: Ultra-low dropout voltage (210mV 3A) Load regulation of 0.04% Vout range 1.2V 1.8V 60nA typical shutdown current 1.5% output accuracy (25oC) TO-220, TO-263, PSOP packages,32,1.5 3A, Ultra-low LDOs:Replaces Switchi
17、ng Solutions,Features Ultra-low dropout voltage Stable with Ceramic Caps Load regulation of 0.06% Output voltage accuracy 1.5% Optional Error Flag and Sense options Over current/Over temperature protection Available in 5 lead SOT223, TO220 and TO263 packages,33,0.8A, 1.5A, 3A, Ultra LDO Regulators:H
18、ighest Accuracy, Sequencing Option,Features Low dropout voltage Load regulation of 0.06% Output voltage accuracy 1.5% Optional Error Flag and Sense options Over current/Over temperature protection Available in 5 lead SOT223, TO220 and TO263 packages,34,LP3869X,1: Price : 0.40.45$ 2:Package: TO-252/S
19、OT-223/LLP-6 3: Only 1uF input ceramic capacitor 4:1A off-state quiescent current 5: PSRR=50dB,35,SIMPLE SWITCHER Buck Regulator Products,Output Current,36,LM2733 40V,1Amp,LM2700 19V,LM5000 80V,300/700kHz 600/1250kHz,LM2731 18V,600/1600kHz,LM2577,52kHz,LM2587 LM2588,LM2585 LM2586,100-200kHz,LM2698 1
20、9V,600/1200kHz,5Amp,3Amp,1.35Amp,Frequency,SIMPLE SWITCHER Boost/Flyback Regulators,Peak Switch Current,37,LM2733/31,LM267X,39,New LM267X Buck Simple Switchers,LMDMOS process High efficiency, 90% typ. High switching freq., 260 kHz Small solution size (1A: SO-8) Basic 0.5A (LM2674), 1A (LM2675) 3A (L
21、M2676), 5A (LM2678) Additional features LM2670/1/2/7: Soft-start, Frequency synchronization LM2673, LM2679: Adjustable current limit,40,LM267X General Description,fSW = 260-400kHz (using external frequency sync) Vin = 6.5-40V, 0.5Amp and 1Amp versions Vin = 8.0-40V, 3Amp and 5Amp versions RDSON = 0.
22、25W for 0.5 and 1Amp versions RDSON = 0.125W for 3 and 5Amp versions Vfb = 1.24V Adjustable cycle by cycle current limit on certain versions Thermal shutdown Excellent line and load regulation Voltage mode PWM control with internal compensation Works best with low ESR caps,41,LM267X Compensation Tri
23、cks and Tips,Internal compensation requires LC double pole to stay below a certain frequency. ADJ version optimized for 5V out If you do a design with the ADJ part for 3.3V, you will get a larger inductor and output cap than do with the 3.3 part. Switchers Made SimpleTM is conservative, try WEBENCHT
24、M. When the part synchronized to an external clock the loop gain tends to improve,42,Current limit functionality,Cycle-by-cycle current limit prevents peak inductor current from exceeding limit. Duty cycle is reduced as a function of this current limit so output voltage decreases Minimum on time is
25、200-300ns. If current ramps to second level current limit during the on time, cycles are skipped Saturation of inductor most likely cause Frequency reduction decreases effective duty cycle and limits output power.,43,LM267X Minimum Load Requirements,LM267X has a floating FET driver. If VinVout+10V c
26、urrent will flow to the output Minimum load requirement is 1.5mA.,Simple 10V gate drive supply uses zeners,44,LM267X EMI Reduction,The LM267X regulators tend to have very fast rising and falling switching waveforms Good for efficiency High frequencies can cause EMI problems Slowing down the gate dri
27、ve reduces EMI. Adding a snubber on the schottky reduces EMI The LM267X can also be effected by EMI so good bypassing is required,45,Slowing down Switch turn on,Add 10ohms in series with Cboost capacitor Reduces peak gate current through driver Slows gate turn on Reduces high frequency EMI,Add 10ohm
28、 resistor,46,Schottky Snubber,Reduces EMI cause by reverse recovery currents Series 47ohm resistor and 1nF cap in parallel with schottky good values to start. 10-100ohms 0.47-2.2nF,47,Bypassing LM267X,A single pin supplies Vin to the ICs control circuitry and output stage - output stage creates larg
29、e current pulses As noise increases at this pin, erroneous operation can result Higher currents become more of a problem LM2671/2/4/5 require no special bypassing LM2670/3/6/7/8/9 may require high frequency bypassing Place 0.47-2.2uF ceramic bypass cap across Vin and GND pins,Board Layout Guidelines
30、,49,Buck Regulator Schematic,SIMPLIFIED SCHEMATIC,TRUE SCHEMATIC,50,引线电感,Trace inductance is x nH/cm has no meaning in a board layout Inductance is always defined in a closed path,LOOP,PARALLEL RETURN,TWISTED PAIR,INDUCTANCE REDUCES,51,The AC Current Traces,Buck Regulator Current flow Figure a: swit
31、ch closed Figure b: switch open Figure c: Large AC current path,52,Grounding,First Rule Board Layout - “Ground Isnt” Avoid letting AC currents flow in the main ground plane. Run separate traces Use single point ground for all sensitive circuitry Seperate analog and power grounds,Ground Vin,Ground Vo
32、ut,Ground ?,53,Bypassing Monlithic Switchers,A single pin supplies Vin to the ICs control circuitry and output stage - output stage creates large current pulses As noise increases at this pin, erroneous operation can result Higher currents become more of a problem LM2671/2/4/5 require no special byp
33、assing LM2670/3/6/7/8/9 may require high frequency bypassing Place 0.47-2.2uF ceramic bypass cap across Vin and GND pins,54,Switch Node,Voltage swings from Vin to Ground at fsw. Very high dV/dt node! Electrostatic radiator Solutions: Avoid creating an antenna Keep inductor very close to FETs Make sw
34、itch node short Put on multiple layers Avoid capacitive coupling to ground Avoid coupling to signal paths,Bottom View,B,A,55,FET Drivers,Place drivers close to power FETs Minimize loop area of gate drives,External capacitor from gate to source reduces gate glitch,High side gate,Low side gate,56,控制回路的设计 - FB,FB/COMP network not close to device Close to noise sources,UNSTABLE!,57,控制回路的设计- Isense,Isense traces not para
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