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1、1,William Stallings Computer Organization and Architecture7th Edition,Chapter 17 Micro-programmed Control,2/40,Key Terms (1),Control memory Control word Firmware Hardware Software Hard microprogramming Horizontal microinstruction Vertical microinstruction Microinstruction encoding Microinstruction e

2、xecution Microinstruction sequencing,3/40,Key Terms (2),Microprogram Microprogrammed control unit Microprogramming language Soft microprogramming Unpacked microinstruction,4/40,Control Unit Organization,5/40,Micro-programmed Control,Use sequences of instructions (see earlier notes) to control comple

3、x operations Called micro-programming or firmware Firmware 固化在硬件中的软件 hardware software,6/40,Implementation (1),All the control unit does is generate a set of control signals Each control signal is on or off Represent each control signal by a bit Have a control word for each micro-operation Have a se

4、quence of control words for each machine code instruction Add an address to specify the next micro-instruction, depending on conditions,7/40,Implementation (2),Todays large microprocessor Many instructions and associated register-level hardware Many control points to be manipulated This results in c

5、ontrol memory that Contains a large number of words co-responding to the number of instructions to be executed Has a wide word width Due to the large number of control points to be manipulated Manipulate 英音:mnipjuleit 操作,运用,控制,8/40,Micro-program Word Length,Based on 3 factors Maximum number of simul

6、taneous micro-operations supported The way control information is represented or encoded The way in which the next micro-instruction address is specified,9/40,Micro-instruction Types,Each micro-instruction specifies single (or few) micro-operations to be performed (vertical micro-programming) Each m

7、icro-instruction specifies many different micro-operations to be performed in parallel (horizontal micro-programming),10/40,Vertical Micro-programming,Width is narrow n control signals encoded into log2 n bits Limited ability to express parallelism Considerable encoding of control information requir

8、es external memory word decoder to identify the exact control line being manipulated,11/40,Horizontal Micro-programming,Wide memory word High degree of parallel operations possible Little encoding of control information,12/40,Typical Microinstruction Formats,13/40,Compromise,Divide control signals i

9、nto disjoint groups Implement each group as separate field in memory word Supports reasonable levels of parallelism without too much complexity Compromise 妥协方案,折衷办法; disjoint 断绝,使分离,使分裂,14/40,Organization ofControl Memory,15/40,Organization ofControl Memory,16/40,17/40,18/40,Control Unit,1.read,2,2,

10、3.Control signals,4.Next address,19/40,Control Unit Function,1.Sequence login unit issues read command 2.Word specified in control address register is read into control buffer register 3.Control buffer register contents generates control signals and next address information 4.Sequence login loads ne

11、w address into control buffer register based on next address information from control buffer register and ALU flags,20/40,Next Address Decision,Depending on ALU flags and control buffer register Get next instruction Add 1 to control address register Jump to new routine based on jump microinstruction

12、 Load address field of control buffer register into control address register Jump to machine instruction routine Load control address register based on opcode in IR,21/40,Functioning of Microprogrammed Control Unit,2,3,4,1,22/40,Wilkes Control,1951 Matrix partially filled with diodes During cycle, o

13、ne row activated Generates signals where diode present First part of row generates control Second generates address for next cycle,23/40,Wilkess Microprogrammed Control Unit,24/40,Advantages and Disadvantages of Microprogramming,Simplifies design of control unit Cheaper Less error-prone Slower,25/40

14、,Tasks Done By Microprogrammed Control Unit,Microinstruction sequencing Microinstruction execution Must consider both together,26/40,Design Considerations,Size of microinstructions Address generation time Determined by instruction register Once per cycle, after instruction is fetched Next sequential

15、 address Common in most designed Branches Both conditional and unconditional,27/40,Sequencing Techniques,Based on current microinstruction, condition flags, contents of IR, control memory address must be generated Based on format of address information Two address fields Single address field Variabl

16、e format,28/40,Branch Control Logic: Two Address Fields,29/40,Branch ControlLogic: Single Address Field,30/40,Branch Control Logic: Variable Format,31/40,Branch Control Logic: Two Address Fields Single Address Field,32/40,Branch Control Single Address Field Logic: Variable Format,33/40,Address Gener

17、ation,34/40,Execution,The cycle is the basic event Each cycle is made up of two events Fetch Determined by generation of microinstruction address Execute,35/40,Execute,Effect is to generate control signals Some control points internal to processor Rest go to external control bus or other interface,3

18、6/40,Control Unit Organization,37/40,A Taxonomy of Microinstructions,Vertical/horizontal Packed/unpacked Hard/soft microprogramming Direct/indirect encoding,38/40,Improvements over Wilkes,Wilkes had each bit directly produced a control signal or directly produced one bit of next address More complex

19、 address sequencing schemes, using fewer microinstruction bits, are possible Require more complex sequencing logic module Control word bits can be saved by encoding and subsequently decoding control information,39/40,How to Encode,K different internal and external control signals Wilkess: K bits ded

20、icated 2K control signals during any instruction cycle Not all used Two sources cannot be gated to same destination Register cannot be source and destination Only one pattern presented to ALU at a time Only one pattern presented to external control bus at a time Require Q 2K which can be encoded with log2Q K bits Not done As difficult to program as pure decoded (Wilkes) scheme Requires complex slow control logic module Compro

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