盛群单片机HT32入门.ppt

2014年福建省大学生 合泰杯单片机应用设计竞赛 竞赛培训会 Holtek HT32F1765 (March 2014),2,Agenda,ARM Cortex-M3,4,Cortex-M Series,Source : ARM,5,Overview ARM Cortex-M3,Cortex-M3 Core Thumb & Thumb2 decoders 32-bit ALU Hardware divider & Multiplier ETM, NVIC, and Bus Interface Cortex-M3 Processor Nested Vectored Interrupt Controller (NVIC) Optional Memory Protection Unit (MPU) (Not available in HT32F125x) Bus matrix Code / SRAM / Peripheral interfaces Debug components Optional Embedded Trace Macrocell (ETM) (Not available in HT32 Series),Source : ARM,6,Architecture,* HT32F2755 only,3 Independent Bus ICode, DCode, System,7,1.25 DMIPS,0.90,0.93,0.75,Performance,50MHz CM3 = 1.25 x 50 = 62.5 DMIPS 50MHz CM0 = 0.90 x 50 = 45.0 DMIPS Performance = (62.5-45)/45 = 38.9%,Source : ARM,8,Advantages,Source : ARM,9,ARM Cortex-M3,Programmers Model Memory Model Exception Model Fault Handling Power Management Cortex-M3 Peripherals,10,Programmers Model Register,11,Programmers Model Operation Mode,12,Memory Model Memory Map,4 GB Fixed map Simplifies software Bit Band,13,Memory Model Bus Interface,Source : ARM,14,Exception Model,1 15 for system, 16 255 for IP, Programmable priority Vector table contains address of ISR Interrupt Service Routine Default at address 0x0 after reset Re-locatable by NVIC VTO register,15,Fault Handling,Faults are a subset of exceptions,Deal with Faults Development: Debug Product: Reset / Fault recovery / Task termination,16,Power Management,Power saving mode Sleep mode: Stops the processor clock Deep sleep mode: SLEEPDEEP signal for clock gating of all system Entering power saving mode Sleep mode Wait For Interrupt (WFI) instruction Wait For Event (WFE) instruction Deep Sleep mode WFI or WFE with SLEEPDEEP bit in System Control Register (SCR) Sleep-on-exit SLEEPONEXIT bit in SCR Wakeup from sleep mode WFI: Active interrupt WFE: Active interrupt, External event, Pending interrupt,17,Cortex-M3 Peripherals,Nested Vectored Interrupt Controller (NVIC) System Control Block (SCB) System Timer, SysTick Debug Support,18,Nested Vectored Interrupt Controller Low interrupt latency Typical as low as 12 6 Cycles Up to 240 interrupt Up to 256 priority levels Handler mode / Privileged level Registers Interrupt Set-Enable Register Interrupt Clear-Enable Register Interrupt Set-Pending Register Interrupt Clear-Pending Register Active Bit Register Interrupt priority Register,Cortex-M3 Peripherals - NVIC,19,Cortex-M3 Peripherals - SCB,20,Cortex-M3 Peripherals SysTick,24-bit self-reloading down counter For RTOS tick timer or simple counter Clock Source: Core clock External reference clock Exception vector: #15, SysTick Accessible from Privileged level 4 Registers SYST_CSR: COUNTFLAG / CLKSOURCE / TICKINT / ENABLE SYST_RVR: RELOAD SYST_CVR: CURRENT SYST_CALIB: NOREF / SKEW / TENMS,21,Cortex-M3 Peripherals Debug Support,Core Debug Halting / Single Step Register Access (R0R12, SP, LR, PC, etc.) Debug Exception System Debug Components,22,Cortex-M3 Peripherals Debug Support,Debug Access Port (DAP) AHB-AP SW-DP / SWJ-DP,23,Cortex-M3 Reference,Cortex-M3 Devices Generic User Guide The Definitive Guide to the ARM Cortex-M3 Cortex-M3 Technical Reference Manual ARMv7-M Architecture Reference Manual,Holtek HT32F1765 Peripherals,25,HT32F1755 / 1765 / 2755,Architecture HT32F1755 HT32F1765 HT32F2755,26,CPU Core Operating Voltage System Clock,JTAG / Serial Wire Debug Max. generated from HSE / HSI by PLL,Flash SRAM,Flash Security / Accelerator HT32F1755 : 32KB HT32F1765 / 2755 : 64KB,Oscillators,HSE : 4MHz 16MHz (Clock Stop Detection ) HSI : 8MHz 5% -40C +85C LSE : 32.768KHz LSI : 32KHz 10% 25C,PDMA USB SCI,12 channels USB 2.0 Full Speed Device ISO7816-3 Smart Card Interface,Cortex-M3 r2p0 2.7V 3.6V 72MHz,128K Bytes 32K / 64K Bytes,High-Speed External High-Speed Internal RC Low-Speed External Low-Speed Internal RC,1 1 1,CSIF*,CMOS sensor interface, Clock up to 24MHz YUV or RAW RGB data format (QVGA / CIF) * For HT32F2755 only,1,Function,Description,Spec / Number,HT32F1755/1765/2755 Feature (1/3),27,Basic Function Timer (BFTM) General Purpose Timer (GPTM) Motor Control Timer (MCTM), 32-bit compare counter One shot / Repetitive interrupt mode Input capture Output compare PWM generation (Edge and Centre-aligned mode) One Pulse Mode output QEI & Hall sensor interface As GPTM but with extra motor functions: Complementary output with programmable dead time insertion Programmable polarity Programmable idle state Break protection Support 3-phase motor control,USART SPI I2C,With FIFO, Baud Rate up to 4.5Mbps Master Up to 36MHz / Slave Up to 18MHz Master/Slave Standard/Fast mode (100 / 400kHz),ADC Op Amp / Comparator RTC Watchdog,Max. 1 Msps with 12-bit SAR ADC,2 2 1,2 2 2,12-bit8 channels 2 1 1,Function,Description,Spec / Number,HT32F1755/1765/2755 Feature (2/3),28,LVD BOD POR Internal LDO,4 levels : 2.7V 3.0V, 0.1V per level Brown Out Detector voltage : 2.6V Power On Reset : 1.36V VIN = 2.7V 3.6V Normal mode : VOUT = 1.8V / 200mA Low-power mode : VOUT = 1.8V / 100mA,Operating Mode Backup Registers,Run: Typ. 60mA, Max. 72mA VDD=3.3V Deep Sleep 2: Typ. 18mA, Max. 25mA VDD=3.3V General data storage in Backup Domain,ESD/Latch up Operating Temperature,HBM: Human Body Mode MM: Machine Mode, 1,Run, Sleep, Power-down Deep Sleep Mode1, 2 32-bit x 10,ESD HBM: 4KV ESD MM: 300V Latch up: 400mA -40C +85C,IO Ports Package,Max. Port AE15:0 ; Can be configured up to 4 alternate functions (AFIO),33 / 46 / 80 48 / 64 / 100LQFP,Function,Description,Spec / Number,HT32F1755/1765/2755 Feature (3/3),29,HT32F1755 / 1765 / 2755 Peripherals,* CSIF - HT32F2755 Only,30,FMC Block Diagram,31,FMC Features,32,Memory Map,33,Boot Mode,34,Wait State,35,PWRCU Block Diagram,36,PWRCU Features,37,Power Saving Modes,System Control Register (SCR 2),Backup Domain Control Register (BAKCR 3),Backup Domain Control Register (BAKCR 7),38,CKCU Block Diagram (1/4),39,CKCU Block Diagram (2/4),System clock (CK_SYS) sources from HSI, HSE or PLL and up to 144 MHz. HSE Clock Monitor.,40,CKCU Block Diagram (3/4),41,CKCU Block Diagram (4/4),Low Speed clock LSE / LSI For Watchdog Timer (CK_WDT) and Real Time Clock (CK_RTC),42,CKCU Features,43,RSTCU Block Diagram,Three kinds of reset Power on reset, system reset, AHB/APB Unit reset.,44,GPIO Features,45,Default GPIO Pin Configuration,46,AFIO Features,47,100-LQFP Pin Assignment,48,EXTI Block Diagram,49,EXTI Features,50,ADC Block Diagram,Specification 12-bit 8 Channel 1 us Trigger Source Software EXTI Timer DMA,51,OPACMP Features,52,BFTM Block Diagram,53,BFTM Features,54,GPTM Block Diagram,55,GPTM Features,56,MCTM Block Diagram,57,MCTM Features,58,RTC Features,59,WDT Features,60,Communication (1/2),Inter-integrated Circuit (I2C) x 2 Master and Slave mode 100 KHz, 400 KHz, 1 MHz 7-bit and 10-bit addressing mode Serial Peripheral Interface (SPI) x 2 Master and Slave mode Slave : 24 MHz Master : 36 MHz FIFO : 8 levels Universal Synchronous Asynchronous Receiver Transmitter (USART) x 2 UART / USART / IrDA / RS485 4.5 MHz FIFO: 16 levels,61,Communication (2/2),Universal Serial Bus Device Controller (USB) USB 2.0 Full Speed (12 Mbps) 1 control endpoint (EP0) 3 single-buffered Bulk / Interrupt endpoint 4 double-buffered Bulk / Interrupt / Isochronous endpoint 1024 Bytes SRAM Smart Card Interface (SCI) ISO 7816-3 standard CMOS Sensor Interface (CSIF *) Up to 2048 x 2048 resolution Up to 24MHz pixel clock Hardware window capture Sub-sample function,* HT32F2755 Only,62,Agenda,Development Tools,64,Development Tools,Introduction Development Board e-Link32 IDE Keil MDK-ARM IAR EWARM CooCox CoIDE Implementation I: Setup environment,65,Development Tools Introduction,Board,IDE,USB,Serial Wire,ICE,Compiler / Linker Debugger Flash Loader,e-Link32 USB Debug Adapter,HT32 Series Development Board,Software Development,Interface between IDE & Board,Low Cost Fully Function Reference Design,66,Development Board,Complete information for reference design Schematics PCB Layout BOM HT32Fxxxx Development Board User Manual,HT32F1755-1765-2755_DevBoardUserManualv100.pdf,67,5V Power,Serial Wire Debugger,EEPROM,I2C 1,Power Jack,10/20-pin,Buzzer,PWM,ADC,Potentiometer,Holder/3V Battery,VBAT,NOR Flash SD Card,SPI 1,2 DIP Connectors for I/O Extension,50-pin,50-pin,7-pin GPIO,Reset,Power LED,LED x3,System Wakeup,Test Key 1 & 2,HSE,8MHz with socket,LSE,Crystal 32.768KHz,Mini-USB,RS232 (DB9),USART 0,LCD Panel,SPI 0 I2C 0,ESK32-200,USB2.0 FS,HID / BULK / ISO ,Smart Card,SCI (12-pin),CMOS Sensor,CSIF (24-pin),Motor Control,RS232 (DB9) IrDA Transceiver RS485 Transceiver,USART 1,Joystick,5-pin,34-pin,Communication,Storage,ADC / Timer Motor Control,User Interface,Security,Power /Crystal Serial Wire,HT32F1755/1765/2755 DVB,68,Development Tools e-Link32,For software debugging and ICP Flash programming Supports HT32 Series MCUs Serial Wire Debug interface USB Powered Supported IDE Keil MDK-ARM IAR EWARM CooCox CoIDE,69,Keil MDK-ARM,Keil: Tools by ARM Keil MDK-ARM Microcontroller Development Kit Download and Install MDK-ARM Lite Evaluation version, 32 KB ROM limitations For example: mdk454.exe,70,Keil MDK-ARM UI,HT32_Keil-QuickStartv110.pdf,Build & Rebuild,Download,Target Options,File ,Debug,Configuration Wizard,Build Output Window,71,Keil MDK-ARM Configure e-Link32,72,Keil MDK-ARM Debug,73,IAR EWARM,IAR EWARM IAR Embedded Wrokbench for ARM Download KickStart edition of IAR EWARM 32 KB ROM limitation For example: EWARM-KS-CD-6401.exe,74,Install IAR EWARM,Prepare and install EWARM http:/ftp.iar.se/WWWfiles/guides/InstallationGuide.pdf Install e-Link32 IAR Plugin Get the latest version from CD or Holtek website. For example: e-Link32_IAR_Plugin_v125.exe. Install HT32 IAR Support Package (option),75,IAR EWARM UI,HT32_IAR-QuickStartv110.pdf,76,IAR EWARM Configure e-Link32,C:Program FilesHoltek HT32 Seriese-Link32 IAR Plugine-Link32_rdi.dll,77,IAR EWARM Configure e-Link32,78,IAR EWARM Debug,Register window,Disassembly window,C code window,Memory window,Stop Debugging,Download and Debug,79,CooCox CoIDE,CoIDE A new, free and highly-integrated software development environment for ARM Cortex M4, M3 and M0 based microcontrollers Download and Install GCC compiler For example: CoIDE-1.5.0.exe,80,Build & Rebuild,Start Debug,Debug Configuration,Download,Build Messages,CooCox CoIDE UI,HT32_CooCoxCoIDE-QuickStartv100.pdf,81,CooCox CoIDE Configure e-Link32,82,CooCox CoIDE Debug,83,IDE Keil MDK-ARM : mdk460.exe IAR EWARM : EWARM-KS-CD-6401.exe CooCox CoIDE : CoIDE-1.5.0.exe e-Link32 USB Driver e-Link32_USB_Driver_v100a.exe e-Link32 IDE Plug-in e-Link32_Keil_Plugin_v127.exe e-Link32_IAR_Plugin_v125.exe HT32 Support Package (option) HT32_Keil_Package_v104.exe HT32_IAR_Package_v104.exe,Implementation I - Setup environment,84,Implementation I - Setup environment,Target Connect e-Link32 with development board Read SWD information,Software Development,86,Software Development,CMSIS HT32 Firmware Library HT32 USB Device Library RTOS HT32 Flash Programmers Implementation II: First project,87,CMSIS - Introduction,Cortex Microcontroller Software Interface Standard ARM, Chip Vendors, Tools Vendors CMSIS Software Structure User application Tools & middleware CMSIS Core Peripheral Access Layer (CPAL) Middleware Access Layer (MWAL) Device Peripheral Access Layer (DPAL) MCU Control,88,CMSIS - Architecture,89,HT32 Firmware Library Architecture,Application Layer,API Layer,Peripheral Layer,system_ht32f125x.c,ht32f125x_conf.h,ht32f125x_it.h,ht32f125x.h,core_cm3.h,system_ht32f125x.h,ht32f125x_lib.c,ht32f125x_lib.h,ht32f125x_periph.h,ht32f125x_periph.c,ht32f125x_dvb.h,ht32f125x_dvb.c,ht32f125x_board.h,Peripherals,CMSIS,FWLIB,Utilities,USE_HT32F125X_DRIVER,USE_HT32F1253_DVB,main.c,ht32f125x_it.c,90,HT32 Firmware Library Folder,Examples Support for each peripheral Running on HT32 DVB Libraries CMSIS compliant Support for all the peripherals Project Template Empty projects for IDE CooCox CoIDE_Template IAR EWARM Keil MDK_ARM GNU SourceryG+Lite Utilities HT32 DVB configuration,91,HT32 Firmware Library Project,Auto,Built-in,92,HT32 Firmware Library Files,93,Peripherals Initialization,Enable IP clock before initializing CKCU_APBPerip0ClockConfig(CKCU_APBPx, ENABLE); CKCU_APBPerip1ClockConfig(CKCU_APBPx, ENABLE); Declare the Initialization structure EXTI_InitTypeDef EXTI_InitStruct; Fill the parameter EXTI_InitStruct.EXTI_Channel = EXTI_CHANNEL_11; EXTI_InitStruct.EXTI_Debounce = EXTI_DEBOUNCE_DISABLE; EXTI_InitStruct.EXTI_DebounceCnt = 0; EXTI_InitStruct.EXTI_IntType = EXTI_NEGATIVE_EDGE; Initialize peripheral EXTI_Init(,94,Programmers Guide,95,API of Peripheral Driver,96,HT32 USB Device Library,USB Peripheral Driver USB Core Application Layer Class Example HID Virtual COM Mass Storage USB Video Application Note,97,RTOS,Small footprint, several K bytes Multi-tasking process Application Note - ha0288e_HT32F125x_RTOS.pdf,ARM-ARTX IAR PowerPac FreeRTOS CoOS uC/OS2,Create 4 Tasks LED USART Buttons Buzzer,Supported OS,Demo,Example Source Code,98,Implementation II First Project,Step by Step for your first project Functions LED Blinky Button Press Peripherals NVIC SysTick CKCU GPIO AFIO EXTI Modify from project_template,99,Implementation II First Project,Step1: Preparation Copy project_template as your project (keep the same path) Clean up project_template Build, download and debug mode Step2: Control LED AFIO, GPIO Step3: Wait Button press AFIO, GPIO, NVIC, EXTI Step4: LED Blinky AFIO, GPIO, NVIC, SysTick,100,Implementation II First Project,Step1: Preparation (1/2) Copy project_template as your project (keep the same path),101,Implementation II First Project,Step1: Preparation (2/2) Clean up project_template (main.c),102,Implementation II First Project,Step2: Control LED PA15, PB0, PB1 (1/6) AFIO, GPIO Enable IP Clock of AFIO, GPIOA, and GPIOB Set PA15, PB0, and PB1 as GPIO output mode Set and Clear PA15, PB0, and PB1 IDE Operations Debug mode Breakpoint Single Step,103,Implementation II First Project,Step2: Control LED PA15, PB0, PB1 (2/6) Enable IP Clock of AFIO, GPIOA, and GPIOB main.c - CKCU_Configuration() CKCU_APBEN0_AFIO CKCU_APBEN0_PA CKCU_APBEN0_PB,104,Implementation II First Project,Step2: Control LED PA15, PB0, PB1 (3/6) Set PA15, PB0, and PB1 as GPIO output mode main.c - GPIO_Configuration() GPIO_DirectionConfig(GPIOA, GPIO_PIN_15, GPIO_DIR_OUT); GPIO_DirectionConfig(GPIOB, GPIO_PIN_0 | GPIO_PIN_1, GPIO_DIR_OUT);,105,Implementation II First Project,Step2: Control LED PA15, PB0, PB1 (4/6) Set PA15, PB0, and PB1 main.c - GPIO_Configuration() GPIO_SetOutBits(GPIOA, GPIO_PIN_15); GPIO_SetOutBits(GPIOB, GPIO_PIN_0 | GPIO_PIN_1);,106,Implementation II First Project,Step2: Control LED PA15, PB0, PB1 (5/6) Clear PA15, PB0, and PB1 main.c - main() GPIO_ClearOutBits(GPIOA,GPIO_PIN_15); GPIO_ClearOutBits(GPIOB,GPIO_PIN_0); GPIO_ClearOutBits(GPIOB,GPIO_PIN_1);,107,Implementation II First Project,Step2: Control LED PA15, PB0, PB1 (6/6) IDE Operations: Debug mode, Breakpoint Single Step,108,Implementation II First Project,Step3: Wait Button press PE10 (1/10) AFIO, GPIO, NVIC, EXTI Add software flag Enable IP Clock of AFIO, GPIOE, and EXTI Set PE10 as GPIO input mode Enable input function of PE10 Configure EXTI EXTI interrupt service routine,109,Implementation II First Project,Step3: Wait Button press PE10 (2/10) Add software flag main.c vu32 uKeyFlag = 0;,110,Implementation II First Project,Step3: Wait Button press PE10 (3/10) Check software flag in main function main.c - main() while(uKeyFlag = 0); GPIO_SetOutBits(GPIOA, GPIO_PIN_15); GPIO_SetOutBits(GPIOB, GPIO_PIN_0 | GPIO_PIN_1);,111,Implementation II First Project,Step3: Wait Button press PE10 (4/10) Enable IP Clock of AFIO, GPIOE, and EXTI main.c - CKCU_Configuration() CKCU_APBEN0_AFIO CKCU_APBEN0_PE CKCU_APBEN0_EXTI,112,Implementation II First Project,Step3: Wait Button press PE10 (5/10) Set PE10 as GPIO input mode Enable input function of PE10 main.c - GPIO_Configuration() GPIO_DirectionConfig(GPIOE, GPIO_PIN_10, GPIO_DIR_IN); GPIO_InputConfig(GPIOE, GPIO_PIN_10, ENABLE);,113,Implementation II First Project,Step3: Wait Button press PE10 (6/10) Configure EXTI main.c void EXTI_Configuration(void);,114,Implementation II First Project,Step3: Wait Button press PE10 (7/10) Configure EXTI main.c void EXTI_Configuration(void) EXTI_InitTypeDef EXTI_InitStruct; EXTI_InitStruct.EXTI_Channel = EXTI_CHANNEL_10; EXTI_InitStruct.EXTI_Debounce = EXTI_DEBOUNCE_ENABLE; EXTI_InitStruct.EXTI_DebounceCnt = 72000; EXTI_InitStruct.EXTI_IntType = EXTI_NEGATIVE_EDGE; EXTI_Init( ,115,Implementation II First Project,Step3: Wait Button press PE10 (8/10) Configure EXTI,116,Implementation II First Project,Step3: Wait Button press PE10 (9/10) Configure EXTI main.c - main() EXTI_Configuration();,117,Implementation II First Project,Step3: Wait Button press PE10 (10/10) EXTI interrupt service routine ht32f175x_275x_it.c - EXTI10_IRQHandler extern vu32 uKeyFlag; uKeyFlag = 1; EXTI_ClearEdgeFlag(EXTI_CHANNEL_10);,118,Implementation II First Project,Step4: LED Blinky AFIO, GPIO, NVIC, SysTick Configure SysTick SysTick interrupt service routine. Debug Tips Variable address (map) Watch / Memory windows,119,Implementation II First Project,Step4: LED Blinky (1/4) Configure SysTick main.c - main() SYSTICK_ClockSourceConfig(SYSTICK_SRC_STCLK); SYSTICK_SetReloadValue(9000000); SYSTICK_IntConfig(ENABLE); SYSTICK_CounterCmd(SYSTICK_COUNTER_ENABLE);,120,Implementation II First Project,Step4: LED Blinky (2/4) Configure SysTick,121,Implementation II First Project,Step4: LED Blinky (3/4) SysTick interrupt service routine ht32f175x_275x_it.c - SysTick_Handler() vs32 uCountFlag; void SysTick_Handler(void) if(uCountFlag = 0) uCountFlag = 1; G