STK672-080.pdf

Ordering number : ENN6507A 52004TN (OT) / 22002TN (OT) No. 6507-1/17 Overview The STK672-080 is a stepping motor driver hybrid IC that uses power MOSFETs in the output stage. It includes a built-in microstepping controller and is based on a unipolar constant-current PWM system. The STK672-080 supports application simplification and standardization by providing a built-in 4 phase distribution stepping motor controller. It supports five excitation methods: 2 phase, 1-2 phase, W1-2 phase, 2W1-2 phase, and 4W1-2 phase excitations, and can provide control of the basic stepping angle of the stepping motor divided into 1/16 step units. It also allows the motor speed to be controlled with only a clock signal. The use of this hybrid IC allows designers to implement systems that provide high motor torques, low vibration levels, low noise, fast response, and high-efficiency drive. Compared to the earlier SANYO STK672-050, the STK672-080 features a significantly smaller package for easier mounting in end products. Applications Facsimile stepping motor drive (send and receive) Paper feed and optical system stepping motor drive in copiers Laser printer drum drive Printer carriage stepping motor drive X-Y plotter pen drive Other stepping motor applications Features Can implement stepping motor drive systems simply by providing a DC power supply and a clock pulse generator. One of five drive types can be selected with the drive mode settings (M1, M2, and M3) 2 phase excitation drive 1-2 phase excitation drive W1-2 phase excitation drive 2W1-2 phase excitation drive 4W1-2 phase excitation drive Phase retention even if excitation is switched. The MOI phase origin monitor pin is provided. The CLK input counter block can be selected to be one of the following by the high/low setting of the M3 input pin. Rising edge only Both rising and falling edges Note*: Conditions: VCC1 = 24 V, IOH= 2.0 A, 2W1-2 excitation mode. Continued on next page. Package Dimensions unit: mm 4186 115 46.6 41.2 12.7 25.5 (6.6) 142.0=28 3.6 0.52.0 8.5 4.0 0.4 2.9 1.0 STK672-080 STK672-080 SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN Stepping Motor Driver (Sine Wave Drive) Output Current: 2.8 A (No Heat Sink*) Unipolar constant-current chopper (external excitation PWM) circuit with built-in microstepping controller Thick-Film Hybrid IC Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircrafts control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. The CLK input pin include built-in malfunction prevention circuits for external pulse noise. Both an ENABLE and RESET pin are provided as Schmitt trigger inputs with built-in 20 k (typical) pull- up resistors. No audible noise is generated by the differences in the time constant between phases A and B when the motor position is held fixed due to the adoption of external excitation. The reference voltage Vref can be set to any level between 0 and 1/2 VCC2. This allows the STK672-080 to provide microstepping operation even for small motor currents. Provides a wide range of operatng supply voltage required for external excitation PWM drive (VCC1 = 10 to 45 V). Current detection resistor (0.15 ) built-in the hybrid IC itself. Power MOSFETs adopted for low drive loss Provides a motor output drive current of IOH= 2.8 A (When Tc = 105C). No. 6507-2/17 STK672-080 ParameterSymbolConditionsRatingsUnit Maximum supply voltage1VCC1 maxNo signal52V Maximum supply voltage2VCC2 maxNo signal0.3 to +7.0V Input voltageVINmaxLogic input pins0.3 to +7.0V Phase output currentIOHmax0.5 s, 1 pulse, when VCC1 applied.3.3A Repeatable avalanche currentEar max30mJ Power lossPd maxc-a = 08W Operating substrate temperatureTc max105C Junction temperatureTj max150C Storage temperatureTstg40 to +125C Specifications Absolute Maximum Ratings at Tc = 25C ParameterSymbolConditionsRatingsUnit Supply voltage1VCC1With input signals present10 to 45V Supply voltage2VCC2With input signals present5 5%V Input voltageVIH0 to VCC2V Phase driver voltage handlingVDSSTr1, 2, 3, and 4 (the A, A, B, and B outputs)100 (min)V Phase current 1IOH1Tc = 105C, CLK 200 Hz2.8A Phase current 2IOH2Tc = 80C, CLK 200 Hz3A Allowable Operating Ranges at Ta = 25C ParameterSymbolConditions Ratings Unit mintypmax Control supply currentICCPin 6 input, with ENABLE pin held low.2.114mA Output saturation voltageVsatRL= 12 0.651V Average output currentIo aveLoad: R = 3.5 W/L = 3.8 mH per phase0.4450.50.56A FET diode Forward voltageVdfIf = 1 A11.5V Control Inputs Input voltage VIHExcept for the Vref pin4V VILExcept for the Vref pin1V Input current IIHExcept for the Vref pin0110A IILExcept for the Vref pin125250510A Vref Input Pin Input voltageVIPin 702.5V Input currentIIPin 7, 2.5-V input330415545A Control Outputs Output voltage VOHI = 3 mA, pin MOI2.4V VOLI = +3 mA, pin MOI0.4V Electrical Characteristics at Tc = 25C, VCC1 = 24 V, VCC2 = 5 V Continued on next page. Continued from preceding page. No. 6507-3/17 STK672-080 ParameterSymbolConditions Ratings Unit mintypmax Current Distribution Ratio (AB) 2W1-2, W1-2, 1-2Vref = 1/8100% 2W1-2, W1-2Vref = 2/892% 2W1-2Vref = 3/883% 2W1-2, W1-2, 1-2Vref = 4/871% 2W1-2Vref = 5/855% 2W1-2, W1-2Vref = 6/840% 2W1-2Vref = 7/821% 2Vref100% PWM frequencyfc374757kHz Continued from preceding page. Note: A constant-voltage power supply must be used. The design target value is shown for the current distribution ratio. 14 13 15 12 11 10 9 8 675432 + + 1 M1 M2 CWB CLOCK Excitation mode control Excitation state monitor CR oscillatorPWM control Phase advance counter Current distribution ratio switching Phase excitation drive signal generation Reference clock generation Pseudo-sine wave generator Raising edge/falling edge detection and switching M3 RESET MoI ENABLE SUB PG BBBABAVref VCC2 A13256 Internal Block Diagram No. 6507-4/17 STK672-080 Test Circuit Diagrams No. 6507-5/17 STK672-080 11 8 9 7 13 1 2 3 4 5 A RL AB B BB 6 + VCC2 VCC2 STK672-080 Start Vref=2.5V V 1 2 3 4 5 A AB B BB 6 VCC1 STK672-080 V A A13257 A13258 VsatVdf IIH, IILloave, Icc, fc To measuring Io ave: With SW1 set to the b position, input Vref and switch SW2. To measuring fc: With SW1 set to the a position, set Vref to 0 V, and switch SW3. To measuring Icc: Set the ENABLE pin low. + Start 11 8 9 7 13 1 2 3 4 5 A ab ab AB B SW2 SW3 SW1 BB 6 15 VCC2 Vref ENABLE VCC1 VCC1 STK672-080 A13260 8 1 6 A A 2.5V VCC2 M1 STK672-080 A13259 9 M2 12 M3 11 CLK 10 CWB 14 13 RESET 15 ENABLE 7 Vref A A fc IIL IIH No. 6507-6/17 STK672-080 7 5 A Two-phase stepping motor AB 6 14148 14149 141412 15 11 13 10 14 + + VCC2=5V VCC2=5V SG 100F or higher PG Vref Ro1 Ro2 VCC2=5V CLK ENABLE CBW Vf 0.3V RESET MoI VCC1=10V to 45V STK672-080 A13261 B BB RoX 4 3 2 1 Ioave IOLIOH 0A Motor current waveform A13262 Simplified power-on reset circuit (This circuit cannot be used to detect drops in the power-supply voltage.) A value of about 100 is recommended for RO2 to minimize the influence of the Vref pin internal impedance, which is 6 k. ROX: The input impedance is 6 k 30%. Power-on reset The application must perform a power-on reset operation when VCC2 power is first applied to this hybrid IC. Application circuit that used 2W1-2 phase excitation (microstepping operation) mode. Setting the Motor Current The motor current IOHis set by the Vref voltage on the hybrid IC pin 7. The following formula gives the relationship between IOHand Vref. ROX = (RO2 6 k) (RO2 + 6 k)(1) Vref = VCC2 ROX (RO1 + ROX) (2) 1Vref IOH= (3) kRS K: 4.7 (Voltage division ratio), Rs: 0.15 (The hybrid ICs internal current detection resistor (precision: 3%) Applications can use motor currents from the current (0.05 to 0.1 A) set by the duty of the frequency set by the oscillator up to the limit of the allowable operating range, IOH= 2.8 A Function Table M20011 M1 0101 Phase switching clock edge timing M3 12 phase excitation1-2 phase excitationW1-2 phase excitation2W1-2 phase excitationRising edge only 01-2 phase excitationW1-2 phase excitation2W1-2 phase excitation4W1-2 phase excitationRising and falling edges ForwardReverse CWB01 ENABLEMotor current is cut off when low RESETActive low No. 6507-7/17 STK672-080 D1 Rs L2 VCC1 IOFF L1 MOSFET Enable Divider Latch circuit CR oscillator Current divider Noise filter A (control signal) AND Q S R 800kHz 45kHz Vref A=1 + ION A13263 Functional Description External Excitation Chopper Drive Block Description Since this hybrid IC adopts an external excitation method, no external oscillator circuit is required. When a high level is input to A in the basic driver block circuit shown in the figure and the MOSFET is turned on, the comparator + input will go low and the comparator output will go low. Since a set signal with the PWM period will be input, the Q output will go high, and the MOSFET will be turned on as its initial value. The current IONflowing in the MOSFET passes through L1 and generates a potential difference in Rs. Then, when the Rs potential and the Vref potential become the same, the comparator output will invert, and the reset signal Q output will invert to the low level. Then, the MOSFET will be turned off and the energy stored in L1 will be induced in L2 and the current IOFFwill be regenerated to the power supply. This state will be maintained until the time when an input to the latch circuit set pin occurs. In this manner, the Q output is turned off and on repeatedly by the reset and set signals, thus implementing constant current control. The resistor and capacitor on the comparator input are spike removal circuit elements and synchronize with the PWM frequency. Since this hybrid IC uses a fixed frequency due to the external excitation method and at the same time also adopts a synchronized PWM technique, it can suppress the noise associated with holding a position when the motor is locked. Driver Block Basic Circuit Structure Input Pin Functions Pin No.SymbolFunctionPin circuit type 11CLKPhase switching clockBuilt-in pull-up resistor CMOS Schmitt trigger input 10CWBRotation direction setting (CW/CCW)Built-in pull-up resistor CMOS Schmitt trigger input 15ENABLEOutput cutoffBuilt-in pull-up resistor CMOS Schmitt trigger input 8, 9, 12M1, M2, M3Excitation mode settingBuilt-in pull-up resistor CMOS Schmitt trigger input 13RESETSystem resetBuilt-in pull-up resistor CMOS Schmitt trigger input 7VrefCurrent settingInput impedance 6 k (typ.) 30% Input Signal Functions and Timing CLK (phase switching clock) Input frequency range: DC to 50 kHz Minimum pulse width: 10 s Duty: 40 to 60% (However, the minimum pulse width takes precedence when M3 is high.) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Built-in multi-stage noise rejection circuit Function When M3 is high or open: The phase excited (driven) is advanced one step on each CLK rising edge. When M3 is low: The phase is advanced one step by both rising and falling edges, for a total of two steps per cycle. CWB (Method for setting the rotation direction) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Function When CWB is low: The motor turns in the clockwise direction. When CWB is high: The motor turns in the counterclockwise direction. Notes: When M3 is low, the CWB input must not be changed for about 6.25 s before or after a rising or falling edge on the CLK input. ENABLE (Controls the on/off state of the A, A, B, and B excitation drive outputs and selects either operating or hold as the internal state of this hybrid IC.) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Function When ENABLE is high or open: Normal operating state When ENABLE is low: This hybrid IC goes to the hold state and excitation drive output (motor current) is forcibly turned off. In this mode, the hybrid IC system clock is stopped and no inputs other than the reset input have any effect on the hybrid IC state. CLK Input Acquisition Timing (M3 = Low) No. 6507-8/17 STK672-080 CLK input System clock Phase excitation counter clock Control output timing Excitation counter up/down Control output switching timing A13264 No. 6507-9/17 STK672-080 Output Pin Functions Pin No.SymbolFunctionPin circuit type 14MoIPhase excitation monitorStandard CMOS structure M1, M2, and M3 (Excitation mode and CLK input edge timing selection) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Valid mode setting timing: Applications must not change the mode in the period 5 s before or after a CLK signal rising or falling edge. Mode Setting Acquisition Timing M20011 M1 0101 Phase switching clock edge timing M3 12 phase excitation1-2 phase excitationW1-2 phase excitation2W1-2 phase excitationRising edge only 01-2 phase excitationW1-2 phase excitation2W1-2 phase excitation4W1-2 phase excitationRising and falling edges CLK input System clock M1 to M3 Mode switching timing Excitation counter up/down Mode setting Mode switching clock Hybrid IC internal setting state Phase excitation clock A13265 Function: RESET (Resets all parts of the system.) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Function All circuit states are set to their initial values by setting the RESET pin low. (Note that the pulse width must be at least 10 s.) At this time, the A and B phases are set to their origin, regardless of the excitation mode. The output current goes to about 71% after the reset is released. Notes: When power is first applied to this hybrid IC, Vref must be established by applying a reset. Applications must apply a power on reset when the VCC2 power supply is first applied. Vref (Sets the current level used as the reference for constant-current detection.) Pin circuit type: Analog input structure Function Constant-current control can be applied to the motor excitation current at 100% of the rated current by applying a voltage less than the control system power supply voltage VCC2 minus 2.5 V. Applications can apply constant-current control proportional to the Vref voltage, with this value of 2.5 V as the upper limit. Output Signal Functions and Timing A, A, B, and B (Motor phase excitation outputs) Function In the 4 phase and 2 phase excitation modes, a 3.75 s (typical) interval is set up between the A and A and B and B output signal transition times. Phase States During Excitation Switching Excitation phases before and after excitation mode switching No. 6507-10/17 STK672-080 B2424 27 28 31 3 4 5 8 11 12 15 16 19 20 25 A A A 0 16 17 1 A A B B B 24 25 26 27 28 2930 31 0 1 23 45 6 7 8 9 10 11 12 13 14 15 1617 18 19 20 21 24 26 2830 0 24 6 8 10 12 14 16 18 20 22 22 23 A A B B8 9 12 4 28 2020 24 28 0 4 8 12 16 B24 26 28 30 A A A 0 16 18 20 22 24 28 0 4 8 12 16 20 20 28 4 1220 28 4 0 12 16 16 18 20 22 24 25 27 29 311 3 5 7 923 228 24 2010 26 1812 16 14 2830 6 4 2 0 1121 1319 1517 24 28 0 4 8 12 16 20 26 28 30 0 2 4 6 8 10 12 14 2 4 6 B B A B A B 302 266 10 14 22 18 A B A B A B A B B A A B B8 10 12 14 12 4 28 20 2W1-2 phase 2 phase W1-2 phase 2 phase 1-2 phase 2 phase 2 phase 1-2 phase Excitation phase according to the first clock input pulse after changing the excitation mode setting (M1 to M2) Excitation phase immediately before setting the excitation mode 2W1-2 phase 1-2 phase W1-2 phase 1-2 phase 1-2 phase W1-2 phase 2 phase W1-2 phase2 phase 2W1-2 phase 2W1-2 phase W1-2 phase W1-2 phase 2W1-2 phase 1-2 phase 2W1-2 phase 24 0 8 16 20 22 30 284 1220 14 6 284 12 A B A B 29 1 25 5 9 13 21 24 28 0 4 8 12 16 20 17 A B A B 29 5 13 21 28 20 4 12 17 A B A B A13266 No. 6507-11/17 STK672-080 Excitation phases before and after excitation mode switching B24 23 24 25 2829 01 4 5 8 9 12 13 16 17 20 21 AA A 0 1615 31 A A B B B 24 25 26 27 28 2930 31 0 1 23 45 6 7 8 9 10 11 12 13 14 15 1617 18 19 20 21 24 26 2830 0 24 6 8 10 12 14 16 18 20 22 22 23 A A B B8 7 12 4 28 2020 24 28 0 4 8 12 16 B24 30 A A A 0 16 22 24 28 0 4 8 12 16 20 20 28 4 12 16 28 24 20 0 4 12 16 18 20 22 24 25 27 29 311 3 5 7 923 228 24 2010 26 1812 16 14 2830 6 4 2 0 1121 1319 1517 24 28 0 4 8 12 16 20 26 28 30 0 2 4 6 8 10 12 14 6 B B A B A B 302 266 10 14 22 18 A B A B A B A B B A A B B8 14 12 4 28 20 24 0 8 16 20 26 2 10 284 1220 284 1220 18 284 12 A B A B 30 3 27 7 11 15 23 24 28 0 4 8 12 16 20 19 A B A B 27 3 11 19 A B A B A13267 2W1-2 phase 2 phase W1-2 phase 2 phase 1-2 phase 2 phase 2 phase 1-2 phase 2W1-2 phase 1-2 phase W1-2 phase 1-2 phase 1-2 phase W1-2 phase 2 phase W1-2 phase2 phase 2W1-2 phase 2W1-2 phase W1-2 phase W1-2 phase 2W1-2 phase 1-2 phase 2W1-2 phase No. 6507-12/17 STK672-080 M10 M20 M3 RESET CWB CLK MOI 0 1 2 Phase Excitation Timing Chart (M3=1)1-2 Phase Excitation Timing Chart (M3=1) 2W1-2 Phase Excitation Timing Chart (M3=1)W1-2 Phase Excitation Timing Chart (M3=1) M1 1 0 1 0 M20 M3 RESET CWB CLK MOI M1 1 1 0 M20 M3 RESET CWB CLK MOI 0 M1 1 0 1 0 1 0 M2 M3 RESET CWB CLK MOI MOSFET Gate Signal Comparator Reterence Voltage A A B B Vref A Vref B 100%