外文翻译----利用梳状滤波器设计多速率滤波器.docx

附录AMultirate Filter Designs Using Comb FiltersSHUN1 CHU, MEMBER, IEEE, AND C. SIDNEY BURRUS, FELLOW, IEEEAbstract-Results on multistage multirate digital filter design indicate most of the stages can be designed to control aliasing with only slight regard for the passband which is controlled by a single stage compensator. Because of this, the aliasing controlling stages can be made very simple. This paper considers comb filter structures for decimators and interpolators in multistage structures. Design procedures are developed and examples shown that have a very low multiplication rate, very few filter coefficients, low storage requirements, and a simple structure. IntroductionMultirate filters are members of a class which has different sampling rates in various stages of the filtering operation. This class of filters includes decimators, interpolators, and narrow-band low-pass filters implemented with decimation, low-pass filtering, and interpolation. A multistage implementation of these filters has the sample rate changed in several steps where each step is a combined filtering and sample rate change operation. Crochiere and Rabiner 1-4 gave the standard multistage design method for these filters which has each stage as a low-pass filter where one optimally chooses the decimation(or interpolation) ratio at each stage. A design method was presented in 5 which uses a different design criterion for each stage. It only requires that each stage have enough aliasing attenuation but has no passband specifications.Using the design described in 5 with no passband specifications for each stage allows simple filters to be employed and gives a satisfactory frequency response. Let H(z) and D be the transfer function and decimation ratio of one stage of a multistage decimator. We propose to design H(z) such that H(z) = f(z)g(zD). In the implementation, by the commutative rule 5, the transfer function g(zD) can be implemented at the lower rate (after decimation) as g(z). This implementation reduces the filter order, storage requirement, and the arithmetic.In this paper, to simplify arithmetic, further requirements are put on H(z) to allow only simple integer coefficients. This is feasible because there are no passband specifications on the frequency response. A cascade of comb filters is a particular case of these filters where the coefficients are only 1or-1 and, therefore, no multiplications are needed. Hogenauer 6 had also used a cascade of comb filters as a one-stage decimator or interpolator but with a limited frequency-response characteristic. Here the cascade of comb filters is used as one stage of a multistage multirate filter with just the right frequency response. More comb filter structures are easily derived using the commutative rule.The FIR filter optimizing procedure used in this paper minimizes the Chebyshev norm of the approximation error and this is done using the Remez exchange algorithm. The IIR filter optimizing procedure used minimizes the lp error norm which approaches the Chebyshev norm when p is large.The New Multistage Multirate Digital Filter Design MethodIn a paper for limited range DFT computation using decimation 7, Cooley and Winograd pointed out that the passband response of a decimator can be neglected and be taken care of after decimation. A multistage multirate digital filter design method which has no passband specification but using passband and stopband gain difference as an aliasing attenuation criterion for each stage is described in 5. The design method and equations used in that paper which are needed for the comb filter structure are outlined in this section.The commutative rule introduced in 5 states that the filter structures in Fig. l(a) and (b) are equivalent. It means that a filter can commute with a rate changing switch provided that the filter has its transfer function changed from H(z) to H(zD) or vice versa. Fig. 1 illustrates the case for decimation, and it is also true for interpolation. This rule is very useful in finding equivalent multirate filter structures and in deriving the transfer function of a multistage multirate filter.For example, Fig. 2(a) shows the filter structure of a multistage decimator where frk, k = 0, 1, . . . , K, is the sampling rate at each stage, and a one-stage equivalent decimator shown in Fig. 2(b) is found by repeatedly applying the commutative rule to move the latter stages forward. From the one-stage equivalent, it is clear that the transfer function and frequency response of the multistage decimator are (1)and (2)where D = D1D2 . . . Dk. The filtering function of Hc(z) does not involve a sampling rate change. It is used to compensate the passband frequency responses of previous stages, and hence, is called the compensator.Each decimation stage is designed successively. At the time of designing the i th stage filter, all the previous i-1 stages have already been designed and the transfer functions known. The requirement on Hi(z) is that the composite frequency response HDi (w) of the first stage to the i th stage have enough aliasing attenuation where (3)referenced to fr(i- 1) = 1. Enough aliasing attenuation means that those frequency components which will alias into the passband at the current decimation process will have adequate attenuation with respect to the corresponding passband components. Fig. 3 shows an example frequency response of HDi (w) which has an aliasing attenuation exceeding 60 dB. In Fig. 3, the passband response is repeated in the stopbands but has been moved down by 60dB. They are used as the atttenuation bounds for the stopbands. If the stopband response is below these bounds, it will have enough aliasing attenuation.The overall filter frequency response is Hc(w)HDK( w/DK) referenced to frK = 1. The design of the compensator transfer function is to make the overall frequency response approximate one in the passband. The frequency-response error in the passband is (4)for To give attenuation to the first band that will alias to the transition band, it is required that for , or equivalently,for . The frequency bandcan be considered as the stopband of the compensator and the frequency-response error is (5)for . Equations (4) and (5) can be combined to give an error function of (6)and , which is the error weighting of the stopband with respect to the passband. The optimal HC(z) is obtained by minimizing the error norm |E| of (6). The solution depends on the definition of the norm.The multistage interpolator design is the same as the multistage decimator design but with the filter structure reversed.The multirate low-pass filter structure is a multistage decimator followed by a multistage interpolator and, in between, there is a compensator operated at the lowest sampling rate with no rate change. If the aliasing attenuation requirement for the decimator is the same as the imaging attenuation requirement for the interpolator, the design of the multistage decimator part and that of the interpolator part can be the same. The overall frequency response is (9)where (10)Hi(w) is the frequency response of each decimator (or interpolator) stage and “mod” means a modulo operation. The frequency response of (9) is the output baseband response due to the whole input in terms of the input frequency as in the case of decimator. It is also the output response due to the baseband input in terms of the output frequency as in the case of interpolator.In the multirate low-pass filter design, each decimation or interpolation stage design is the same as that in a multistage decimator design. The compensator is to give the desired frequency response in the baseband where the baseband is the frequency band that never aliases. Its design is to minimize |E| of (6) with the weighting and desired functions given byIn the case where there is not a full decimation, i.e., referenced to frK =1, there is a stopband for the compensator design. The transition region can also be viewed as the stopband of the compensator with requirement to limit the transition region aliasing.Comb filter structures as decimators or interpolatorsThis section exploits some simple efficient filter structures which can be used in the decimation or interpolation stages of the multistage multirate filter. The requirement on these filters is that they have enough aliasing attenuation such as shown in the example frequency response of Fig. 3. Since the operation and structure of an interpolator are the duals of a decimator, most explanation in this section will be for the decimator case only. Extension to the interpolator case is simple and straightforward.Let H(z) and D be the transfer function and decimation ratio for one stage of a multistage decimator. The filter structure is shown in Fig. 4(a). One method to make the filter efficient is to design H(z) such that it has the form (13)and the factor g(zD) can be implemented at the lower rate as g(z) as shown in Fig. 4(b). By this implementation, a high-order H(z) can be implemented at the low rate as a low-order filter. The arithmetic rate, number of filter coefficients, and number of registers used are, therefore, reduced. Further improvement in arithmetic rate can be achieved by simplifying the filter coefficients of f(z) and g(z) in (13) to be simple integers and using additions instead of multiplications.One example of this kind of filter is a cascade of comb filters. We will show some filter structures first and discuss the filter operations in the next section.A comb filter of length D is an FIR filter with all D coefficients equal to one. The transfer function of this comb filter is (14)A comb filter with length D followed by decimation with a ratio D is shown in Fig. 5(a). The commutative rule can be applied to the numerator to get the structure of Fig. 5(b).The new comb decimator structure needs two registers, one addition at the high rate, and one addition at the low rate regardless of the decimation ratio D, i.e., the filter length.The comb interpolator structure is shown in Fig. 5(c). It is the reverse of the decimator structure with the sampler replaced by a zero padder. The realization of the transfer function l/(1-z-l) is an accumulator. Since the accumulator has D-1 out of every D inputs as zero, it can take advantage of this to accumulate only once for every D inputs. This is equivalent to operating the accumulator at the lower rate and each output is used D times at the higher rate. When the accumulator is moved to the lower rate stage, it cancels the (1- z-1) section and leaves a sample and hold switch alone as a comb interpolator, as shown in Fig. 5(d). To distinguish the sample and hold switch from the sampling switch of the decimator and to indicate the sampling rate increase after a sample and hold switch, the sample and hold switch is represented by a normally closed switch. The commutative rule can be applied across a sample and hold switch since it applies when there is a rate change.A single comb filter generally will not give enough stopband attenuation, however, cascaded comb filters can often meet requirements. Cascading M length-D comb filters will have a transfer function (15)Fig. 6(a) shows a comb decimator with M length-D comb filters in cascade where all the: accumulators are cascaded before the sampler and all the (1-z-1) sections are cascaded after the sampler. When the reverse of the structure of Fig. 6(a) is used as an interpolator, one of the comb filters can be realized as a sample and hold switch. This interpolator structure is shown in Fig. 6(b). In a multistage decimator design, a latter stage usually needs more comb filters in cascade to give adequate stopband attenuation because of the relatively wider stopband(s) and narrower transition region. Fig. 7(a) shows an equivalent three-stage comb decimator structure. The first, second, and the third stages have three, four, and five length-D1, length-D2, and length-D3, comb filters in cascade, respectively. Fig. 7(b) shows the corresponding equivalent comb interpolator structure using sample and hold switches. These equivalent structures are obtained by applying the commutative rule. Because of the propagation of the (l-z-l) section, some (l/(1-z-l) sections and (l- z-1)sections have canceled each other. This multistage comb filter structure is called a merged structure.附录B利用梳状滤波器设计多速率滤波器摘要-多级多速率数字滤波器设计成果表明大多数阶段可以被用来控制抗锯齿，只有轻微的通频带由一个单一的阶段补偿。正因为如此，抗锯齿控制阶段可以很简单。本文认为，梳状滤波器结构可以设计成decimators和interpolators多级结构。设计程序的开发和事例表明，有繁殖率非常低，只有极少数滤波器系数，低存储需求，以及简单的结构。绪论多速率滤波器的成员，其中一类在各个阶段的过滤操作具有不同的采样率。这一级别的过滤器包括decimators，interpolators，和窄带低通滤波器实施抽取，低通滤波和插值。一个多执行这些过滤器的采样率改变了若干步骤，每个步骤是合并过滤和采样率的变化作业。Crochiere和Rabiner 1-4的标准多了设计方法，这些过滤器而每个阶段作为一个低通滤波器在一个最佳的选择抽取（或内插法）的比例在每一阶段。一种设计方法是在5采用不同的设计标准，每一个阶段。它不仅要求每个阶段有足够的抗锯齿衰减，但没有通规格。使用中所描述的设计5没有通规格的每一个阶段可以简单的过滤器，采用并给出了一个令人满意的频率响应。设H(z)和D是传递函数和抽取一个阶段比一个多decimator。我们建议设计的H(z)等认为H(z)= F(z)*g(zD)。在执行时，由交换规则5，转移函数g(zD)可以实现在较低的利率（后抽取）为g(z)的。这降低了过滤器执行命令，存储要求，算术。本文简化算法，提出了进一步要求的H(z)的，只允许简单的整数系数。这是可行的，因为没有通规格的频率响应。一连串梳状滤波器是一种特定情况下，这些过滤器的系数只有1或者-1 ，因此，没有乘法是必要的。 Hogenauer 6也采用了级联梳状滤波器作为一期decimator或插值，但有限的频率响应特性。在这里，级联梳状滤波器是用来作为一个阶段的多级多速率滤波器的权利与公正的频率响应。梳状滤波器结构更容易产生利用交换规则。FIR滤波器的优化程序，本文件中使用的切比雪夫准则最小的逼近误差，这是使用雷米兹交换算法。IIR滤波器的优化程序，最大限度地减少使用规范低压错误做法的切比雪夫时， p是规范。新型多级多速率数字滤波器的设计方法 在一份文件中对有限范围的DFT计算使用抽取7 ，利和维诺格拉德指出通响应decimator可以忽略不计，并得到照顾后抽取。多级多速率数字滤波器的设计方法，没有通规范，但使用通和阻增益差异作为走样衰减标准的每个阶段中所描述5 。的设计方法和公式中所用文件，该文件所需要的梳状滤波器结构本节概述。 交换规则的介绍 5 指出，过滤器结构图。1(a)和(b)是相同的。这意味着，一个过滤器可以改判率变化与交换机的过滤提供了其传递函数的变化从H (z)至H(zD)，反之亦然。图1显示的情况抽取，也是真正的插值。这条规则是非常有用的在寻找相当于多过滤器的结构和所产生的传递函数的多级多速率滤波器。例如，图2(a)显示了过滤器结构的多级decimator。图中,frk= 0，1，K，是采样率在每一个阶段，和一阶段相当于decimator显示图2(b)发现的反复运用移动交换规则后期向前发展。从一期当量，可以清楚地看到，传递函数和频率响应的是多级decimator。 (1) (2)其中D = D1,D2, Dk。过滤功能HC(z)的不涉及采样率的变化。它是用来补偿通频率响应前阶段，因此，所谓的补偿。每个阶段的目的是抽取先后。当时设计的I阶段过滤器，所有以前的i-1阶段已经设计和传递函数众所周知的。要求高科技Hi(z)的是，在综合频率响应HDi(W)的第一阶段至I次阶段有足够的混淆在衰减 (3)参照fr（i-1）= 1 。足够的抗锯齿衰减意味着这些高频成分将别名纳入通目前抽取过程将有足够的衰减对相应的通元件。图3显示一个例子频率响应的发展行动HDi(w)，其中有一个别名衰减超过60分贝。图3通响应中重复stopbands，但已被移至下跌六零分贝。它们被用来作为atttenuation和stopbands的边界。如果阻响应低于这些跨越，它将有足够的抗锯齿衰减。 总过滤器的频率响应是Hc(w)HDK( w/DK)。参照frK = 1 。设计补偿传递函数是使总的频率响应近似一个在通频带。频率响应误差是 (4)对于为了让第一波段衰减，化名过渡带，要求对于当于对于。频带可视为阻的补偿和频率响应误差 (5)对于 方程(4)和(5)可以合并成一个错误功能 (6) 。多级插补设计是一样的设计，但多decimator的过滤器结构扭转。在多低通滤波器的结构是一个多decimator随后多插值，并在之间，有一种补偿操作的最低采样率没有变动。如果走样衰减要求decimator是一样的成像衰减要求插补，设计的多级d