数字集成电路分析与设计 第二章答案.doc

Chapter 2P2.1. a) The solution for the NMOS case is based on Example 2.4:The equation for VT0 is: Calculate each individual component.For the PMOS device:b) The magnitude of VT0 would be higher. Since the device is PMOS this means that VT0 is lowered. Since the only thing thats been changed is the doping of the gate, only changes.The new VT0 then becomes:c) Since VT0 will be adjusted with implanted charge (QI):To calculate the threshold implant level NI:For the NMOS device from part(a): (p-type)For the PMOS device from part(a): (n-type)For the PMOS device from part(b): (p-type)d) The advantage of having the gate doping be n+ for NMOS and p+ for PMOS could be seen from analysis above. Doping the gates in such a way leads to devices with lower threshold voltages, but enables the implant adjustment with the same kind of impurities that used in the bulk (p-type for NMOS and n-type for PMOS). If we were to use the same kind of doping in gate as in the body (i.e. n+ for PMOS and p+ for NMOS) that would lead to higher un-implanted threshold voltages. Adjusting them to the required lower threshold voltage would necessitate implantation of the impurities of the opposite type near the oxide-Si interface. This is not desirable. Also, the doping of the poly gate can be carried out at the same time as the source and drain and therefore does not require an extra step.P2.2. First, convert to units of cm:Now, using the mobility equation:P2.3. a) For each transistor, derive the region of operation. In our case, for , the transistor is in the cutoff region and there is no current. For , first calculate the saturation voltage using:For our transistors, this would be:NMOS0.24V0.34VPMOS0.35V0.61VNext, we derive the IV characteristics using the linear and saturation current equations, we get the graphs shown below.To plot vs. , first identify the region of operation of the transistor. For , the transistor is in the cutoff region, and there is negligible current. For and , the transistor is in the saturation region and saturation current expression should be used. The graph is shown below. Clearly, it is closer to the linear model.P2.4. For each transistor, first determine if the transistor is in cutoff by checking to see if VGS is less than or greater than VT. VT may have to be recalculated if the source of the transistor isnt grounded. If VGS is less than VT, then it is in cutoff, otherwise, it is in either triode or saturation.To determine if it is in the triode saturation region, check to see if VDS is less than or greater than VDSAT. If VDS is less than VDSAT, then it is in triode, otherwise, it is in saturation.a. Cutoffb. Cutoffc. LinearThe transistor is not in the cutoff region.d. Saturation: In this case, because the transistor is in the saturation region. To see this, recognize that in a long-channel transistor if, the transistor is in saturation. Since the saturation drain voltage is smaller in a velocity-saturated transistor than in a long-channel transistor, if the long-channel saturation region equation produces a saturated transistor, than the velocity-saturated saturation region equation will also.P2.5. In both cases, the first step it to calculate the maximum value of given . If the voltage at the drain is higher than this maximum value, then , otherwise, . The maximum value of is but because of body effect and we consider its effect.There are two ways to calculate this, either through iteration or through substitution.Iteration:For the iteration method, we need a starting value for VX,max. A good starting value would be . We plug this value on the RHS of the equation, calculate a new VX,max and repeat until we reach a satisfactory converged value.Old Vx,maxNew Vx,max0.8000.7280.7280.7340.7340.734In this, only three iterations are needed to reach 0.734V.Substitution:The term makes things a bit tricky, we get around this by making the following substitution:Therefore:We use the first value since second value is above VDD.a. Since , .b. Since , .P2.6.a. Initially, when , the transistor is in the cutoff region and . This value is constant until Vin exceeds Vt0. From then, and body effect must be taken into account. This trend continues until , and the value of Vin at that point must be calculated. From then on, .To plot VX in the second region, we first derive an expression for VX vs. Vin.Substituting:Therefore:Since this is a quadratic function, there will be two graphs of VX. Only one of these graphs intersects with VX in the first region. In this case, plug and see which one gives 0V. In our case, it would be the + version of the quadratic.To see where region 3 begins, we simply isolate Vin:The final graph is shown in Figure P2.6a:Figure P2.6ab. In this question until . To calculate VX,max, we can use the equation from P2.6a. The second value is invalid because it is higher than the gate voltage. The plot is shown below.P2.7. First, lets convert the units into terms of fF and m.Now we can calculate the capacitances.P2.8. (a) Transistor is in cutoff. IDS=Isub. (b) Transistor is in cutoff. IDS=Isub. (c) Transistor is in the linear region. (d) Transistor is in the saturation region. P2.9. Since the lengths are the same, the saturation voltage will be the same.The graphs of the two transistors are shown in Figure P2.9. Notice that the main difference between the two curves is that when we double the width, we double the current.P2.10. a) The values of Ks and can be calculated using the current values in the saturation region. Since the alpha-power model equation () only contains two unknowns, we need two equations. From P2.3:NMOS58.51A20.48APMOS24.09A6.83ATable Error! Reference source not found.P2.10: Saturation VoltageFor the NMOS: Dividing the two produces .Now plugging into one of the equations:For the PMOS: Dividing the two produces .Now plugging into one of the e