4078 CMOS 8输入端或非门VIP

7 1038 CAUTION These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures 1 888 INTERSIL or 321 724 7143 Copyright Intersil Corporation 1999 CD4078BMS CMOS 8 Input NOR OR Gate Features High Voltage Type 20V Rating Medium Speed Operation tPHL tPLH 75ns Typ at VDD 10V Buffered Inputs and Output 5V 10V and 15V Parametric Ratings Standardized Symmetrical Output Characteristics 100 Tested for Quiescent Current at 20V Maximum Input Current of 1 A at 18V Over Full Pack age Temperature Range 100nA at 18V and 25oC Noise Margin Over Full Package Temperature Range 1V at VDD 5V 2V at VDD 10V 2 5V at VDD 15V Meets All Requirements of JEDEC Tentative Standard No 13B Standard Specifi cations for Description of B Series CMOS Devices Description CD4078BMS NOR OR Gate provides the system designer with direct implementation of the positive logic 8 input NOR and OR functions and supplements the existing family of CMOS gates The CD4078BMS is supplied in these 14 lead outline packages Braze Seal DIPH4Q Frit Seal DIPH1B Ceramic FlatpackH3W December 1992 File Number3326 PinoutCD4078BMS TOP VIEW Functional Diagram K A B C D NC VSS VDD J H G F E NC 1 2 3 4 5 6 7 14 13 12 11 10 9 8 J A B C D E F G H K A B C D E F G H NC NO CONNECTION 12 11 10 9 2 3 4 5 A B C D E F G H 13 J K 1 J A B C D E F G H K A B C D E F G H VDD 14 VSS 7 6 8 NO CONNECTION Logic Diagram FIGURE 1 LOGIC DIAGRAM 13J 1K 2A 3B 4C 5D 9E 10F 11G 12H 7 1039 Specifi cations CD4078BMS Absolute Maximum RatingsReliability Information DC Supply Voltage Range VDD 0 5V to 20V Voltage Referenced to VSS Terminals Input Voltage Range All Inputs 0 5V to VDD 0 5V DC Input Current Any One Input 10mA Operating Temperature Range 55oC to 125oC Package Types D F K H Storage Temperature Range TSTG 65oC to 150oC Lead Temperature During Soldering 265oC At Distance 1 16 1 32 Inch 1 59mm 0 79mm from case for 10s Maximum Thermal Resistance ja jc Ceramic DIP and FRIT Package 80oC W20oC W Flatpack Package 70oC W20oC W Maximum Package Power Dissipation PD at 125oC For TA 55oC to 100oC Package Type D F K 500mW For TA 100oC to 125oC Package Type D F K Derate Linearity at 12mW oC to 200mW Device Dissipation per Output Transistor 100mW For TA Full Package Temperature Range All Package Types Junction Temperature 175oC TABLE 1 DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETERSYMBOLCONDITIONS NOTE 1 GROUP A SUBGROUPSTEMPERATURE LIMITS UNITSMINMAX Supply CurrentIDDVDD 20V VIN VDD or GND1 25oC 0 5 A 2 125oC 50 A VDD 18V VIN VDD or GND3 55oC 0 5 A Input Leakage CurrentIILVIN VDD or GNDVDD 201 25oC 100 nA 2 125oC 1000 nA VDD 18V3 55oC 100 nA Input Leakage CurrentIIHVIN VDD or GNDVDD 201 25oC 100nA 2 125oC 1000nA VDD 18V3 55oC 100nA Output VoltageVOL15VDD 15V No Load1 2 3 25oC 125oC 55oC 50mV Output VoltageVOH15VDD 15V No Load Note 3 1 2 3 25oC 125oC 55oC14 95 V Output Current Sink IOL5VDD 5V VOUT 0 4V1 25oC0 53 mA Output Current Sink IOL10VDD 10V VOUT 0 5V1 25oC1 4 mA Output Current Sink IOL15VDD 15V VOUT 1 5V1 25oC3 5 mA Output Current Source IOH5AVDD 5V VOUT 4 6V1 25oC 0 53mA Output Current Source IOH5BVDD 5V VOUT 2 5V1 25oC 1 8mA Output Current Source IOH10VDD 10V VOUT 9 5V1 25oC 1 4mA Output Current Source IOH15VDD 15V VOUT 13 5V1 25oC 3 5mA N Threshold VoltageVNTHVDD 10V ISS 10 A1 25oC 2 8 0 7V P Threshold VoltageVPTHVSS 0V IDD 10 A1 25oC0 72 8V FunctionalFVDD 2 8V VIN VDD or GND7 25oCVOH VDD 2 VOL 4 5V VOL 4 5V VOL 13 5V VOL 13 5V VOL 9V VOL 9V VOL 1V1 2 25oC 125oC 55oC 7 V Propagation DelayTPHL TPLH VDD 10V1 2 3 25oC 150ns VDD 15V1 2 3 25oC 110ns Transition TimeTTHL TTLH VDD 10V1 2 3 25oC 100ns VDD 15V1 2 3 25oC 80ns Maximum Clock Input Frequency FCLVDD 10V1 2 3 25oC6 MHz VDD 15V1 2 3 25oC8 5 MHz Input CapacitanceCINut1 2 25oC 7 5pF NOTES 1 All voltages referenced to device GND 2 The parameters listed on Table 3 are controlled via design or process and are not directly tested These parameters are characterized on initial design release and upon design changes which would affect these characteristics 3 CL 50pF RL 200K Input TR TF VDD 2 VOL VDD 2 V VDD 3V VIN VDD or GND Propagation Delay TimeTPHL TPLH VDD 5V1 2 3 4 25oC 1 35 x 25oC Limit ns NOTES 1 All voltages referenced to device GND 2 CL 50pF RL 200K Input TR TF 20ns 3 See Table 2 for 25oC limit 4 Read and Record TABLE 5 BURN IN AND LIFE TEST DELTA PARAMETERS 25OC PARAMETERSYMBOLDELTA LIMIT Supply Current SSIIDD 0 1 A Output Current Sink IOL5 20 x Pre Test Reading Output Current Source IOH5A 20 x Pre Test Reading TABLE 6 APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL STD 883 METHODGROUP A SUBGROUPSREAD AND RECORD Initial Test Pre Burn In 100 50041 7 9IDD IOL5 IOH5A TABLE 3 ELECTRICAL PERFORMANCE CHARACTERISTICS Continued PARAMETERSYMBOLCONDITIONSNOTESTEMPERATURE LIMITS UNITSMINMAX 1042 All Intersil semiconductor products are manufactured assembled and tested under ISO9000 quality systems certifi cation Intersil products are sold by description only Intersil Corporation reserves the right to make changes in circuit design and or specifi cations at any time without notice Accordingly the reader is cautioned to verify that data sheets are current before placing orders Information furnished by Intersil is believed to be accurate and reliable However no responsibility is assumed by Intersil or its subsidiaries for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries For information regarding Intersil Corporation and its products see web site Specifi cations CD4078BMS Interim Test 1 Post Burn In 100 50041 7 9IDD IOL5 IOH5A Interim Test 2 Post Burn In 100 50041 7 9IDD IOL5 IOH5A PDA Note 1 100 50041 7 9 Deltas Interim Test 3 Post Burn In 100 50041 7 9IDD IOL5 IOH5A PDA Note 1 100 50041 7 9 Deltas Final Test100 50042 3 8A 8B 10 11 Group ASample 50051 2 3 7 8A 8B 9 10 11 Group BSubgroup B 5Sample 50051 2 3 7 8A 8B 9 10 11 DeltasSubgroups 1 2 3 9 10 11 Subgroup B 6Sample 50051 7 9 Group DSample 50051 2 3 8A 8B 9Subgroups 1 2 3 NOTE 1 5 Parameteric 3 Functional Cumulative for Static 1 and 2 TABLE 7 TOTAL DOSE IRRADIATION CONFORMANCE GROUPS MIL STD 883 METHOD TESTREAD AND RECORD PRE IRRADPOST IRRADPRE IRRADPOST IRRAD Group E Subgroup 250051 7 9Table 41 9Table 4 TABLE 8 BURN IN AND IRRADIATION TEST CONNECTIONS FUNCTIONOPENGROUNDVDD9V 0 5V OSCILLATOR 50kHz25kHz Static Burn In 1 Note 1 1 6 8 132 5 7 9 1214 Static Burn In 2 Note 1 1 6 8 1372 5 9 12 14 Dynamic Burn In Note 1 6 87141 132 5 9 12 Irradiation Note 2 1 6 8 1372 5 9 12 14 NOTE 1 Each pin except VDD and GND will have a series resistor of 10K 5 VDD 18V 0 5V 2 Each pin except VDD and GND will have a series resistor of 47K 5 Group E Subgroup 2 sample size is 4 dice wafer 0 failures VDD 10V 0 5V TABLE 6 APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL STD 883 METHODGROUP A SUBGROUPSREAD AND RECORD 7 1043 CD4078BMS Schematic FIGURE 2 SCHEMATIC DIAGRAM 2 3 4 5 p n VDD p p n n p VDD n p 13 1 n p VSS VDD ALL INPUTS PROTECTED BY CMOS PROTECTION NETWORK VDD VSS DETAIL OF INVERTERS INVERTERS ppp n n n 9 10 11 12 p n INVERTERS ppp n n n VSS VSS n n p VSS VDD 7 1044 CD4078BMS Typical Performance Characteristics FIGURE 3 TYPICAL OUTPUT LOW SINK CURRENT CHARACTERISTICS FIGURE 4 MINIMUM OUTPUT LOW SINK CURRENT CHARACTERISTICS FIGURE 5 TYPICAL OUTPUT HIGH SOURCE CURRENT CHARACTERISTICS FIGURE 6 MINIMUM OUTPUT HIGH SOURCE CURRENT CHARACTERISTICS FIGURE 7 TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE FIGURE 8 TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE 10V 5V AMBIENT TEMPERATURE TA 25oC GATE TO SOURCE VOLTAGE VGS 15V 051015 15 10 5 20 25 30 DRAIN TO SOURCE VOLTAGE VDS V OUTPUT LOW SINK CURRENT IOL mA 10V 5V AMBIENT TEMPERATURE TA 25oC GATE TO SOURCE VOLTAGE VGS 15V 051015 7 5 5 0 2 5 10 0 12 5 15 0 DRAIN TO SOURCE VOLTAGE VDS V OUTPUT LOW SINK CURRENT IOL mA 10V 15V AMBIENT TEMPERATURE TA 25oC GATE TO SOURCE VOLTAGE VGS 5V 0 5 10 15 DRAIN TO SOURCE VOLTAGE VDS V 20 25 30 0 5 10 15 OUTPUT HIGH SOURCE CURRENT IOH mA 10V 15V AMBIENT TEMPERATURE TA 25oC 0 5 10 15 DRAIN TO SOURCE VOLTAGE VDS V 0 5 10 15 OUTPUT HIGH SOURCE CURRENT IOH mA GATE TO SOURCE VOLTAGE VGS 5V AMBIENT TEMPERATURE TA 25oC LOAD CAPACITANCE CL pF 040608010020 0 50 100 150 200 SUPPLY VOLTAGE VDD 5V 10V 15V TRANSITION TIME tTHL tTLH ns LOAD CAPACITANCE CL pF 0 25 102030405060708090100 50 75 100 125 150 175 PROPAGATION DELAY TIME tPHL t