明基JoybookS61笔记本电脑维修图纸.pdf

A A B B C C D D E E 44 33 22 11 Title SizeDocument NumberRev Date Sheetof Wistron Corporation 21F 88 Sec 1 Hsin Tai Wu Rd Hsichih Taipei Hsien 221 Taiwan R O C Gibbon 1 BLOCK DIAGRAM A3 141Monday January 02 2006 DMI I F HOST BUS DDR2 ICH7 M PCI BUS Calistoga CLK GEN 533 667MHz 100MHz KBC 533 667 MHz LVDS RGB FWH 4M DEBUG CONN LPC 34 5 6 7 8 9 10 11 12 15 16 17 18 313129 MDC Card G1421B OP AMP 28 AZALIA 21 MODEM ALC883 13 CRT CONN14 LCD Gibbon B l oc k D ia g r a m G792 19 PM49F004T 33VC WXGA Mobile CPU Yonah 478 Project code 91 XXXXX 001 PCB P N 05219 SA REVISION 1 533 667MHz 28 Line Out HD64F2111BVC R5C832 1394 CONN 24 25 25 25 CardReader 139428 Line MIC In 5 in 1 DDR2 533 667 MHz 11 12 533 667MHz LPC BUS 27 Mini Card PCIEx1 TOP GND S S S GND VCC BUTTOM PCB STACKUP IDTCV125PA INT SPKR Codec MS MS Pro xD MMC SD 28 21 SATA PATA USB 3 PORT HDD MINI USB Blue tooth 21 20 CDROM 22LAN 10 100 RTL8100CL 23 TXFM RJ45 RJ11 INT KB Touch Pad 3030 2626 New card PCI Express PWR SW TPS2231RGP GP RICOH USB TV Tuner DCBATOUT INPUTS SYSTEM DC DC TPS51120 5V S5 36 OUTPUTS TPS51100 DDR VREF1D8V S3 40 3V S5 TPS51124 1D8V S3 37 DCBATOUT 1D05V S0 INPUTSOUTPUTS SYSTEM DC DC APL5332KAC 3D3V S02D5V S0 APL5912 U 1D8V S31D5V S0 40 40 38 34 35 VCC CORE 0 1 3V 48A OUTPUTS CPU DC DC INPUTS DCBATOUT MAXIM CHARGER OUTPUTSINPUTS BT DCBATOUT UP 5V 5V 100mA 18V 4 0A MAX8725 ISL6262 20 26 23 INT MIC 28 A A B B C C D D E E 44 33 22 11 RESET FLEX XDP TCK TDO FLEX CLK XDP CLK XDP XDP TMS 3D3V S0 1D05V S0 1D05V S0 H CPURST 4 6 XDP TDI4 XDP TMS4 XDP TRST 4 XDP TCK4 XDP TDO4 CLK XDP 3 CLK XDP3 XDP BPM 54 XDP BPM 44 XDP BPM 04 XDP BPM 14 XDP BPM 24 XDP BPM 34 XDP DBRESET CPU4 Title SizeDocument NumberRev Date Sheetof Wistron Corporation 21F 88 Sec 1 Hsin Tai Wu Rd Hsichih Taipei Hsien 221 Taiwan R O C Gibbon 1 ITP A3 241Tuesday January 03 2006 Calistoga Strapping Signals and Configuration 125CV Spread Spectrum Select SS3SS2SS1SS0Spread Amount 000 00 0 0 0 0 1 11 0 1 0 8 1 0 1 25 1 5 1 75 2 0 2 5 3 0 page 7page 3 ICH6 internal 20K pull ups approximately 33 ohm DD 15 0 DDACK ICH6 internal 20K pull downs IORDY LAN RXD 2 0 ICH7M Integrated Pull up and Pull down Resistors ICH6 internal 10K pull ups DCS3 DCS1 DIOR DREQ DIOW ICH6 M EDS 14308 0 8V1 DA 2 0 ACZ BIT CLK ACZ RST ACZ SDIN 2 0 ACZ SYNC ACZ SDOUT ACZ BITCLK USB 7 0 P N ICH6 internal 11 5K pull downs LAN CLK DD 7 ICH6 internal 100K pull downs ICH7M IDE Integrated Series Termination Resistors SDDREQ ICH6 internal 15K pull downs DPRSLPVR DPRSLP EE DIN EE DOUT EE CS GNT 5 GPO 17 GNT 6 GPO 16 LAD 3 0 FB 3 0 LDRQ 0 LDRQ 1 GPI 41 PME PWRBTN SPKR TP 3 IDEIRQ 00 0 0 1 1 1 11 11 1 0 1 25 1 5 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 0 3 0 4 0 5 0 6 0 8 MiniPCI IRQ 25 23 0 2 E PCI Routing 7412 LAN 1 A REQ GNTIDSEL 21 CFG 2 0 CFG 4 3 CFG5 CFG8 Pin Name 001 FSB533 011 FSB667 FSB Frequency Select 0 DMI x2 others Reserved Reserved Default 1 DMI x4 Strap Description DMI x2 Select Reserved Configuration ReservedCFG6 CFG70 Reserved 1 Mobile CPU Default CPU Strap CFG9 0 1 05V 00 Reserved Default Default edge of the Alviso GMCH PWORK In signal CFG16 10 All Z mode enabled 0 No SDVO device present DATA CFG 15 14 SDVO Present Default CFG19 CFG20 straps VCC Select CFG17 CFG18 11 Normal Operation 1 Dynamic ODT Enabled All strap signals are sampled with respect to the leading 0 Dynamic ODT Disabled 1 SDVO device present SDVOCRTL SDVO PCIE Concurrent XOR ALL Z test 1 1 5V FSB Dynamic ODT Global R comp Disable All R comps Reserved 01 XOR mode enabled DMI Lane Reversal NOTE Default PCI Express Graphics Lane Reversal 0 Reverse Lanes 15 0 14 1 ect 1 Normal operation Default Lane Numbered in order CFG 11 10 Reserved CFG 13 12 Reserved 0 Normal operation Default lane Numbered in order 0 All R comp Disable 1 Normal Operation Default 1 Reverse Lane 4 0 3 1 ect 0 Only SDVO or PCIE x1 is operational Default 1 SDVO and PCIE x1 are operating simultaneously via the PEG port History 6 6 drawing SA ITP Debug Conn place within 1 to CPUplace within 0 5 to CPU If no letter it means J 5 0805 1K Ohm 0603 6 1206 0 1210 Symbol name J 5 F 1 D 0 5 B 0 1 10K Ohm 1 10W 100V Size 10KR3 Value F 1 0603 1 16W 75V 1KR3F 2 0402 3 0603 5 0805 If no letter it means J 5 0805 1 10W 100V 0603 Rating 33 3 Ohm Tolerance 1 16W 75V RESISTOR 0402 1 16W 25V 1 16W 75V 33D3R5 SC10U6D3V5MX 0805 Tolerance 10V 0805 Symbol name M X5R 2 0402 3 0603 5 0805 10uF Rating SCD1U10V2MX 1 SC2D2U16V5ZY Value 16V CAPACITOR Z Y5V 0402 M 20 K 10 Z 80 20 2 2uF 6 1206 0 1210 6 3V 0 1uF Size M X5R The naming rule is Capacitor type value rating size tolerance material SCD1U10V2MX 1 SC SMT Ceremic TC POS cap or SP cap D1U 0 1uF 10V the voltage rating is 10V 2 0402 3 0603 5 0805 M tolerance M K Z X X7R X5R Y Y5V 1 symbol version nonsense to EE characteristic The naming rule is value R size tolerance For the value it can be read by the number before R R means resistor For the tolerance it can be read from the last letter For the rating we don t show on the symbol name For the size R2 0402 R3 0603 R5 0805 SB TP31TPAD30 1 TP40TPAD30 1 R132 240R3J L GP 12 TP91TPAD30 1 TP35TPAD30 1 R105 54D9R2F L1 GP 12 R107 39D2R2F L GP 12 TP56TPAD30 1 TP41TPAD30 1 R27222D6R2F L1 GP 12 TP92TPAD30 1 R268 54D9R2F L1 GP DY 12 TP33TPAD30 1 TP34TPAD30 1 TP149 TPAD30 1 TP90TPAD30 1 TP151 TPAD30 1 R10022D6R2F L1 GP 12 R110 27D4R2F L1 GP 12 TP150 TPAD30 1 TP131 TPAD30 1 TP28TPAD30 1 TP39TPAD30 1 A A B B C C D D E E 44 33 22 11 CLK PCIE ICH CLK PCIE ICH DREFCLK DREFSSCLK DREFSSCLK DREFCLK SS SEL ITP EN 3D3V APWR S03D3V CLKGEN S03D3V 48MPWR S0 CLK CPU BCLK 1 CLK CPU BCLK 1 CLK XDP CPU 1 DREFSSCLK 1 CLK PCIE SATA 1 CLK PCIE SATA 1 CLK PCIE ICH 1 CLK PCIE ICH 1 CLK PCIE MINI 1 CLK PCIE MINI 1 3D3V APWR S0 3D3V CLKGEN S0 3D3V 48MPWR S0 PCLK R5C832 1 PCLK KBC 1 PCLK FWH 1 SS SEL ITP EN DREFCLK 1 DREFCLK 1 CPU SEL2 CPU SEL1 GEN XTAL OUT GEN IREF GEN REF CLK MCH BCLK 1 CLK MCH BCLK 1 PCLK KBC CLK48 ICH CLK ICHPCI PCLK R5C832 PCLK FWH CLK ICH14 CLK MCH BCLK CLK CPU BCLK CLK MCH BCLK CLK CPU BCLK CLK MCH 3GPLL CLK MCH 3GPLL DREFSSCLK 1 CLK MCH 3GPLL 1 CLK MCH 3GPLL 1 GEN XTAL IN CLK PCIE NEW 1 CLK PCIE NEW 1 GEN XTAL OUT R CLK PCIE SATA CLK PCIE SATA CLK XDP CPU 1 CLK XDP CLK XDP CLK PCIE NEW CLK PCIE NEW CLK PCIE MINI CLK PCIE MINI CPU SEL0 CK PCLK DBG 1 CPU SEL0 CK PCLK LAN PCLK DBG 3D3V S03D3V S03D3V S0 3D3V S0 1D05V S01D05V S0 SMBD ICH11 18 PM STPCPU 16 CPU SEL1 4 7 CPU SEL2 4 7 CLK ICHPCI16 PCLK FWH31 PCLK KBC29 PCLK R5C83224 DREFCLK7 DREFCLK 7 CLK ICH1416 DREFSSCLK 7 DREFSSCLK 7 CLK MCH 3GPLL 7 CLK PCIE SATA 15 CLK CPU BCLK 4 CLK PCIE SATA 15 CLK PCIE ICH 16 CLK PCIE ICH 16 CLK MCH BCLK 6 CLK MCH BCLK 6 CLK MCH 3GPLL 7 CLK CPU BCLK 4 CLK48 ICH 16 PM STPPCI 16 SMBC ICH11 18 CLK PCIE NEW 26 CLK PCIE NEW 26 CPU SEL0 4 7 CLK EN 34 PCLK LAN22 CLK PCIE MINI 26 CLK PCIE MINI 26 CLK XDP 2 CLK XDP 2 PCLK DBG31 Title SizeDocument NumberRev Date Sheetof Wistron Corporation 21F 88 Sec 1 Hsin Tai Wu Rd Hsichih Taipei Hsien 221 Taiwan R O C Clock Generator IDTCV125PA A3 341Tuesday January 03 2006 Gibbon 1 0 0 1 200M 0 1Reserved 0 1100M FS B 0 133M 1 1 1 CPU 0 0 0 333M FS C 1 1 166M 0 1 1 0 0 0 1 FS A 1 266M 400M X OUT VTT PWRGD H IN 3D3V S0 Hi Z EN 6218 PGOOD L H H H L 100 96MHz H L CPU ITP SRC7 EMI capacitor SB SB SB SB SB SB SB SC SC SC EC10SC10P50V3JN GPDY 12 C447 SCD1U16V2ZY 2GP 12 R254 1KR2J 1 GP DY 12 R261 10KR2J 3 GP DY 12 C413 SC4D7U10V5ZY 3GP 12 EC4SC10P50V3JN GPDY 12 EC5SC15P50V3JN GP 12 R332 10KR2J 3 GP 12 RN40 SRN33J 5 GP U 1 23 4 RN19SRN49D9F GP 1 23 4 RN25 SRN33J 5 GP U 1 23 4 RN23SRN49D9F GP 1 23 4 R265 0R3 0 U GP 12 R35233R2J 2 GP 12 RN18SRN49D9F GP 1 23 4 RN39SRN49D9F GP 1 23 4 R29033R2J 2 GP 12 RN37 SRN33J 5 GP U 1 23 4 C464 SC15P50V3JN GP 12 RN30SRN49D9F GP 1 23 4 RN20SRN33J 5 GP U 1 23 4 C463 SCD1U16V2ZY 2GP 12 RN24SRN49D9F GP 1 23 4 C446 SCD1U16V2ZY 2GP 12 R286 1KR2J 1 GP DY 12 R307470R2J 2 GP 12 R33333R2J 2 GPFWH 12 C378 SCD1U16V2ZY 2GP 12 C432 SCD1U16V2ZY 2GP 12 RN42SRN49D9F GP 1 23 4 C466 SC15P50V3JN GP 12 RN17 SRN33J 5 GP U 1 23 4 R294 10KR2J 3 GP 12 EC6SC10P50V3JN GPDY 12 EC1SC15P50V3JN GP 12 R193 2K2R2J 2 GP 12 RN36 SRN33J 5 GP U 1 23 4 RN38SRN49D9F GP 1 23 4 RN27SRN49D9F GP 1 23 4 C374 SCD1U16V2ZY 2GP 12 R271 1KR2J 1 GP DY 12 R287 4D7R3F L GP 12 RN26 SRN33J 5 GP U 1 23 4 C461 SC4D7U10V5ZY 3GP 12 C451 SCD1U16V2ZY 2GP 12 EC2SC15P50V3JN GP 12 R35022R2J 2 GP 12 EC3SC10P50V3JN GP 12 RN41 SRN33J 5 GP U 1 23 4 C416 SCD1U16V2ZY 2GP 12 R259 1KR2J 1 GP DY 12 R335 10KR2J 3 GP DY 12 R164 0R3 0 U GP 12 U35 IDTCV125PAG GP VDD PCI 1 VSS PCI 2 PCI1 3 PCI2 4 PCI3 5 VSS PCI 6 VDD PCI 7 PCIF0 ITP EN 8 PCIF1 SEL100 96 9 VTT PWRGD PD 10 VDD48 11 USB48 FSA 12 VSS48 13 DOT96 14 DOT96 15 FSB TEST MODE 16 LVDS 17 LVDS 18 SRC1 19 SRC1 20 VDD SRC 21 SRC2 22 SRC2 23 SRC3 24 SRC3 25 SRC4 26 SRC4 27 VDD SRC 28 VSS SRC 29 SRC5 30 SRC5 31 SRC6 32 SRC6 33 VDD SRC 34 CPU2 ITP SRC7 35 CPU2 ITP SRC7 36 VDDA 37 VSSA 38 IREF 39 CPU1 40 CPU1 41 VDD CPU 42 CPU0 43 CPU0 44 VSS CPU 45 SCL 46 SDA 47 VDD REF 48 XTAL OUT 49 XTAL IN 50 VSS REF 51 REF 52 FSC TEST SEL 53 CPU STOP 54 PCI STOP 55 PCI0 56 R351475R2F L1 GP 12 RN44 SRN33J 5 GP U 1 23 4 C407 SCD1U16V2ZY 2GP 12 C377 SC10U10V5ZY 1GP 12 R315 10KR2J 3 GP DY 12 C467 SCD1U16V2ZY 2GP 12 RN43SRN49D9F GP 1 23 4 R33039R2J L GP 12 R276 1KR2J 1 GP DY 12 R32833R2J 2 GP 12 C433 SCD1U16V2ZY 2GP 12 EC9SC15P50V3JN GP 12 X5 X 14D31818M 24GP 12 RN22SRN33J 5 GP U 1 23 4 R32733R2J 2 GP 12 R33633R2J 2 GP 12 C470 SCD1U16V2ZY 2GP 12 A A B B C C D D E E 44 33 22 11 H A 18 H A 20 H A 21 H A 22 H A 17 H A 19 H A 23 H A 24 H A 25 H A 26 H A 27 H A 28 H A 29 H A 30 H A 31 H A 3 H A 4 H A 5 H A 6 H A 7 H A 8 H A 9 H A 10 H A 11 H A 12 H A 13 H A 14 H A 15 H A 16 H REQ 0 H REQ 1 H REQ 2 H REQ 3 H REQ 4 H RS 1 H RS 0 H RS 2 H IERR XDP BPM 0 XDP BPM 1 XDP BPM 2 XDP BPM 3 XDP BPM 4 XDP TCK XDP TDI XDP TMS XDP TRST XDP TDO XDP BPM 5 H D 32 H D 33 H D 34 H D 35 H D 36 H D 37 H D 38 H D 39 H D 41 H D 40 H D 42 H D 43 H D 44 H D 45 H D 46 H D 47 H D 0 H D 1 H D 2 H D 3 H D 4 H D 5 H D 6 H D 7 H D 8 H D 9 H D 10 H D 11 H D 12 H D 13 H D 14 H D 15 H D 16 H D 17 H D 18 H D 19 H D 20 H D 21 H D 22 H D 23 H D 24 H D 25 H D 26 H D 27 H D 28 H D 29 H D 30 H D 31 H D 48 H D 49 H D 51 H D 50 H D 52 H D 53 H D 54 H D 55 H D 57 H D 56 H D 58 H D 59 H D 60 H D 61 H D 63 H D 62 COMP0 COMP1 COMP2 COMP3TEST1 TEST2 XDP TRST H CPURST RSVD CPU 12 RSVD CPU 13 RSVD CPU 14 RSVD CPU 15 RSVD CPU 16 RSVD CPU 20 RSVD CPU 17 RSVD CPU 18 RSVD CPU 19 RSVD CPU 4 RSVD CPU 1 RSVD CPU 8 RSVD CPU 5 RSVD CPU 6 RSVD CPU 7 RSVD CPU 2 RSVD CPU 3 RSVD CPU 10 RSVD CPU 9 RSVD CPU 11 CPU PROCHOT 1 XDP TDI CPU GTLREF0 H INIT H INTR H NMI H SMI H A20M H FERR H STPCLK H DPRSLP H PWRGD H DPSLP PM THRMTRIP I H CPUSLP 1D05V S0 1D05V S0 1D05V S0 1D05V S0 H ADS 6 H BNR 6 H DRDY 6 H DBSY 6 H BREQ 06 H HIT 6 H HITM 6 H LOCK 6 H DSTBN 2 6 H DSTBP 2 6 H DINV 2 6 H D 63 0 6 H DSTBN 3 6 H DSTBP 3 6 H DINV 3 6 H ADSTB 16 H A 31 3 6 H ADSTB 06 H REQ 4 0 6 H DSTBN 06 H DSTBP 06 H DINV 06 H DSTBN 16 H DSTBP 16 H DINV 16 H BPRI 6 H DEFER 6 H INIT 15 H CPURST 2 6 H RS 2 0 6 H TRDY 6 H THERMDA 19 CLK CPU BCLK 3 CLK CPU BCLK 3 H DPRSLP 15 34 H DPSLP 15 H DPWR 6 H PWRGD 15 H CPUSLP 6 15 H FERR 15 H THERMDC 19 PM THRMTRIP A 7 PM THRMTRIP I 15 H INTR15 H NMI15 H SMI 15 H IGNNE 15 H A20M 15 H DINV 3 0 6 H DSTBN 3 0 6 H DSTBP 3 0 6 CPU SEL23 7 CPU SEL03 7 CPU SEL13 7 H STPCLK 15 PSI 34 CPU PROCHOT 34 XDP BPM 0 2 XDP BPM 1 2 XDP BPM 2 2 XDP BPM 3 2 XDP BPM 4 2 XDP BPM 5 2 XDP TCK 2 XDP TDI2 XDP TMS 2 XDP TRST 2 XDP TDO2 XDP DBRESET CPU 2 Title SizeDocument NumberRev Date Sheetof Wistron Corporation 21F 88 Sec 1 Hsin Tai Wu Rd Hsichih Taipei Hsien 221 Taiwan R O C CPU 1 of 2 A3 441Tuesday January 03 2006 Gibbon 1 H IERR with a GND 0 1 away Place testpoint on Layout Note Comp0 2 connect with Zo 27 4 ohm make Comp1 3 connect with Zo 55 ohm make trace length shorter than 0 5 trace length shorter than 0 5 Layout Note 0 5 max length All place within 2 to CPU No stub should connect to PM THRMTRIP without T ing ICH6 and Alviso SB should colse to CPU SB SB 1 C581SC22P50V2JN 4GPDY 12 TP95TPAD30 1 R1170R0402 PAD 12 R141 0R2J 2 GP DY 12 TP89TPAD30 1 TP59TPAD30 1 C579SC22P50V2JN 4GPDY 12 TP50TPAD30 1 R10127D4R2F L1 GP 12 R15554D9R2F L1 GP 12 C578SC22P50V2JN 4GPDY 12 TP45TPAD30 1 TP143 TPAD30 1 TP138 TPAD30 1 C575SC22P50V2JN 4GPDY 12 R99 680R3F GP 12 C577SC22P50V2JN 4GPDY 12 R133 56R2J 4 GP 12 R156 2KR2F 3 GP 12 TP37TPAD30 1 TP44TPAD30 1 TP141 TPAD30 1 C586SC22P50V2JN 4GPDY 12 R16051R2J 2 GP 12 R108 54D9R2F L1 GP DY 12 TP49TPAD30 1 R10254D9R2F L1 GP 12 C585SC22P50V2JN 4GPDY 12 TP36TPAD30 1 TP72TPAD30 1 C584SC22P50V2JN 4GPDY 12 TP48TPAD30 1 TP66TPAD30 1 C576SC47P50V2JN 3GPDY 12 DATA GRP 0DATA GRP 1 DATA GRP 2DATA GRP 3 MISC U42B TUALA SKT 1 COMP 0 R26 COMP 1 U26 COMP 2 U1 COMP 3 V1 D 0 E22 D 1 F24 D 10 J24 D 11 J23 D 12 H26 D 13 F26 D 14 K22 D 15 H25 D 16 N22 D 17 K25 D 18 P26 D 19 R23 D 2 E26 D 20 L25 D 21 L22 D 22 L23 D 23 M23 D 24 P25 D 25 P22 D 26 P23 D 27 T24 D 28 R24 D 29 L26 D 3 H22 D 30 T25 D 31 N24 D 32 AA23 D 33 AB24 D 34 V24 D 35 V26 D 36 W25 D 37 U23 D 38 U25 D 39 U22 D 4 F23 D 40 AB25 D 41 W22 D 42 Y23 D 43 AA26 D 44 Y26 D 45 Y22 D 46 AC26 D 47 AA24 D 48 AC22 D 49 AC23 D 5 G25 D 50 AB22 D 51 AA21 D 52 AB21 D 53 AC25 D 54 AD20 D 55 AE22 D 56 AF23 D 57 AD24 D 58 AE21 D 59 AD21 D 6 E25 D 60 AE25 D 61 AF25 D 62 AF22 D 63 AF26 D 7 E23 D 8 K24 D 9 G24 TEST2 D25 DINV 0 J26 DINV 1 M26 DINV 2 V23 DINV 3 AC20 DPRSTP E5 DPSLP B5 DPWR D24 DSTBN 0 H23 DSTBN 1 M24 DSTBN 2 W24 DSTBN 3 AD23 DSTBP 0 G22 DSTBP 1 N25 DSTBP 2 Y25 DSTBP 3 AE24 GTLREF AD26 PSI AE6 PWRGOOD D6 SLP D7 TEST1 C26 BSEL 0 B22 BSEL 1 B23 BSEL 2 C21 R1581KR2F 3 GP DY 12 C583SC22P50V2JN 4GPDY 12 TP43TPAD30 1 TP70TPAD30 1 R104150R2F 1 GP 12 TP38TPAD30 1 C582SC22P50V2JN 4GPDY 12 ADDR GROUP 0ADDR GROUP 1 CONTROL XDP ITP SIGNALSH CLK THERM RESERVED U42A TUALA SKT 1 A 10 N3 A 11 P5 A 12 P2 A 13 L1 A 14 P4 A 15 P1 A 16 R1 A 17 Y2 A 18 U5 A 19 R3 A 20 W6 A 21 U4 A 22 Y5 A 23 U2 A 24 R4 A 25 T5 A 26 T3 A 27 W3 A 28 W5 A 29 Y4 A 3 J4 A 30 W2 A 31 Y1 RSVD 01 AA1 RSVD 02 AA4 RSVD 03 AB2 RSVD 04 AA3 RSVD 05 M4 RSVD 06 N5 RSVD 07 T2 RSVD 08 V3 A 4 L4 A 5 M3 A 6 K5 A 7 M1 A 8 N2 A 9 J1 A20M A6 ADS H1 ADSTB 0 L2 ADSTB 1 V4 RSVD 09 B2 RSVD 10 C3 BCLK 0 A22 BCLK 1 A21 BNR E2 BPM 0 AD4 BPM 1 AD3 BPM 2 AD1 BPM 3 AC4 BPRI G5 BR0 F1 DBR C20 DBSY E1 DEFER H5 DRDY F21 FERR A5 RSVD 11 B25 HIT G6 HITM E4 IERR D20 IGNNE C4 INIT B3 LINT0 C6 LINT1 B4 LOCK H4 PRDY AC2 PREQ AC1 PROCHOT D21 REQ 0 K3 REQ 1 H2 REQ 2 K2 REQ 3 J3 REQ 4 L5 RESET B1 RS 0 F3 RS 1 F4 RS 2 G3 SMI A3 STPCLK D5 TCK AC5 TDI AA6 TDO AB3 THERMTRIP C7 THERMDA A24 THERMDC A25 TMS AB5 TRDY G2 TRST AB6 RSVD 13 D2 RSVD 14 F6 RSVD 15 D3 RSVD 16 C1 RSVD 17 AF1 RSVD 18 D22 RSVD 19 C23 RSVD 20 C24 RSVD 12 T22 TP53TPAD30 1 R162 1KR2F 3 GP 12 R142 56R2J 4 GP 12 C580SC22P50V2JN 4GPDY 12 TP142 TPAD30 1 R15427D4R2F L1 GP 12 TP145TPAD30 1 A A B B C C D D E E 44 33 22 11 1D05V S0 CPU VCCP VCC CORE S0 VCC CORE S0 VCC CORE S0 VCC CORE S0 1D5V S0 1D05V S0 1D5V VCCA S0 1D05V S0 VCC CORE S0 VCC CORE S0 1D5V VCCA S0 H VID1 34 H VID2 34 H VID3 34 H VID4 34 H VID5 34 H VID0 34 H VID 0 6 34 H VID6 34 VCC SENSE 34 VSS SENSE 34 Title SizeDocument NumberRev Date Sheetof Wistron Corporation 21F 88 Sec 1 Hsin Tai Wu Rd Hsichih Taipei Hsien 221 Taiwan R O C CPU 2 of 2 A3 541Tuesday January 03 2006 Gibbon 1 Layout Note should be of equal length VCCSENSE and VSSSENSE lines Layout Note Provide a test point with no stub to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54 9ohm resistors terminate the 55 ohm transmission line 1 C176 SC10U10V5ZY 1GP DY 12 C177 SC10U10V5ZY 1GP 12 C344 SC10U10V5ZY 1GP 12 R1160R0402 PAD 12 C313 SC10U10V5ZY 1GP DY 12 C310 SC10U10V5ZY 1GP 12 C331 SCD1U10V2KX 4GP 12 U42C TUALA SKT 1 VCC 001 A7 VCC 002 A9 VCC 003 A10 VCC 004 A12 VCC 005 A13 VCC 006 A15 VCC 007 A17 VCC 008 A18 VCC 009 A20 VCC 010 B7 VCC 011 B9 VCC 012 B10 VCC 013 B12 VCC 014 B14 VCC 015 B15 VCC 016 B17 VCC 017 B18 VCC 018 B20 VCC 019 C9 VCC 020 C10 VCC 021 C12 VCC 022 C13 VCC 023 C15 VCC 024 C17 VCC 025 C18 VCC 026 D9 VCC 027 D10 VCC 028 D12 VCC 029 D14 VCC 030 D15 VCC 031 D17 VCC 032 D18 VCC 033 E7 VCC 034 E9 VCC 035 E10 VCC 036 E12 VCC 037 E13 VCC 038 E15 VCC 039 E17 VCC 040 E18 VCC 041 E20 VCC 042 F7 VCC 043 F9 VCC 044 F10 VCC 045 F12 VCC 046 F14 VCC 047 F15 VCC 048 F17 VCC 049 F18 VCC 050 F20 VCC 051 AA7 VCC 052 AA9 VCC 053 AA10 VCC 054 AA12 VCC 055 AA13 VCC 056 AA15 VCC 057 AA17 VCC 058 AA18 VCC 059 AA20 VCC 060 AB9 VCC 061 AC10 VCC 062 AB10 VCC 063 AB12 VCC 064 AB14 VCC 065 AB15 VCC 066 AB17 VCC 067 AB18 VCC 068 AB20 VCC 069 AB7 VCC 070 AC7 VCC 071 AC9 VCC 072 AC12 VCC 073 AC13 VCC 074 AC15 VCC 075 AC17 VCC 076 AC18 VCC 077 AD7 VCC 078 AD9 VCC 079 AD10 VCC 080 AD12 VCC 081 AD14 VCC 082 AD15 VCC 083 AD17 VCC 084 AD18 VCC 085 AE9 VCC 086 AE10 VCC 087 AE12 VCC 088 AE13 VCC 089 AE15 VCC 090 AE17 VCC 091 AE18 VCC 092 AE20 VCC 093 AF9 VCC 094 AF10 VCC 095 AF12 VCC 096 AF14 VCC 097 AF15 VCC 098 AF17 VCC 099 AF18 VCC 100 AF20 VCCA B26 VCCP 01 V6 VCCP 02 G21 VCCP 03 J6 VCCP 04 K6 VCCP 05 M6 VCCP 06 J21 VCCP 07 K21 VCCP 08 M21 VCCP 09 N21 VCCP 10 N6 VCCP 11 R21 VCCP 12 R6 VCCP 13 T21 VCCP 14 T6 VCCP 15 V21 VCCP 16 W21 VCCSENSE AF7 VID 0 AD6 VID 1 AF5 VID 2 AE5 VID 3 AF4 VID 4 AE3 VID 5 AF2 VID 6 AE2 VSSSENSE AE7 C436 SC10U10V5ZY 1GP 12 C163 SCD1U10V2KX 4GP 12 C439 SC10U10V5ZY 1GP DY 12 C178 SC10U10V5ZY 1GP DY 12 C402 SC10U10V5ZY 1GP 12 C174 SC10U10V5ZY 1GP DY 12 C165 SCD1U10V2KX 4GP 12 C157 SC10U10V5ZY 1GP 12 C314 SC10U10V5ZY 1GP 12 C151 SC10U10V5ZY 1GP DY 12 C196 SCD1U10V2KX 4GP DY 12 C161 SCD1U10V2KX 4GP 12 C154 SC10U10V5ZY 1GP 12 R467 100R2F L1 GP U 12 C312 SC10U10V5ZY 1GP 12 C317 SCD1U10V2KX 4GP 12 C328 SCD1U10V2KX 4GP 12 C251 SCD1U10V2KX 4GP 12 C179 SC10U10V5ZY 1GP 12 C299 SC10U10V5ZY 1GP 12 C320 SCD1U10V2KX 4GP 12 C332 SCD1U10V2KX 4GP 12 C426 SC10U10V5ZY 1GP DY 12 C307 SCD1U10V2KX 4GP 12 C441 SC10U10V5ZY 1GP 12 C209 SCD1U10V2KX 4GP 12 C181 SCD1U10V2KX 4GP DY 12 C365 SCD01U16V2KX 3GP 12 C315 SC10U10V5ZY 1GP DY 12 C168 SC10U